Patents Examined by John D. Smith
  • Patent number: 4982693
    Abstract: In a semiconductor vapor phase growing apparatus wherein a semiconductor wafer is heated in a reaction furnace, and an output of a source for heating, the temperature of the wafer, and flow quantities of gases supplied to the reaction furnace for vapor phase growing a semiconductor on the wafer by a chemical reaction of the gases are controlled by a control unit according to a predetermined sequences, there are provided a temperature detector for detecting the temperature of the wafer and output control means controlling the output of the source according to a given reference value. The control unit is consitituted by memory means storing a program of executing the sequences and linearly raising and lowering the wafer temperature at a predetermined temperature gradient in a plurality of divided time lateral units by making different the rates of temperature change in respective time interval units, and a CPU for processing the program.
    Type: Grant
    Filed: March 4, 1983
    Date of Patent: January 8, 1991
    Assignee: Toshiba Kikai Kabushiki Kaisha
    Inventor: Hitoshi Ebata
  • Patent number: 4752500
    Abstract: A process for producing stabilized molten carbonate fuel cell porous metal anodes by impregnating a porous metallic anode in an aqueous solution having dissolved therein a water soluble salt of a structure stabilizing agent; drying the impregnated porous anode to evaporate free water and form hydrated salts of the stabilizing agent on the surface of the metal particles, further heating the impregnated dried porous anodes to dehydrate the hydrated compounds on the surface of the metal particles, and heating the porous anodes to a temperature of about 600.degree. to about 700.degree. C. in a reducing atmosphere forming particles of the stabilizing agent on the surface of the metal particles. Suitable stabilizing agents include water soluble salts of chromium, zirconium, aluminum, and mixtures thereof. The porous metallic anodes produced according to this process provide stability against sintering and creep resistance during molten carbonate fuel cell operation.
    Type: Grant
    Filed: April 2, 1986
    Date of Patent: June 21, 1988
    Assignee: Institute of Gas Technology
    Inventor: Rafael A. Donado
  • Patent number: 4726961
    Abstract: A process and apparatus for the low pressure, cold wall, chemical vapor deposition of refractory metals, such as tungsten on a silicon wafer. The silicon wafer is introduced into a loading lock wherein the pressure is reduced to subatmospheric pressure. The silicon wafer is transferred to a deposition chamber where it is heated to an elevated temperature. A refractory metal carbonyl vapor is introduced into the deposition chamber and dissociates to deposit a refractory metal on the silicon wafer. The wafer is transferred to an unloading lock where it is allowed to cool and is then removed.
    Type: Grant
    Filed: June 16, 1986
    Date of Patent: February 23, 1988
    Assignee: Thermco Systems, Inc.
    Inventors: Michael Diem, Michael A. Fisk, Jon C. Goldman
  • Patent number: 4726965
    Abstract: To metallize transparent conductive paths of indium tin oxide (ITO) on substrates of display devices, a solderable metal layer is applied by electroless deposition. If the metal layer is adjacent a liquid crystal display device, the display device may be manufactured and tested prior to the electroless deposition, with only an edge of the substrate being dipped into the deposition bath. Prior to the deposition of the solderable metal layer, the indium tin oxide surface may be reduced and an adhesion improving layer of may also be deposited by above the indium tin surface and below the solderable metal layer. Integrated circuits can then be soldered to the metallized conductive paths.
    Type: Grant
    Filed: October 15, 1986
    Date of Patent: February 23, 1988
    Assignee: Standard Elektrik Lorenz AG
    Inventor: Rolf Zondler
  • Patent number: 4720404
    Abstract: An aqueous alkaline bath is disclosed, for the adhesive chemical (electroless) deposition of copper, nickel, cobalt or their alloys with great purity, containing compounds of these metals, reducing agent, wetting agent, pH-regulating substance, stabilizer, inhibitor and complex former, characterized in that polyols and/or compounds of the biuret type are contained as complex former, as well as a method for the adhesive chemical deposition of the metals, employing this bath at a temperature from 5.degree. C. up to the boiling point of the bath, particularly for the manufacture of printed circuits.
    Type: Grant
    Filed: August 7, 1986
    Date of Patent: January 19, 1988
    Inventor: Josif Culjkovic
  • Patent number: 4720400
    Abstract: Microporous polytetrafluoroethylene (PTFE) articles, having a microstructure of nodes interconnected by fibrils also having continuous interporous metal coatings which encapsulate the nodes and fibrils of the PTFE while maintaining substantial porosity are disclosed, together with a method of producing temporary liquid-filled hydrophilic microporous article resulting in an improved metal plating manufacturing process.
    Type: Grant
    Filed: August 28, 1985
    Date of Patent: January 19, 1988
    Assignee: W. L. Gore & Associates, Inc.
    Inventor: James L. Manniso
  • Patent number: 4720394
    Abstract: A roughened surface is formed on an insulating ceramics substrate having an electrode pattern by bonding or partially thrusting ceramics particles to or in the substrate, and a gas-sensitive metal oxide thick film is firmly bonded to the roughened surface.
    Type: Grant
    Filed: June 30, 1986
    Date of Patent: January 19, 1988
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Takao Kojima, Akira Nakano, Toshitaka Matsuura, Akio Takami
  • Patent number: 4719134
    Abstract: It is often required to solder an electrical connection to a component or a lead thereto via a contact pad. At present pads are commonly of materials that tend to oxidize during any subsequent heat processing of the device, and are then difficult to solder. It has now been discovered that certain alloys of copper containing manganese may be used to construct contact pads that are both solderable and remain so even when ovened in air at 200.degree. C., and the invention provides a method of constructing solderable contact pads upon a chosen substrate, in which method there is formed on the relevant area of the substrate a layer of such a manganese/copper alloy.
    Type: Grant
    Filed: October 1, 1986
    Date of Patent: January 12, 1988
    Assignee: The General Electric Company p.l.c.
    Inventor: Brian W. Ely
  • Patent number: 4719124
    Abstract: It has been found that deposition temperature for materials such as cadmium mercury telluride is significantly lowered by precracking selected precursor materials. For example, if organometallic compounds such as diethylmercury and diethyltellurium are decomposed before introduction in the deposition vapor, epitaxial layer formation is possible at 250.degree. C.
    Type: Grant
    Filed: July 28, 1986
    Date of Patent: January 12, 1988
    Assignee: American Telephone and Telegraph Company AT&T Bell Laboratories
    Inventors: Po-Yen Lu, Chi-Hua Wang, Larry M. Williams
  • Patent number: 4717617
    Abstract: Passivation of aluminum-metallized silicon components by applying at least one silicon layer. For the purpose of the subsequent contacting, the components are annealed after the application of the silicon layer at a temperature from 480.degree. to 570.degree. C. if the silicon layer thickness exceeds 0.1 .mu.m and a temperature from 400.degree. to 500.degree. C. if the silicon layer is up to about 0.1 .mu.m thick, it being possible to omit the annealing operation if the silicon layer thickness is less than about 0.05 .mu.m.
    Type: Grant
    Filed: October 12, 1982
    Date of Patent: January 5, 1988
    Assignee: Siemens Aktiengesellschaft
    Inventor: Joachim Dathe
  • Patent number: 4717589
    Abstract: A method for manufacturing a silicon carbide fiber reinforced glass composite, which comprises either dipping silicon carbide fibers in molten glass in a tank, the molten glass being given wave vibration of 10-30 KHz by a supersonic vibrator provided with a cooling means to unravel the silicon carbide fibers and have the molten glass permeated therebetween, or plasma melt ejecting glass powder onto silicon carbide fibers to obtain a silicon carbide fiber/gass preform, molding the preform into a predetermined form and then subjecting the molded preform to thermal molding thereby to manufacture the silicon carbide fiber reinforced glass composite in the form of a molding.
    Type: Grant
    Filed: October 9, 1986
    Date of Patent: January 5, 1988
    Assignee: Nippon Carbon Co. Ltd.
    Inventors: Toshikatsu Ishikawa, Haruo Teranishi, Hiroshi Ichikawa, Yoshikazu Imai, Masanobu Umezawa
  • Patent number: 4717591
    Abstract: This invention relates to the prevention of mechanical and electrical failures in structures that are heat-treated, and more particularly relates to the use of coating layers containing Co and P on corrosible materials such as Cu. The invention has significant utility in the protection of Cu current-carrying lines in electronic structures that comprise multi layers that are subjected to heat treatments that would normally adversely affect the Cu lines. The CoP coating layer also acts to prevent interdiffusion between Cu and contact metals, such as Au.
    Type: Grant
    Filed: March 6, 1986
    Date of Patent: January 5, 1988
    Assignee: International Business Machines Corporation
    Inventors: Raul E. Acosta, Wilma J. Horkans, Ruby Mukherjee, Judith D. Olsen
  • Patent number: 4716055
    Abstract: A conductive fiber is made by an electroless plating process which is used in conjunction with a wet spinning process. The polymer must be catalyzed before the wet gel is collapsed. The resulting filament has a conductive region which is at least partially coincident with the polymer structure.
    Type: Grant
    Filed: August 5, 1985
    Date of Patent: December 29, 1987
    Assignee: BASF Corporation
    Inventors: John H. Sanders, Louis D. Hoblit, Joe A. Mann
  • Patent number: 4716049
    Abstract: Apparatus is disclosed for providing microelectronic, intra-chip and chip-to-chip interconnections in an ultra-dense integrated circuit configuration. Compressive pedestals 20 are used to form spring-loaded electrical and mechanical interconnections to conductive terminals on a chip interface mesa and chip assembly 28 in order to form a large multi-chip array 23 on an interconnection substrate 24. Methods are also disclosed for fabricating the compressive pedestals 20.
    Type: Grant
    Filed: June 30, 1986
    Date of Patent: December 29, 1987
    Assignee: Hughes Aircraft Company
    Inventor: Nils E. Patraw
  • Patent number: 4714624
    Abstract: Disclosed is a novel high temperature coating system comprised of two successively deposited layers of different respective materials which may be applied to turbine engine components to provide improved oxidation and corrosion resistance. The second applied layer is a composition having the general formula MCrAlY wherein M is a solid solution of molybdenum in nickel, cobalt or nickel plus cobalt. The first applied layer or interlayer, which is applied directly to the turbine engine component, is an aluminum coating.
    Type: Grant
    Filed: February 21, 1986
    Date of Patent: December 22, 1987
    Assignee: Textron/Avco Corp.
    Inventor: Subhash K. Naik
  • Patent number: 4711791
    Abstract: A method is disclosed for producing a flexible microcircuit of a size usable in vivo in the arterial or venous tract of a human. The method comprises forming, by various photoresist techniques, conductive runs on a polyimide base of about 1-2 mils thickness. Each end of a flexible microcircuit has minute holes formed therein for connection to an electronic chip and to hard wiring. The method produces holes in the conductive runs for the electronic chip connection of about 0.002 inches in diameter and holes about 0.016 inches in diameter at the end for wiring.
    Type: Grant
    Filed: August 4, 1986
    Date of Patent: December 8, 1987
    Assignee: The BOC Group, Inc.
    Inventors: Charles D. Wiseman, William M. Theisen
  • Patent number: 4711835
    Abstract: The invention relates to electric circuits formed by depositing a thick layer of conductive, resistive or dielectric paste on a flat substrate. The thick layers are deposited using a squeegee or by silk screen printing. In this first case, the resolution of the patterns is at best 200 microns, limited by the mesh of the silk screen printing screens. For obtaining finer patterns, the thick layer is dried, then masted using a photoresist, whose patterns may have a resolution of 50 microns, with a space of 50 microns. The thick layer is then etched, in its parts not protected by the photoresist mask, using a mixture of organic solvents which have a differential solubility with respect to the thick layer and to the photoresist.
    Type: Grant
    Filed: December 4, 1985
    Date of Patent: December 8, 1987
    Assignee: Thomson-CSF
    Inventor: Michel Dufour
  • Patent number: 4710395
    Abstract: A method and apparatus for printing through holes in ceramic substrates and the like. The substrate is held in position by means of a vacuum applied to an outer peripheral surface portion thereof. The deposited substance is pulled through the holes in the substrate by means of a closely regulated vacuum applied only to an inner surface portion, the inner and outer vacuum areas being separated in a holder device by means of O-rings. A pressure-time profile which appears in a plenum closely adjacent to the inner chamber may be compared to a previously generated pressure-time profile reference and used to accept or reject parts.
    Type: Grant
    Filed: May 14, 1986
    Date of Patent: December 1, 1987
    Assignee: Delco Electronics Corporation
    Inventors: William M. Young, Mark E. Wolfe
  • Patent number: 4710398
    Abstract: A method of manufacturing a semiconductor device. An insulation film having an opening is formed on a semiconductor substrate. The opening is filled with an electrically conductive material so as to substantially flatten the top surface of the opening filled with an electrically conductive material, an intermediate layer of an electrically conductive material having a greater allowable current density than that of a wiring layer to be formed thereon is formed so as to cover at least their surface of the electrically condictive material deposited in the opening. Subsequently, the wiring layer is formed so as to extend from the surface of the intermediate layer onto the surface of the insulation film. A semiconductor device incorporating the wiring layer having an extremely high reliability can be easily realized.
    Type: Grant
    Filed: August 26, 1986
    Date of Patent: December 1, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Yoshio Homma, Takashi Nishida
  • Patent number: 4710399
    Abstract: A method and mechanism to form minute drops of solder paste of uniform size spaced in desired patterns upon substrates of semi-conductor devices by extruding the paste under pressure through similar holes in a die while closely spaced above a substrate and, immediately after contacting the ends of minute columns of the paste with the substrate to adhere the same thereto, instantly raising the die to effect separation of the columns from the adhered ends on the substrates which comprise dots of paste of substantially uniform size which are spaced from each other. The paste is dispensed from a shallow reservoir above the die and defined by a flexible diaphragm positioned in opposition to the die and against which a pressure member operates against the diaphragm and paste contained in the reservoir to effect discharge of the paste under pressure as described above.
    Type: Grant
    Filed: September 2, 1986
    Date of Patent: December 1, 1987
    Inventor: Richard K. Dennis