Patents by Inventor Jeffrey Bernstein

Jeffrey Bernstein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9626624
    Abstract: An inference task is performed using a computation device having a plurality of processing elements operable in parallel and connected via a connectivity system. Performing the task includes accepting at the device a specification of at least part of the inference task. The specification characterizes a plurality of variables and a plurality of factors, each factor being associated with a subset of the variables. Each of the processing elements is configured with data defining one or more of the plurality of factors. At each of the processing elements, computation associated with one of the factors is performed concurrently with other of the processing elements performing computation associated with different ones of the factors. Messages are exchanged via a connectivity system. The messages provide inputs and/or outputs to the processing elements for the computations associated with the factors and provide a result of performing of the at least the part of the inference task.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: April 18, 2017
    Assignee: ANALOG DEVICES, INC.
    Inventors: Jeffrey Bernstein, Benjamin Vigoda
  • Patent number: 9563851
    Abstract: In an aspect, in general, a programmable computation device performs computations of an inference task specified by a plurality of variables and a plurality of factors, each factor being associated with a subset of the variables. The device includes one or more processing elements. Each processing element includes a first storage for a definition of a factor, a second storage for data associated with the inputs and/or outputs of at least some of the computations, and one or more computation units coupled to the first storage and the second storage for performing a succession of parts of the at least some of the computations that are associated with a factor, the succession of parts defined by data in the storage for the definition of the factor.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: February 7, 2017
    Assignee: Analog Devices, Inc.
    Inventors: Jeffrey Bernstein, Benjamin Vigoda, Kartik Nanda, Rishi Chaturvedi, David Hossack, William Peet, Andrew Schweitzer, Timothy Caputo
  • Publication number: 20160272723
    Abstract: Novel modulators, including antibodies and derivatives thereof, and methods of using such modulators to treat hyperproliferative disorders are provided.
    Type: Application
    Filed: March 30, 2016
    Publication date: September 22, 2016
    Applicant: STEMCENTRX, INC.
    Inventors: ORIT FOORD, SCOTT J. DYLLA, ROBERT A. STULL, ALEX BANKOVICH, ALEXANDRA LEIDA LIANA LAZETIC, JEFFREY BERNSTEIN
  • Patent number: 9409995
    Abstract: PTK modulators, including antibodies and derivatives thereof, and methods of using such modulators to treat hyper-proliferative disorders are provided.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: August 9, 2016
    Assignee: Stemcentrx, Inc.
    Inventors: Orit Foord, Scott J. Dylla, Robert A. Stull, Alex Bankovich, Alexandra Leida Liana Lazetic, Jeffrey Bernstein
  • Patent number: 9036420
    Abstract: A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: May 19, 2015
    Assignee: ANALOG DEVICES, INC.
    Inventors: Benjamin Vigoda, Jeffrey Bernstein, Jeffrey Venuti, Alexander Alexeyev, Eric Nestler, David Reynolds, William Bradley, Vladimir Zlatkovic
  • Patent number: 8792602
    Abstract: A processor implements a network of functional nodes and communication paths between the nodes. The processor includes a plurality of circuit implementations of the functional nodes of the processor; and a plurality of signal paths implementing the communication paths linking the circuit implementations of the nodes. At least some of the signal paths are configured to pass signal values represented according to temporal patterns of signal levels on the signal paths. The processor also includes a plurality of circuit components for conversion between a signal value represented as a signal level (e.g., voltage or current level) and a signal value represented as a temporal pattern.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: July 29, 2014
    Assignee: Analog Devices, Inc.
    Inventors: Jeffrey Bernstein, Benjamin Vigoda, David Reynolds, Alexander Alexeyev, William Bradley
  • Publication number: 20140114443
    Abstract: An inference task is performed using a computation device having a plurality of processing elements operable in parallel and connected via a connectivity system. Performing the task includes accepting at the device a specification of at least part of the inference task. The specification characterizes a plurality of variables and a plurality of factors, each factor being associated with a subset of the variables. Each of the processing elements is configured with data defining one or more of the plurality of factors. At each of the processing elements, computation associated with one of the factors is performed concurrently with other of the processing elements performing computation associated with different ones of the factors. Messages are exchanged via a connectivity system. The messages provide inputs and/or outputs to the processing elements for the computations associated with the factors and provide a result of performing of the at least the part of the inference task.
    Type: Application
    Filed: July 20, 2011
    Publication date: April 24, 2014
    Applicant: Lyric Semiconductor, Inc.
    Inventors: Jeffrey Bernstein, Benjamin Vigoda
  • Publication number: 20140105888
    Abstract: Novel modulators, including antibodies and derivatives thereof, and methods of using such modulators to treat hyperproliferative disorders are provided.
    Type: Application
    Filed: February 17, 2012
    Publication date: April 17, 2014
    Applicant: Stem CentRx, Inc.
    Inventors: Orit Foord, Scott J. Dylla, Robert A. Stull, Alex Bankovich, Alexandra Leida Liana Lazetic, Jeffrey Bernstein
  • Patent number: 8674868
    Abstract: An approach to signal conversion adapts the signal conversion process, for example, by adapting or configuring signal conversion circuitry, according to inferred characteristics (e.g., probability distribution of value) of a signal being converted. As an example, an analog-to-digital converter (ADC) may be adapted so that its accuracy varies across the range of possible input signal values in such a way that on average the digital signal provides a higher accuracy than had the accuracy remained fixed. In another example, models (and corresponding inference circuitry) of both an input signal process and of a quantization process are used to improve signal conversion accuracy.
    Type: Grant
    Filed: June 8, 2012
    Date of Patent: March 18, 2014
    Assignee: Analog Devices, Inc.
    Inventors: Benjamin Vigoda, Jeffrey Bernstein, Martin McCormick
  • Patent number: 8572144
    Abstract: A circuit includes a signal processing circuit for accepting an input and for generating a set of outputs. The input is provided in an input range that has a set of representative values, and each output represents a measure of an association of the input with one or more of the representative values. The signal processing circuit includes a group of output sections, each output section being responsive to the input of the signal processing circuit. Each output section includes one or more sigmoid generators. Each sigmoid generator is responsive to an input of the output section to generate an output that represents a sigmoid function of the input of the output section. Each output section also includes a circuitry for combining the outputs of the one or more sigmoid generators to form one of the set of outputs of the signal processing circuit. An input transformation circuit is coupled to the plurality of output sections.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: October 29, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Benjamin Vigoda, Jeffrey Bernstein, Alexander Alexeyev
  • Patent number: 8458114
    Abstract: Some general aspects relate to systems and methods of analog computation using numerical representation with uncertainty. For example, a specification of a group of variables is accepted, with each variable having a set of at least N possible values. The group of variables satisfies a set of one or more constraints, and each variable is specified as a decomposition into a group of constituents, with each constituent having a set of M (e.g., M<N) possible constituent values that can be determined based on the variable values. The method also includes forming a specification for configuring a computing device that implements a network representation of the constraints based on the specification of the group of variables. The network representation includes a first set of nodes corresponding to the groups of constituents, a second set of nodes corresponding to the set of constraints, and interconnections between the first and the second sets of nodes for passing continuous-valued data.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: June 4, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Benjamin Vigoda, William Bradley, Shawn Hershey, Jeffrey Bernstein
  • Publication number: 20130094298
    Abstract: A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
    Type: Application
    Filed: May 15, 2012
    Publication date: April 18, 2013
    Applicant: Analog Devices, Inc.
    Inventors: Benjamin Vigoda, Eric Nestler, Jeffrey Bernstein, David Reynolds, Alexander Alexeyev, Jeffrey Venuti, William Bradley, Vladimir Ziatkovic
  • Patent number: 8344924
    Abstract: An approach to converting an analog value based on a partition of an input range produces probabilities that the input is found within each of the regions based, for example, on a noisy version of the input. In some examples, iterative and/or pipelined application of comparison circuitry is used to accumulate a set of analog representations of the output probabilities. The circuitry can be adapted or configured according to the characteristics of the degradation (e.g., according to the variance of an additive noise) and/or prior information about the distribution of the clean input (e.g., a distribution over a discrete set of exemplar values, uniformly distributed etc.).
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: January 1, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Benjamin Vigoda, Jeffrey Bernstein, Alexander Alexeyev, William Bradley, Theophane Weber
  • Publication number: 20120313802
    Abstract: An approach to signal conversion adapts the signal conversion process, for example, by adapting or configuring signal conversion circuitry, according to inferred characteristics (e.g., probability distribution of value) of a signal being converted. As an example, an analog-to-digital converter (ADC) may be adapted so that its accuracy varies across the range of possible input signal values in such a way that on average the digital signal provides a higher accuracy than had the accuracy remained fixed. In another example, models (and corresponding inference circuitry) of both an input signal process and of a quantization process are used to improve signal conversion accuracy.
    Type: Application
    Filed: June 8, 2012
    Publication date: December 13, 2012
    Applicant: Analog Devices, Inc.
    Inventors: Benjamin Vigoda, Jeffrey Bernstein, Martin McCormick
  • Publication number: 20120317065
    Abstract: In an aspect, in general, a programmable computation device performs computations of an inference task specified by a plurality of variables and a plurality of factors, each factor being associated with a subset of the variables. The device includes one or more processing elements. Each processing element includes a first storage for a definition of a factor, a second storage for data associated with the inputs and/or outputs of at least some of the computations, and one or more computation units coupled to the first storage and the second storage for performing a succession of parts of the at least some of the computations that are associated with a factor, the succession of parts defined by data in the storage for the definition of the factor.
    Type: Application
    Filed: June 7, 2012
    Publication date: December 13, 2012
    Applicant: Analog Devices, Inc.
    Inventors: Jeffrey Bernstein, Benjamin Vigoda
  • Publication number: 20120194375
    Abstract: An approach to converting an analog value based on a partition of an input range produces probabilities that the input is found within each of the regions based, for example, on a noisy version of the input. In some examples, iterative and/or pipelined application of comparison circuitry is used to accumulate a set of analog representations of the output probabilities. The circuitry can be adapted or configured according to the characteristics of the degradation (e.g., according to the variance of an additive noise) and/or prior information about the distribution of the clean input (e.g., a distribution over a discrete set of exemplar values, uniformly distributed etc.).
    Type: Application
    Filed: April 27, 2011
    Publication date: August 2, 2012
    Applicant: Lyric Semiconductor, Inc.
    Inventors: Benjamin Vigoda, Jeffrey Bernstein, Alexander Alexeyev, William Bradley, Theophane Weber
  • Patent number: 8179731
    Abstract: A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: May 15, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Benjamin Vigoda, Eric Nestler, Jeffrey Bernstein, David Reynolds, Alexander Alexeyev, Jeffrey Venuti, William Bradley, Vladimir Zlatkovic
  • Patent number: 8107306
    Abstract: A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: January 31, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Benjamin Vigoda, Eric Nestler, Jeffrey Bernstein, David Reynolds, Alexander Alexeyev, Jeffrey Venuti, William Bradley, Vladimir Zlatkovic
  • Publication number: 20110255612
    Abstract: A processor implements a network of functional nodes and communication paths between the nodes. The processor includes a plurality of circuit implementations of the functional nodes of the processor; and a plurality of signal paths implementing the communication paths linking the circuit implementations of the nodes. At least some of the signal paths are configured to pass signal values represented according to temporal patterns of signal levels on the signal paths. The processor also includes a plurality of circuit components for conversion between a signal value represented as a signal level (e.g., voltage or current level) and a signal value represented as a temporal pattern.
    Type: Application
    Filed: February 22, 2011
    Publication date: October 20, 2011
    Applicant: Lyric Semiconductor, Inc.
    Inventors: Jeffrey Bernstein, Benjamin Vigoda, David Reynolds, Alexander Alexeyev, William Bradley
  • Patent number: 7991153
    Abstract: Systems and method of encrypting text using glyphs. Implementations of a first method may include receiving text including one or more characters having an order, altering the order of the one or more characters using a mixer cipher to produce one or more mixed characters, and substituting for the one or more mixed characters one or more encrypted characters using a stochastic cipher. The method may further include generating at least one glyph by associating one or more symbols and a position of the one or more symbols within a perimeter of the at least one glyph with the one or more encrypted characters and writing the at least one glyph to a substrate.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: August 2, 2011
    Assignee: Nanoglyph, LLC
    Inventors: John Rao, Jeffrey Bernstein