Patents by Inventor Jeffrey N. Correll

Jeffrey N. Correll has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9983852
    Abstract: Techniques for specifying and implementing programs. A graphical program is created in a graphical specification and constraint language that allows specification of a model of computation and explicit declaration of constraints in response to user input. The graphical program includes a specified model of computation, a plurality of interconnected functional blocks that visually indicate functionality of the graphical program in accordance with the specified model of computation, and specifications or constraints for the graphical program or at least one of the functional blocks in the graphical program. The specified model of computation and specifications or constraints are useable to analyze the graphical program or generate a program or simulation.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: May 29, 2018
    Assignee: National Instruments Corporation
    Inventors: Kaushik Ravindran, Jacob Kornerup, Rhishikesh Limaye, Guang Yang, Guoqiang Wang, Jeffrey N. Correll, Arkadeb Ghosal, Sadia B. Malik, Charles E. Crain, II, Michael J. Trimborn
  • Patent number: 9558099
    Abstract: When compiling high-level, graphical code (e.g. LabVIEW™ code) to a different representation (e.g. different software code or hardware FPGA), information relating to characteristics of the design may be collected/captured from the compilation process, and automatically provided to all the earlier stages of the compilation process to obtain more optimal results. Without automated feedback of this information, users have to manually identify, produce, and provide the feedback information, or forego the process altogether, having to assume that the tool has produced the best possible results when that may not be the case. To correct timing, failed constraints paths may be parsed and compared to delays obtained during a previous compile, and previous adjustments that didn't yield desired results may be undone. The longest delay that didn't result from an undone path may then be identified, and adjusted, and the process may be repeated until all paths are predicted to pass.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: January 31, 2017
    Assignee: National Instruments Corporation
    Inventors: Jeffrey N. Correll, Dustyn K. Blasig, Newton G. Petersen
  • Publication number: 20160350080
    Abstract: Techniques for specifying and implementing programs. A graphical program is created in a graphical specification and constraint language that allows specification of a model of computation and explicit declaration of constraints in response to user input. The graphical program includes a specified model of computation, a plurality of interconnected functional blocks that visually indicate functionality of the graphical program in accordance with the specified model of computation, and specifications or constraints for the graphical program or at least one of the functional blocks in the graphical program. The specified model of computation and specifications or constraints are useable to analyze the graphical program or generate a program or simulation.
    Type: Application
    Filed: August 9, 2016
    Publication date: December 1, 2016
    Inventors: Kaushik Ravindran, Jacob Kornerup, Rhishikesh Limaye, Guang Yang, Guoqiang Wang, Jeffrey N. Correll, Arkadeb Ghosal, Sadia B. Malik, Charles E. Crain, II, Michael J. Trimborn
  • Patent number: 9436438
    Abstract: System and method for specifying and implementing programs. A graphical program is created in a graphical specification and constraint language that allows specification of a model of computation and explicit declaration of constraints in response to user input. The graphical program includes a specified model of computation, a plurality of interconnected functional blocks that visually indicate functionality of the graphical program in accordance with the specified model of computation, and specifications or constraints for the graphical program or at least one of the functional blocks in the graphical program. The specified model of computation and specifications or constraints are useable to analyze the graphical program or generate a program or simulation.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: September 6, 2016
    Assignee: NATIONAL INSTRUMENTS CORPORATION
    Inventors: Kaushik Ravindran, Jacob Kornerup, Rhishikesh Limaye, Guang Yang, Guoqiang Wang, Jeffrey N. Correll, Arkadeb Ghosal, Sadia B. Malik, Charles E. Crain, II, Michael J. Trimborn
  • Patent number: 9335977
    Abstract: System and method for optimizing a data flow diagram based on access pattern information are described. Access pattern information for a data flow diagram may be received. The data flow diagram may include a plurality of interconnected actors, e.g., functional blocks, visually indicating functionality of the data flow diagram. The access pattern information may include one or more of: input pattern information specifying cycles on which tokens are consumed by at least one of the actors, or output pattern information specifying cycles on which tokens are produced by at least one of the actors. A program that implements the functionality of the data flow diagram may be generated based at least in part on the access pattern information.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: May 10, 2016
    Assignee: National Instruments Corporation
    Inventors: Guoqiang Wang, Kaushik Ravindran, Rhishikesh Limaye, Guang Yang, Arkadeb Ghosal, Hugo A. Andrade, John R. Allen, Jacob Kornerup, Ian C. Wong, Jeffrey N. Correll, Michael J. Trimborn
  • Patent number: 9310975
    Abstract: Configuring wires/icons in a diagram. The diagram may be an executable diagram such as a graphical program or a system diagram. The diagram may include a plurality of icons that are connected by wires, and the icons may visually represent functionality of the diagram. The diagram may be executable to perform the functionality. Displaying the diagram may include displaying a first wire in the diagram, where the first wire connects a first icon and a second icon. Data transfer functionality may be specified for the first wire and/or the first or second icon in the diagram. The data transfer functionality may be visually indicated in the diagram, e.g., by appearances of the first icon, the second icon, the first wire, and/or icons displayed proximate to these components of the diagram.
    Type: Grant
    Filed: August 15, 2013
    Date of Patent: April 12, 2016
    Assignee: National Instruments Corporation
    Inventors: Jeffrey N. Correll, David W. Fuller, III, Timothy J. Hayles, John R. Breyer, Jacob Kornerup
  • Publication number: 20150331679
    Abstract: When compiling high-level, graphical code (e.g. LabVIEW™ code) to a different representation (e.g. different software code or hardware FPGA), information relating to characteristics of the design may be collected/captured from the compilation process, and automatically provided to all the earlier stages of the compilation process to obtain more optimal results. Without automated feedback of this information, users have to manually identify, produce, and provide the feedback information, or forego the process altogether, having to assume that the tool has produced the best possible results when that may not be the case. To correct timing, failed constraints paths may be parsed and compared to delays obtained during a previous compile, and previous adjustments that didn't yield desired results may be undone. The longest delay that didn't result from an undone path may then be identified, and adjusted, and the process may be repeated until all paths are predicted to pass.
    Type: Application
    Filed: July 23, 2015
    Publication date: November 19, 2015
    Inventors: Jeffrey N. Correll, Dustyn K. Blasig, Newton G. Petersen
  • Patent number: 9135143
    Abstract: When compiling high-level, graphical code (e.g. LabVIEW™ code) to a different representation (e.g. different software code or hardware FPGA), information relating to characteristics of the design may be collected/captured from the compilation process, and automatically provided to all the earlier stages of the compilation process to obtain more optimal results. Without automated feedback of this information, users have to manually identify, produce, and provide the feedback information, or forego the process altogether, having to assume that the tool has produced the best possible results when that may not be the case. To correct timing, failed constraints paths may be parsed and compared to delays obtained during a previous compile, and previous adjustments that didn't yield desired results may be undone. The longest delay that didn't result from an undone path may then be identified, and adjusted, and the process may be repeated until all paths are predicted to pass.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: September 15, 2015
    Assignee: National Instruments Corporation
    Inventors: Jeffrey N. Correll, Dustyn K. Blasig, Newton G. Petersen
  • Patent number: 9047007
    Abstract: Providing zooming within a system diagram. Initially, a diagram of a system may be displayed. The diagram may include a plurality of icons representing physical components of the system. These plurality of icons may be initially displayed at a first level of magnification. User input to zoom on a first physical component in the diagram may be received. Accordingly, the first physical component may be displayed at a second level of magnification and other ones of the physical components may be displayed at a third level of magnification. The second level of magnification may be greater than the first level of magnification and the third level of magnification may be less than the first level of magnification. Alternatively, or additionally, different representations for various components of the system may be displayed in the diagram during or after the zoom.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: June 2, 2015
    Assignee: National Instruments Corporation
    Inventors: Jeffrey L. Kodosky, David W Fuller, III, Jeffrey N. Correll, Mohammed Kamran Shah, Jacob Kornerup, Timothy J. Hayles, Adam K. Gabbert, Christopher G. Cifra, Jenifer M. Loy, Scott D. Postma, Richard M. Ashby, Charles E. Crain, II
  • Publication number: 20150020043
    Abstract: System and method for specifying and implementing programs. A graphical program is created in a graphical specification and constraint language that allows specification of a model of computation and explicit declaration of constraints in response to user input. The graphical program includes a specified model of computation, a plurality of interconnected functional blocks that visually indicate functionality of the graphical program in accordance with the specified model of computation, and specifications or constraints for the graphical program or at least one of the functional blocks in the graphical program. The specified model of computation and specifications or constraints are useable to analyze the graphical program or generate a program or simulation.
    Type: Application
    Filed: September 29, 2014
    Publication date: January 15, 2015
    Inventors: Kaushik Ravindran, Jacob Kornerup, Rhishikesh Limaye, Guang Yang, Guoqiang Wang, Jeffrey N. Correll, Arkadeb Ghosal, Sadia B. Malik, Charles E. Crain, II, Michael J. Trimborn
  • Patent number: 8887121
    Abstract: System and method for specifying and implementing programs. A graphical program is created in a graphical specification and constraint language that allows specification of a model of computation and explicit declaration of constraints in response to user input. The graphical program includes a specified model of computation, a plurality of interconnected functional blocks that visually indicate functionality of the graphical program in accordance with the specified model of computation, and specifications or constraints for the graphical program or at least one of the functional blocks in the graphical program. The specified model of computation and specifications or constraints are useable to analyze the graphical program or generate a program or simulation.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: November 11, 2014
    Assignee: National Instruments Corporation
    Inventors: Kaushik Ravindran, Jacob Kornerup, Rhishikesh Limaye, Guang Yang, Guoqiang Wang, Jeffrey N. Correll, Arkadeb Ghosal, Sadia B. Malik, Charles E. Crain, II, Michael J. Trimborn
  • Patent number: 8782525
    Abstract: Displaying physical signal routing of a system. A diagram of the system may be displayed. The system may include physical components connected via physical connections and logical components implemented on various ones of the physical components. The diagram may include a plurality of icons connected by wires. At least a first subset of the icons may represent logical elements of the system and wires between the first subset of icons may represent logical connections between corresponding logical elements. User input requesting signal routing information of the system may be received. In response, a signal route corresponding to a first logical connection between a first logical element and a second logical element may be visually indicated.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: July 15, 2014
    Assignee: National Insturments Corporation
    Inventors: Matthew C. Curtis, Jenifer M. Loy, Adam K. Gabbert, Jayson P. Ryckman, Jacob Kornerup, Jeffrey N. Correll, Timothy J. Hayles
  • Patent number: 8726228
    Abstract: System and method for specifying and implementing programs. A graphical program is created in a graphical specification and constraint language that allows specification of a model of computation and explicit declaration of constraints in response to user input. The graphical program includes a specified model of computation, a plurality of interconnected functional blocks that visually indicate functionality of the graphical program in accordance with the specified model of computation, and specifications or constraints for the graphical program or at least one of the functional blocks in the graphical program. The specified model of computation and specifications or constraints are useable to analyze the graphical program or generate a program or simulation.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: May 13, 2014
    Assignee: National Instruments Corporation
    Inventors: Kaushik Ravindran, Guang Yang, Jacob Kornerup, Ian C. Wong, Jeffrey N. Correll, Michael J. Trimborn, Hugo A. Andrade
  • Patent number: 8719774
    Abstract: System and method for specifying and implementing programs. A graphical program is created in a graphical specification and constraint language that allows specification of a model of computation and explicit declaration of constraints in response to user input. The graphical program includes a specified model of computation, a plurality of interconnected functional blocks that visually indicate functionality of the graphical program in accordance with the specified model of computation, and specifications or constraints for the graphical program or at least one of the functional blocks in the graphical program. The specified model of computation and specifications or constraints are useable to analyze the graphical program or generate a program or simulation.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: May 6, 2014
    Assignee: National Instruments Corporation
    Inventors: Guoqiang Wang, Jeffrey N. Correll, Sadia B. Malik, Hugo A. Andrade, Newton G. Petersen, Rhishikesh Limaye, Trung N. Tran, Jacob Kornerup, Kaushik Ravindran, Guang Yang
  • Publication number: 20140101636
    Abstract: When compiling high-level, graphical code (e.g. LabVIEW™ code) to a different representation (e.g. different software code or hardware FPGA), information relating to characteristics of the design may be collected/captured from the compilation process, and automatically provided to all the earlier stages of the compilation process to obtain more optimal results. Without automated feedback of this information, users have to manually identify, produce, and provide the feedback information, or forego the process altogether, having to assume that the tool has produced the best possible results when that may not be the case. To correct timing, failed constraints paths may be parsed and compared to delays obtained during a previous compile, and previous adjustments that didn't yield desired results may be undone. The longest delay that didn't result from an undone path may then be identified, and adjusted, and the process may be repeated until all paths are predicted to pass.
    Type: Application
    Filed: October 8, 2012
    Publication date: April 10, 2014
    Applicant: NATIONAL INSTRUMENTS CORPORATION
    Inventors: Jeffrey N. Correll, Dustyn K. Blasig, Newton G. Petersen
  • Publication number: 20140040855
    Abstract: System and method for optimizing a data flow diagram based on access pattern information are described. Access pattern information for a data flow diagram may be received. The data flow diagram may include a plurality of interconnected actors, e.g., functional blocks, visually indicating functionality of the data flow diagram. The access pattern information may include one or more of: input pattern information specifying cycles on which tokens are consumed by at least one of the actors, or output pattern information specifying cycles on which tokens are produced by at least one of the actors. A program that implements the functionality of the data flow diagram may be generated based at least in part on the access pattern information.
    Type: Application
    Filed: October 9, 2013
    Publication date: February 6, 2014
    Applicant: NATIONAL INSTRUMENTS CORPORATION
    Inventors: Guoqiang Wang, Kaushik Ravindran, Rhishikesh Limaye, Guang Yang, Arkadeb Ghosal, Hugo A. Andrade, John R. Allen, Jacob Kornerup, Ian C. Wong, Jeffrey N. Correll, Michael J. Trimborn
  • Patent number: 8612871
    Abstract: Configuring wires/icons in a diagram. The diagram may be an executable diagram such as a graphical program or a system diagram. The diagram may include a plurality of icons that are connected by wires, and the icons may visually represent functionality of the diagram. The diagram may be executable to perform the functionality. Displaying the diagram may include displaying a first wire in the diagram, where the first wire connects a first icon and a second icon. Data transfer functionality may be specified for the first wire and/or the first or second icon in the diagram. The data transfer functionality may be visually indicated in the diagram, e.g., by appearances of the first icon, the second icon, the first wire, and/or icons displayed proximate to these components of the diagram.
    Type: Grant
    Filed: June 8, 2007
    Date of Patent: December 17, 2013
    Assignee: National Instruments Corporation
    Inventors: Jeffrey N. Correll, David W Fuller, III, Timothy J. Hayles, John R. Breyer, Jacob Kornerup
  • Patent number: 8612870
    Abstract: System and method for distributed execution of a graphical program. A graphical program is displayed on a display of a computer system. Targeted execution of a first graphical program portion of the graphical program on an execution target is graphically specified. The graphical specification includes displaying a visual indication of the specified targeted execution on the display of the graphical program. During execution of the graphical program, the first graphical program portion executes on the specified execution target and a remainder of the graphical program executes on a default execution target.
    Type: Grant
    Filed: August 26, 2010
    Date of Patent: December 17, 2013
    Assignee: National Instruments Corporation
    Inventors: Jeffrey L. Kodosky, David W Fuller, III, Timothy J. Hayles, Jeffrey N. Correll, John R. Breyer, Jacob Komerup, Darshan K. Shah, Aljosa Vrancic
  • Publication number: 20130332864
    Abstract: Configuring wires/icons in a diagram. The diagram may be an executable diagram such as a graphical program or a system diagram. The diagram may include a plurality of icons that are connected by wires, and the icons may visually represent functionality of the diagram. The diagram may be executable to perform the functionality. Displaying the diagram may include displaying a first wire in the diagram, where the first wire connects a first icon and a second icon. Data transfer functionality may be specified for the first wire and/or the first or second icon in the diagram. The data transfer functionality may be visually indicated in the diagram, e.g., by appearances of the first icon, the second icon, the first wire, and/or icons displayed proximate to these components of the diagram.
    Type: Application
    Filed: August 15, 2013
    Publication date: December 12, 2013
    Applicant: NATIONAL INSTRUMENTS CORPORATION
    Inventors: Jeffrey N. Correll, David W. Fuller, III, Timothy J. Hayles, John R. Breyer, Jacob Kornerup
  • Patent number: 8555243
    Abstract: System and method for specifying and implementing programs. A graphical program is created in a graphical specification and constraint language that allows specification of a model of computation and explicit declaration of constraints in response to user input. The graphical program includes a specified model of computation, a plurality of interconnected functional blocks that visually indicate functionality of the graphical program in accordance with the specified model of computation, and specifications or constraints for the graphical program or at least one of the functional blocks in the graphical program. The specified model of computation and specifications or constraints are useable to analyze the graphical program or generate a program or simulation.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: October 8, 2013
    Assignee: National Instruments Corporation
    Inventor: Jeffrey N. Correll