Doping Control In Crystal Growth Patents (Class 148/DIG41)
  • Patent number: 5789273
    Abstract: After a compound semiconductor layer including InP is formed on a semiconductor substrate, a compound semiconductor layer including As is epitaxially grown by metal organic chemical vapor deposition method using an organic As as the material for feeding the As.
    Type: Grant
    Filed: March 21, 1996
    Date of Patent: August 4, 1998
    Assignee: Sony Corporation
    Inventor: Tadashi Yamamoto
  • Patent number: 5705408
    Abstract: A semiconductor integrated circuit device including: an off-substrate having a semiconductor surface with a plurality of steps each having a height of one monolayer and extending in one direction; a wiring layer formed on the semiconductor surface of the off-substrate and made of semiconductor material, the wiring layer including a plurality of conductive stripe regions and high resistance strip regions disposed in a stripe pattern, each stripe region extending in a direction parallel with the steps, and the conductive stripe regions and the high resistance stripe regions both having lattice structures identical to those of underlying surfaces; and semiconductor elements formed on the wiring layer and electrically connected to the conductive stripe regions, the semiconductor elements including semiconductor regions with lattice structures identical to those of the conductive stripe regions.
    Type: Grant
    Filed: September 25, 1996
    Date of Patent: January 6, 1998
    Assignee: Fujitsu Limited
    Inventors: Toshihiko Mori, Yoshiaki Nakata
  • Patent number: 5432121
    Abstract: An all epitaxial process performed entirely in a CVD reactor is employed to grow epitaxial layers with accurately controlled successively low and high dopant concentrations over a heavily doped substrate, eliminating the need for a separate diffusion, even for high purity concentrations. After purging the reactor system, the heavily doped silicon substrate is "capped" by growing two successive very thin silicon sublayers of the same conductivity type. The reactor chamber is subjected to a hydrogen purge to deplete any contaminents after each sublayer is formed. The cap sublayers form a narrow, abrupt intrinsic transition region with the substrate and become an active part of the device structure. A lightly doped epitaxial layer is grown over the "capped" substrate so that a depletion region can be formed in the device under suitable reverse bias. A heavily doped epitaxial layer is then grown over the lightly doped epitaxial layer.
    Type: Grant
    Filed: May 16, 1994
    Date of Patent: July 11, 1995
    Assignee: GI Corporation
    Inventors: Joseph Chan, Dennis Garbis, Lawrence Laterza, Gregory Zakaluk
  • Patent number: 5354708
    Abstract: The concentration of N acceptors in an as-grown epitaxial layer of a II-VI semiconductor compound is enhanced by the use of tertiary butyl amine as the dopant carrier, and is further enhanced by the use of photo-assisted growth using illumination whose wavelength is at least above the bandgap energy of the compound at the growth temperature.
    Type: Grant
    Filed: July 14, 1993
    Date of Patent: October 11, 1994
    Inventors: Nikhil R. Taskar, Babar A. Khan, Donald R. Dorman
  • Patent number: 5294564
    Abstract: The invention pertains to the field of fabrication, by vapor phase deposition, of the thin layers of monocrystalline, polycrystalline or amorphous material on a substrate having an identical or different nature. The aim is to provide a method, enabling this structure to be made, that includes a modulation of both the composition and the doping, in a direction that is not perpendicular to the surface of the substrate, notably in a lateral way to obtain a planar technology. According to the invention, this thin layer is made by conformal epitaxy, using a crystalline seed in gas phase, between two confinement layers made of a distinct material in such a way that there can be neither nucleation nor deposition of semiconductive material on the surfaces of said confinement layers and wherein the variation of the gaseous mixture of said gas phase is controlled to obtain said modulation of the composition and/or of the doping of said thin film.
    Type: Grant
    Filed: March 8, 1993
    Date of Patent: March 15, 1994
    Assignee: Thomson-CSF
    Inventors: Leonidas Karapiperis, Didier Pribat
  • Patent number: 5273931
    Abstract: Epitaxial layers of N-doped II-VI semiconductor compounds are grown on GaAs substrates by MOCVD using FME. Separating the growth and doping by alternating introduction of (1) the semiconductor cation and anion and (2) the cation and the dopant increases the level of doping, the level of activation, and the crystal quality.
    Type: Grant
    Filed: June 4, 1992
    Date of Patent: December 28, 1993
    Assignee: North American Philips Corporation
    Inventors: Nikhil Taskar, Babar A. Khan, Donald R. Dorman
  • Patent number: 5252512
    Abstract: GaAs films compensated with TEOV to reduce free electron concentration are grown having superior morphology by heating the TEOV above the temperature used in the prior art, filtering the other constituents but not the TEOV, and reducing the arsenic ambient during the preliminary heating phase.
    Type: Grant
    Filed: October 19, 1992
    Date of Patent: October 12, 1993
    Assignee: United Technologies Corporation
    Inventors: Alexander J. Shuskus, Melvyn E. Cowher
  • Patent number: 5177025
    Abstract: A method of fabricating a semiconductor device to retard diffusion of a dopant from a center active region into adjacent regions. The center active region is epitaxially formed by selectively increasing and decreasing an introduction of diffusion-suppressing material, preferably germanium, into a semiconductor material, preferably silicon, so that a vertical profile of the content of the diffusion-suppressing material is such that outdiffusion of a dopant is minimized. One embodiment of the tailoring is to increase the concentration of the diffusion-suppressing material at both of the opposed sides of a base region of a bipolar transistor, thereby providing concentration peaks at the interfaces of the base region with collector and emitter regions. The concentration of germanium in a Si.sub.1-x Ge.sub.x layer is such that the value x is within the range 0.08 to 0.35 and optimally within the range 0.15 to 0.31. The dopant, preferably boron, also has a tailored concentration profile to minimize outdiffusion.
    Type: Grant
    Filed: January 24, 1992
    Date of Patent: January 5, 1993
    Assignee: Hewlett-Packard Company
    Inventors: John E. Turner, Theodore I. Kamins, Martin P. Scott, Yvonne H. Keller
  • Patent number: 5154796
    Abstract: The present invention relates to giant grains or single crystals of chromium. Hitherto, since single crystals of chromium were generally obtained by a floating zone method, it was difficult to obtain an optionally shaped chromium single crystal. The present invention has been made in order to overcome these problems and provides a process for producing single crystals of chromium by secondary recrystallization. That is, it has been found that control of the amount of impurities present in a chromium component such as, for example, Co, Ti, Al, Si, and Ca, has a good influence on the formation of single crystals of chromium. For example, if chromium to which the above-described Ti, Al, Si, and Ca have been added in an amount of from 0.0002 wt % to 0.1 wt %, calculated as oxides thereof, or to which from 0.01 to 3 wt % of Co has further been added, is sintered and the resulting chromium molding is heated treated, single crystals of chromium having a complicated shape can be obtained.
    Type: Grant
    Filed: May 24, 1991
    Date of Patent: October 13, 1992
    Assignee: Tosoh Corporation
    Inventors: Tsutomu Kuniya, Koichi Hanawa, Hiroshi Tanaka, Shinji Sekine
  • Patent number: 5128275
    Abstract: A method for fabricating a compound semiconductor device having a semi-insulating layer of a group III-V compound semiconductor material that contains arsenic as a group V element. The method includes a step of growing the semi-insulating layer from a source gas of the group V element that contains both arsine and an organic compound of arsenic, wherein arsine and the organic compound of arsenic are used simultaneously with a mixing ratio to achieve a desired high resistivity in the semi-insulating layer.
    Type: Grant
    Filed: January 25, 1991
    Date of Patent: July 7, 1992
    Assignee: Fujitsu Limited
    Inventors: Masahiko Takikawa, Tadao Okabe, Toshihide Kikkawa
  • Patent number: 5124278
    Abstract: The present invention addresses the use of metalorganic amines as metallic donor source compounds in reactive deposition applications. More specifically, the present invention addresses the use of the amino-substituted metallic donor source compounds M(NR.sub.2).sub.3-x H.sub.x, where R is organic, alkyl or fluoroalkyl, and x is less than or equal to 2, and M=As, Sb or P, in processes requiring deposition of the corresponding element. These uses include a number of different processes; the metalorganic vapor phase epitaxy of compound semiconductor material such as GaAs, InP, AlGaAs, etc.; doping of SiO.sub.2 or borosilicate based glasses to enhance the reflow properties of the glass; in-situ n-type doping of silicon epitaxial material; sourcing of arsenic or phosphorus for ion implantation; chemical beam epitaxy (or MOMBE); and diffusion doping into electronic materials such as silicon dioxide, silicon and polycrystalline silcon.
    Type: Grant
    Filed: September 21, 1990
    Date of Patent: June 23, 1992
    Assignee: Air Products and Chemicals, Inc.
    Inventors: David A. Bohling, Gregory T. Muhr, Sherri L. Bassner
  • Patent number: 5106763
    Abstract: A method and apparatus for producing crystalline substrates for use in fabricating solid state electronic devices. A hollow crystalline body is grown from a melt containing a dopant and a P-N junction is formed in said crystalline body as it is being grown. Then the hollow body is severed to provide individual solar cell substrates.
    Type: Grant
    Filed: November 15, 1988
    Date of Patent: April 21, 1992
    Assignee: Mobil Solar Energy Corporation
    Inventors: Balakrishnan R. Bathey, Mary C. Cretalla, Aaron S. Taylor
  • Patent number: 5068204
    Abstract: A blue light emitting diode which has a multiple layer structure and is grown on a semiconductor crystalline substrate, wherein zinc of a group II element of the periodic table, lithium, sodium, or potassium of group VI elements are used. These elements and their compounds are used as impurities to be introduced into the construction when it is at the condition of vapor growing. A blue light emitting diode has a pair of Ohmic electrodes, an n-type semiconductor layer and a p-type semiconductor layer. These layers are grown from a vapor phase on the substrate and sandwiched between the electrodes.
    Type: Grant
    Filed: March 25, 1988
    Date of Patent: November 26, 1991
    Assignee: Misawa Co. Ltd.
    Inventors: Hiroshi Kukimoto, Iwao Mitsuishi, Takashi Yasuda
  • Patent number: 5047365
    Abstract: A heterostructure bipolar transistor is formed by a process of steps of holding an N-type gallium arsenide body using as an emitter region in a high vacuum of 10.sup.-9 torr to 10.sup.-13 torr at a first temperature of 400.degree. C. to 1,000.degree. C. where arsenic on a surface of the gallium arsenide body drifts away, lowering the first temperature to a second temperature of 300.degree. C. to 400.degree. C. to start a molecular beam epitaxial growth of a germanium, and forming an N-type germanium layer using as a collector region.
    Type: Grant
    Filed: March 27, 1989
    Date of Patent: September 10, 1991
    Assignee: NEC Corporation
    Inventors: Masafumi Kawanaka, Jun'ichi Sone, Tooru Kimura
  • Patent number: 5028561
    Abstract: P-type doping of a molecular beam epitaxy (MBE) grown substrate composed of a Group II-VI combination is accomplished by forming a flux from a Group II-V combination, and applying the flux to the substrate at a pressure less than about 10.sup.-6 atmosphere. The Group II material is selected from Zn, Cd, Hg and Mg, the Group V material from As, Sb and P, and the Group VI material from S, Se and Te. The Group II-V dopant combination is preferably provided as a compound formed predominantly from the Group II material, and having the formulation X.sub.3 Y.sub.2, where X is the Group II material and Y is the Group V material. The doping concentration is controlled by controlling the temperature of the Group II-V combination. Metal vacancies in the lattice structure are tied up by the Group II constituent of the dopant combination, leaving the Group V dopant available to enter the Group VI sublattice and produce a p-type doping.
    Type: Grant
    Filed: June 15, 1989
    Date of Patent: July 2, 1991
    Assignee: Hughes Aircraft Company
    Inventors: G. Sanjiv Kamath, Owen K. Wu
  • Patent number: 5026661
    Abstract: A method of growing zinc chalcogenide in an atmosphere which contains the vapor of di-.pi.-cyclopentadienyl manganese or di-.pi.-alkyl cyclopentadienyl manganese that serves as a source of manganese. By growing zinc chalcogenide in the above atmosphere, there is obtained a manganese-doped zinc chalcogenide having a very high crystal quality, which is very suitable for the active layer in light emitting devices.
    Type: Grant
    Filed: October 13, 1989
    Date of Patent: June 25, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Masahito Migita, Osamu Kanehisa, Masatoshi Shiiki, Hajime Yamamoto
  • Patent number: 5024967
    Abstract: A process is described for making semiconductor devices with highly controlled doping profiles. The process involves minimizing or eliminating segregation effects caused by surface electric fields created by Fermi-level pinning. These electric fields act on dopant ions and cause migration from the original deposition site of the doplant ions. Dopant ions are effectively shielded from the surface electric fields by illumination of the growth surfaces and by background doping. Also, certain crystallographic directions in certain semiconductors do not show Fermi-level pinning and lower growth temperatures retard or eliminate segregation effects. Devices are described which exhibit enhanced characteristics with highly accurate and other very narrow doping profiles.
    Type: Grant
    Filed: June 30, 1989
    Date of Patent: June 18, 1991
    Assignee: AT&T Bell Laboratories
    Inventors: Rose F. Kopf, J. M. Kuo, Henry S. Luftman, Erdmann F. Schubert
  • Patent number: 4999315
    Abstract: High resistivity In-based compound Group III-V epitaxial layers are used to prevent substantial current flow through a region of a semiconductor device, such as a CSBH, DCPBH, EMBH or CMBH laser, a LED, a photodiode, a HBT, or a FET. Also disclosed is a hydride VPE process for making the high resistivity material doped with Fe. The Fe is supplied by a volatile halogenated Fe compound, and the extend of pyrolysis of the hydride is limited to allow transport of sufficient dopant to the growth area.
    Type: Grant
    Filed: December 15, 1989
    Date of Patent: March 12, 1991
    Assignee: AT&T Bell Laboratories
    Inventors: Wilbur D. Johnston, Jr., Robert F. Karlicek, Jr., Judith A. Long, Daniel P. Wilt
  • Patent number: 4988640
    Abstract: The present invention addresses the use of at least partially fluorinated organometallic compounds in reactive deposition applications. More specifically, the present invention addresses the use of the fluoroorganometallic compounds M(CF.sub.3).sub.3, or any M(C.sub.n F.sub.(2n+1)).sub.3-y H.sub.y compound where (y.ltoreq.2), M(CH.sub.2 CF.sub.3).sub.3 or any fluoroalkyl organometallics of the general formula M(C.sub.n H.sub.[(2n+1)-x] F.sub.x).sub.3-y H.sub.y, where y.ltoreq.2; x has a value 1.ltoreq.x.ltoreq.2n+1; and M=As, P, or Sb, in processes requiring deposition of the corresponding element. These uses include a number of different processes; the organometallic vapor phase epitaxy of compound semiconductor materials such as GaAs, InP, AlGaAs, InSb, etc. doping of SiO.sub.
    Type: Grant
    Filed: November 6, 1989
    Date of Patent: January 29, 1991
    Assignee: Air Products and Chemicals, Inc.
    Inventors: David A. Bohling, Gregory T. Muhr, David A. Roberts
  • Patent number: 4952527
    Abstract: A new III-IV buffer material is described which is produced by low temperature growth of III-V compounds by MBE that has unique and desirable properties, particularly for closely spaced, submicron gate length active III-V semiconductor devices, such as HEMT's, MESFET's and MISFET's. In the case of the III-V material, GaAs, the buffer is grown under arsenic stable growth conditions, at a growth rate of 1 micron/hour, and at a substrate temperature preferably in the range of 150 to about 300.degree. C. The new material is crystalline, highly resistive, optically inactive, and can be overgrown with high quality III-V active layers.
    Type: Grant
    Filed: February 19, 1988
    Date of Patent: August 28, 1990
    Assignee: Massachusetts Institute of Technology
    Inventors: Arthur R. Calawa, Frank W. Smith, Michael J. Manfra, Chang-Lee Chen
  • Patent number: 4939102
    Abstract: 36 We have discovered the III-V semiconductor layers with previously unattainably high effective hole concentrations can be produced by molecular growth processes (e.g. MBE) if an amphoteric dopant such as Be is used and if, during the growth of the highly doped III-V layer, the substrate is maintained at a temperature T.sub.g that is substantially lower than customarily used. For instance, a InGaAs layer with effective hole concentration 1.0.times.10.sup.20 cm.sup.-3 was grown at T.sub.g =450.degree. C., and a GaAs layer with effective hole concentration of 1.0.times.10.sup.20 cm.sup.-3 was grown at T.sub.g of 475.degree. C. The heavily doped III-V layers can be of device grade and can usefully be part of electronic devices such as high speed bipolar transistors.
    Type: Grant
    Filed: January 17, 1989
    Date of Patent: July 3, 1990
    Assignee: American Telephone and Telegraph Company
    Inventors: Robert A. Hamm, Roger J. Malik, Morton B. Panish, John F. Walker
  • Patent number: 4935381
    Abstract: Disclosed is a novel method to use arsine plus an alkylarsenic co-reagent to grow GaAs by OMCVD that not only allows one to take advantage of the lower toxicity and ease of decomposition of the alkylarsenic compounds, but also reduces the carbon contamination normally found in epilayers grown exclusively from these alkylarsines, and decreases the amount of arsine needed for growth of reasonably good quality GaAs epilayers.
    Type: Grant
    Filed: December 9, 1988
    Date of Patent: June 19, 1990
    Assignee: The Aerospace Corporation
    Inventors: Donna M. Speckman, Jerry P. Wendt
  • Patent number: 4904618
    Abstract: Non-equilibrium impurity incorporation is used to dope hard-to-dope crystals of wide band gap semiconductors, such as zinc selenide and zinc telluride. This involves incorporating into the crystal a compensating pair of primary and secondary dopants, thereby to increase the solubility of either dopant alone in the crystals. Thereafter, the secondary more mobile dopant is removed preferentially, leaving the primary dopant predominant. This technique is used to dope zinc selenide p-type by the use of nitrogen as the primary dopant and lithium as the secondary dopant.
    Type: Grant
    Filed: August 22, 1988
    Date of Patent: February 27, 1990
    Inventor: Gertrude F. Neumark
  • Patent number: 4883770
    Abstract: A molecular beam epitaxy (MBE) process in which some portions of the substrate are shadowed by a shadow mask from receiving at least one of the molecular beams used in the MBE process. This process is capable of producing NIPI superlattices that have selective contacts that are far superior to those which can be produced at present. This technique can also produce a wide variety of NIPI devices as well as other types of IC structures.
    Type: Grant
    Filed: January 17, 1989
    Date of Patent: November 28, 1989
    Assignee: Hewlett-Packard Company
    Inventors: Gottfried H. Dohler, Ghulam Hasnain, Jeffrey N. Miller
  • Patent number: 4882300
    Abstract: The present invention relates to a method of forming a single crystalline magnesia spinel film on a single crystalline silicon substrate by the use of the vapor-phase epitaxial method.According to the method of the present invention, at first a first single crystalline magnesia spinel layer having a compositional ratio of magnesium maintained at a nearly stoichiometric compositional ratio is epitaxially grown in a vapor-phase on the single crystalline silicon substrate, and then a second single crystalline magnesia spinel layer having a compositional ratio of magnesium which decreases upward is epitaxially grown in a vapor-phase on the first single crystalline magnesia spinel layer. In the event that a Si film is grown on the single crystalline magnesia spinel film formed by the method of the present invention, out of atoms of Mg and Al taken in the Si film in the initial growth stage of the Si film, a concentration of Mg atoms which react more actively upon Si can be reduced.
    Type: Grant
    Filed: October 6, 1988
    Date of Patent: November 21, 1989
    Assignee: Agency of Industrial Science and Technology
    Inventors: Yasunori Inoue, Hiroshi Hanafusa
  • Patent number: 4865655
    Abstract: An epitaxial wafer for producing arrays of GaAsP-LEDs comprises, in the GaAs.sub.1-x P.sub.x layer with varying X, a layer region(s) with a discontinuous variance of x along the thickness of the GaAs.sub.1-x P.sub.x layer. This layer region(s) contribute to a uniformity in the brightness of the light emission of LEDs formed in the epitaxial wafer.
    Type: Grant
    Filed: November 18, 1987
    Date of Patent: September 12, 1989
    Assignees: Mitsubishi Monsanto Chemical Co., Ltd., Mitsubishi Chemical Industries, Ltd.
    Inventors: Hisanori Fujita, Masaaki Kanayama, Takeshi Okano
  • Patent number: 4859625
    Abstract: A method for epitaxial growth of compound semiconductor containing three component elements, two component elements thereof being the same group elements, in which three kinds of compound gases each containing different one of the three component elements are cyclically introudced, under a predetermined pressure for a predetermined period respectively, onto a substrate enclosed in an evacuated crystal growth vessel so that a single crystal thin film of the compound semiconductor is formed on the substrate.
    Type: Grant
    Filed: November 20, 1987
    Date of Patent: August 22, 1989
    Assignee: Research Development Corporation of Japan, Junichi Nishizawa and Oki Electric Industry Co., Ltd.
    Inventor: Fumio Matsumoto
  • Patent number: 4855250
    Abstract: A method of manufacturing a semiconductor light emitting device by forming a compound semiconductor structure with homo- or heterojunction therein having a first p-type compound semiconductor crystal layer at the top of the structure, growing a second p-type compound semiconductor crystal layer on the structure in a reactor, wherein, before the beginning of the crystal growth step, a p-type dopant is caused to flow into the reactor in which the structure is placed. In some embodiments, the flow of the p-type dopant continues after the completion of the crystal growth.
    Type: Grant
    Filed: December 28, 1987
    Date of Patent: August 8, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Motoyuki Yamamoto, Yasuhiko Tsuburai
  • Patent number: 4847216
    Abstract: The process consists of depositing at least one layer of a doped material on a heated substrate placed in an enclosure, subjecting the substrate surface to the action of a molecular flux of the material, to the action of a doping particle beam and to the action of an electron beam.
    Type: Grant
    Filed: April 18, 1988
    Date of Patent: July 11, 1989
    Assignee: Centre National d'Etudes des Telecommunications
    Inventors: Francois A. d'Avitaya, Yves Campidelli
  • Patent number: 4839307
    Abstract: A semiconductor laser having an internal current restriction includes a (100) face-oriented p-type GaAs substrate treated to have a groove or difference in level having an (n11) A face (n=1-5) as an inclined surface. An AlGaAs: Si layer, an AlGaAs:Be cladding layer, an AlGaAs active layer, and an AlGaAs:Sn cladding layer are grown on the substrate in the order mentioned. Since the Si acts as an n-type material on the (100) face and as a p-type material on the (n11) face, the AlGaAs:Si layer becomes a p-type layer solely in the groove, and it is in this portion that a current path is formed. The laser can be fabricated by molecular-beam epitaxy applied in a single step.
    Type: Grant
    Filed: May 11, 1987
    Date of Patent: June 13, 1989
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Koichi Imanaka, Hiroshi Imamoto
  • Patent number: 4830982
    Abstract: Semi-insulating epitaxial layers of Group III-V based semiconductor compounds are produced by a MOCVD process through the use of organic titanium-based compounds. Resistivities greater than 1.times.10.sup.7 ohm/cm have been achieved.
    Type: Grant
    Filed: June 4, 1987
    Date of Patent: May 16, 1989
    Assignees: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: Andrew G. Dentai, Charles H. Joyner, Jr., Timothy W. Weidman, John L. Zilko
  • Patent number: 4707216
    Type: Grant
    Filed: January 24, 1986
    Date of Patent: November 17, 1987
    Assignee: University of Illinois
    Inventors: Hadis Morkoc, Russ Fischer
  • Patent number: 4705591
    Abstract: Silicon crystals with high and controlled predictable carbon content can be grown by controlling oxygen introduced into the pulling chamber during the melting in standard Czochralski silicon crystal pullers.Carbon concentration profile of grown crystals can be deduced from the carbon monoxide [CO] concentration real time monitoring, through its integral taken during the whole pulling duration. This process is reproducible, and the carbon content in the silicon is consistent. Means to practice this method are also disclosed.
    Type: Grant
    Filed: December 6, 1985
    Date of Patent: November 10, 1987
    Assignee: International Business Machines Corporation
    Inventors: Jean-Francois Carle, Patrick Phillippot
  • Patent number: 4591409
    Abstract: The disclosure relates to a method for producing single crystal silicon from a polycrystalline silicon melt wherein dopants such as oxygen and nitrogen are uniformly distributed in the crystal both along the crystal axis and radially therefrom. This is accomplished by identifying the correct species in the melt and above the melt and determining the thermochemical equilibrium between the two chemical species which lead to a change of the composition of the silicon single crystal during the entire growth process. This approach effectively circumvents the segregation coefficient during the growth process through the control of the concentration of the dopants in the melt.
    Type: Grant
    Filed: May 3, 1984
    Date of Patent: May 27, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Eva A. Ziem, Graydon B. Larrabee, David E. Witter