Etching Inorganic Substrate Patents (Class 216/74)
- Etching of substrate containing at least one compound having at least one oxygen atom and at least one metal atom (Class 216/76)
- Etching of substrate containing elemental aluminum, or an alloy or compound thereof (Class 216/77)
- Etching of substrate containing elemental copper, or an alloy or compound thereof (Class 216/78)
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Patent number: 9039909Abstract: There is provided a plasma etching method for forming a hole in a silicon oxide film formed on an etching stopper layer. The plasma etching method includes a main etching process for etching the silicon oxide film; and an etching process that is performed when at least a part of the etching stopper layer is exposed after the main etching process. The etching process includes a first etching process using a gaseous mixture of a C4F6 gas, an Ar gas and an O2 gas as the processing gas; and a second etching process using a gaseous mixture of a C4F8 gas, an Ar gas and an O2 gas or a gaseous mixture of a C3F8 gas, an Ar gas and an O2 gas as the processing gas. The first etching process and the second etching process are alternately performed plural times.Type: GrantFiled: February 27, 2012Date of Patent: May 26, 2015Assignee: TOKYO ELECTRON LIMITEDInventors: Akira Nakagawa, Yuji Otsuka
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Patent number: 9011707Abstract: An etching method that uses an etch reactant retained within at least a semi-solid media (120, 220, 224, 230). The etch reactant media is applied to selectively etch a surface layer (106, 218, 222). The etch reactant media may be applied to remove metal shorts (222), smearing and eaves resulting from CMP or in failure analysis for uniform removal of a metal layer (218) without damaging the vias, contact, or underlying structures.Type: GrantFiled: July 16, 2013Date of Patent: April 21, 2015Assignee: Texas Instruments IncorporatedInventor: Darwin Rusli
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Patent number: 8999856Abstract: A method of selectively etching silicon nitride from a substrate comprising a silicon nitride layer and a silicon oxide layer includes flowing a fluorine-containing gas into a plasma generation region of a substrate processing chamber and applying energy to the fluorine-containing gas to generate a plasma in the plasma generation region. The plasma comprises fluorine radicals and fluorine ions. The method also includes filtering the plasma to provide a reactive gas having a higher concentration of fluorine radicals than fluorine ions and flowing the reactive gas into a gas reaction region of the substrate processing chamber. The method also includes exposing the substrate to the reactive gas in the gas reaction region of the substrate processing chamber. The reactive gas etches the silicon nitride layer at a higher etch rate than the reactive gas etches the silicon oxide layer.Type: GrantFiled: March 9, 2012Date of Patent: April 7, 2015Assignee: Applied Materials, Inc.Inventors: Jingchun Zhang, Anchuan Wang, Nitin Ingle
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Patent number: 8986493Abstract: When a substrate is etched by using a processing gas including a first gas containing halogen and carbon and having a carbon number of two or less per molecule, while supplying the processing gas toward the substrate independently from a central and a peripheral portion of a gas supply unit, which face the central and the periphery part of the substrate respectively, the processing gas is supplied such that a gas flow rate is greater in the central portion than in the peripheral portion. When the substrate is etched by using a processing gas including a second gas containing halogen and carbon and having a carbon number of three or more per molecule, the processing gas is supplied such that a gas flow rate is greater in the peripheral portion than in the central portion.Type: GrantFiled: December 18, 2012Date of Patent: March 24, 2015Assignee: Tokyo Electron LimitedInventors: Shigeru Tahara, Masaru Nishino
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Patent number: 8975190Abstract: A plasma processing method includes a surface improving step of improving a surface of the photoresist film by performing plasma processing using a hydrogen-containing gas as a processing gas and an etching step of etching the SiON film by performing plasma processing using a processing gas including a gas containing a CHF-based gas and a chlorine-containing gas while using as a mask the photoresist film having the improved surface.Type: GrantFiled: September 25, 2013Date of Patent: March 10, 2015Assignee: Tokyo Electron LimitedInventor: Ryoichi Yoshida
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Patent number: 8932406Abstract: The molecular etcher carbonyl fluoride (COF2) or any of its variants, are provided for, according to the present invention, to increase the efficiency of etching and/or cleaning and/or removal of materials such as the unwanted film and/or deposits on the chamber walls and other components in a process chamber or substrate (collectively referred to herein as “materials”). The methods of the present invention involve igniting and sustaining a plasma, whether it is a remote or in-situ plasma, by stepwise addition of additives, such as but not limited to, a saturated, unsaturated or partially unsaturated perfluorocarbon compound (PFC) having the general formula (CyFz) and/or an oxide of carbon (COx) to a nitrogen trifluoride (NF3) plasma into a chemical deposition chamber (CVD) chamber, thereby generating COF2. The NF3 may be excited in a plasma inside the CVD chamber or in a remote plasma region upstream from the CVD chamber.Type: GrantFiled: March 15, 2013Date of Patent: January 13, 2015Assignee: Matheson Tri-Gas, Inc.Inventors: Glenn Mitchell, Ramkumar Subramanian, Carrie L. Wyse, Robert Torres, Jr.
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Patent number: 8921232Abstract: A method of taper-etching a layer to be etched that is made of a dielectric material and has a top surface. The method includes the steps of: forming an etching mask with an opening on the top surface of the layer to be etched; and taper-etching a portion of the layer to be etched, the portion being exposed from the opening, by reactive ion etching so that a groove having two wall faces intersecting at a predetermined angle is formed in the layer to be etched. The step of taper-etching employs an etching gas containing a first gas contributing to the etching of the layer to be etched and a second gas contributing to the deposition of a sidewall protective film, and changes, during the step, the ratio of the flow rate of the second gas to the flow rate of the first gas so that the ratio increases.Type: GrantFiled: February 25, 2014Date of Patent: December 30, 2014Inventors: Hironori Araki, Yoshitaka Sasaki, Hiroyuki Ito, Shigeki Tanemura
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Patent number: 8916477Abstract: Provided are methods and systems for removing polysilicon on a wafer. A wafer can include a polysilicon layer and an exposed nitride and/or oxide structure. An etchant with a hydrogen-based species, such as hydrogen gas, and a fluorine-based species, such as nitrogen trifluoride, can be introduced. The hydrogen-based species and the fluorine-based species can be activated with a remote plasma source. The layer of polysilicon on the wafer can be removed at a selectivity over the exposed nitride and/or oxide structure that is greater than about 500:1.Type: GrantFiled: June 12, 2013Date of Patent: December 23, 2014Assignee: Novellus Systems, Inc.Inventors: Bayu Thedjoisworo, Jack Kuo, David Cheung, Joon Park
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Patent number: 8900469Abstract: A method and apparatus for etching a photomask substrate with enhanced process monitoring is provided. In one embodiment, a method of determining an etching endpoint includes performing an etching process on a first tantalum containing layer through a patterned mask layer, directing a radiation source having a first wavelength from about 200 nm and about 800 nm to an area uncovered by the patterned mask layer, collecting an optical signal reflected from the area covered by the patterned mask layer, analyzing a waveform obtained the reflected optical signal reflected from the substrate from a first time point to a second time point, and determining a first endpoint of the etching process when a slope of the waveform is changed about 5 percent from the first time point to the second time point.Type: GrantFiled: July 6, 2012Date of Patent: December 2, 2014Assignee: Applied Materials, Inc.Inventor: Michael Grimbergen
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Patent number: 8883650Abstract: The present invention provides a method of removing oxides. First, a substrate having the oxides is loaded into a reaction chamber, which includes a susceptor setting in the bottom portion of the chamber, a shower head setting above the susceptor, and a heater setting above the susceptor. Subsequently, an etching process is performed. A first thermal treatment process is then carried out. Finally, a second thermal treatment process is carried out, and a reaction temperature of the second thermal treatment process is higher than a reaction temperature of the first thermal treatment process.Type: GrantFiled: January 24, 2008Date of Patent: November 11, 2014Assignee: United Microelectronics Corp.Inventors: Kuo-Chih Lai, Yi-Wei Chen, Nien-Ting Ho, Teng-Chun Tsai
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Patent number: 8869376Abstract: A substrate mounting table includes a plate shaped member provided with a mounting surface for mounting a substrate thereon, a plurality of gas injection openings opened on the mounting surface to supply a gas toward the mounting surface, and a gas supply channel for supplying the gas through the gas injection openings; and a thermally sprayed ceramic layer covering the mounting surface. At least inner wall portions of the gas supply channel are formed in curved surface shapes, the inner wall portions facing the gas injection openings.Type: GrantFiled: July 18, 2013Date of Patent: October 28, 2014Assignee: Tokyo Electron LimitedInventors: Takehiro Ueda, Yoshiyuki Kobayashi, Kaoru Oohashi
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Patent number: 8790529Abstract: A gas supply system for supplying a gas into a processing chamber for processing a substrate to be processed includes: a processing gas supply unit; a processing gas supply line; a first and a second branch line; a branch flow control unit; an additional gas supply unit; an additional gas supply line; and a control unit. The control unit performs, before processing the substrate to be processed, a processing gas supply control and an additional gas supply control by using the processing gas supply unit and the additional gas supply unit, respectively, wherein the additional gas supply control includes a control that supplies the additional gas at an initial flow rate greater than a set flow rate and then at the set flow rate after a lapse of a period of time.Type: GrantFiled: January 24, 2011Date of Patent: July 29, 2014Assignee: Tokyo Electron LimitedInventors: Shinichiro Hayasaka, Ken Horiuchi, Fumiko Yagi, Takeshi Yokouchi
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Patent number: 8784674Abstract: A perpendicular magnetic recording (PMR) head is fabricated with a pole tip shielded laterally by a graded side shield that is conformal to the shape of the pole tip at an upper portion of the shield but not conformal to the pole tip at a lower portion. The shield includes a trailing shield, that is conformal to the trailing edge of the pole tip and may include a leading edge shield that magnetically connects two bottom ends of the graded side shield.Type: GrantFiled: December 6, 2013Date of Patent: July 22, 2014Assignee: Headway Technologies, Inc.Inventors: Yan Wu, Zhigang Bai, Moris Dovek, Cherng-Chyi Han, Min Li, Jianing Zhou, Jiun-Ting Lee, Min Zheng
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Patent number: 8760807Abstract: A method fabricates a magnetic transducer having a nonmagnetic layer and an ABS location corresponding to an ABS. Etch stop and nonmagnetic etchable layers are provided. A side shield layer is provided between the ABS location and the etch stop and etchable layers. A pole trench is formed in the side shield and etchable layers. The pole trench has a pole tip region in the side shield layer and a yoke region in the etchable layer. A nonmagnetic side gap layer, at least part of which is in the pole trench, is provided. A remaining portion of the pole trench has a location and profile for a pole and in which at least part of the pole is formed. A write gap and trailing shield are provided. At least part of the write gap is on the pole. At least part of the trailing shield is on the write gap.Type: GrantFiled: September 28, 2012Date of Patent: June 24, 2014Assignee: Western Digital (Fremont), LLCInventors: Jinqiu Zhang, Ying Hong, Feng Liu, Zhigang Bai
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Patent number: 8759227Abstract: A method for processing a target object includes arranging a first electrode and a second electrode for supporting the target object in parallel to each other in a processing chamber and processing the target object supported by the second electrode by using a plasma of a processing gas supplied into the processing chamber, the plasma being generated between the first electrode and the second electrode by applying a high frequency power between the first electrode and the second electrode. The target object includes an organic film and a photoresist layer formed on the organic film. The processing gas contains H2 gas, and the organic film is etched by a plasma containing H2 by using the photoresist layer as a mask while applying a negative DC voltage to the first electrode.Type: GrantFiled: September 7, 2010Date of Patent: June 24, 2014Assignee: Tokyo Electron LimitedInventors: Kazuki Narishige, Kazuo Shigeta
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Patent number: 8741778Abstract: A method of etching silicon oxide from a multiple trenches is described which allows more homogeneous etch rates among trenches. The surfaces of the etched silicon oxide within the trench following the etch may also be smoother. The method includes two dry etch stages followed by a sublimation step. The first dry etch stage removes silicon oxide quickly and produces large solid residue granules. The second dry etch stage remove silicon oxide slowly and produces small solid residue granules in amongst the large solid residue granules. Both the small and large solid residue are removed in the ensuing sublimation step. There is no sublimation step between the two dry etch stages.Type: GrantFiled: August 3, 2011Date of Patent: June 3, 2014Assignee: Applied Materials, Inc.Inventors: Dongqing Yang, Jing Tang, Nitin Ingle
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Patent number: 8709954Abstract: A wafer recycling method comprises varying a temperature and pressure conditions to remove a first semiconductor layer deposited on a wafer, removing a remaining semiconductor layer on the wafer through a chemical or physical process, and washing the wafer.Type: GrantFiled: June 23, 2008Date of Patent: April 29, 2014Assignee: LG Innotek Co., Ltd.Inventors: Kyung Jun Kim, Hyo Kun Son
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Patent number: 8696919Abstract: A method for manufacturing a nozzle and an associated funnel in a single plate comprises providing the single plate, the plate being etchable; providing an etch resistant mask on the plate, the mask having a pattern, wherein the pattern comprises a first pattern part for etching the nozzle and a second pattern part for etching the funnel; covering one of the first pattern part and the second pattern part using a first cover; etching one of the nozzle and funnel corresponding to the pattern part not covered in step (c); removing the first cover; etching the other one of the nozzle and funnel; and removing the etch resistant mask.Type: GrantFiled: November 16, 2012Date of Patent: April 15, 2014Assignee: Oce-Technologies B.V.Inventors: René J. Van Der Meer, Hubertus M. J. M. Boesten, Maarten J. Bakker, David D. L. Wijngaards
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Patent number: 8679982Abstract: A method of suppressing the etch rate for exposed silicon-and-oxygen-containing material on patterned heterogeneous structures is described and includes a two stage remote plasma etch. Examples of materials whose selectivity is increased using this technique include silicon nitride and silicon. The first stage of the remote plasma etch reacts plasma effluents with the patterned heterogeneous structures to form protective solid by-product on the silicon-and-oxygen-containing material. The plasma effluents of the first stage are formed from a remote plasma of a combination of precursors, including a nitrogen-containing precursor and a hydrogen-containing precursor. The second stage of the remote plasma etch also reacts plasma effluents with the patterned heterogeneous structures to selectively remove material which lacks the protective solid by-product. The plasma effluents of the second stage are formed from a remote plasma of a fluorine-containing precursor.Type: GrantFiled: April 18, 2012Date of Patent: March 25, 2014Assignee: Applied Materials, Inc.Inventors: Yunyu Wang, Anchuan Wang, Jingchun Zhang, Nitin K. Ingle, Young S. Lee
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Patent number: 8679985Abstract: A dry etching method for a silicon nitride film capable of improving throughput is provided. A dry etching method for dry-etching a silicon nitride film 103 includes dry-etching the silicon nitride film 103 without generating plasma by using a processing gas containing at least a hydrogen fluoride gas (HF gas) and a fluorine gas (F2 gas), with respect to a processing target object 100 including the silicon nitride film 103.Type: GrantFiled: February 2, 2010Date of Patent: March 25, 2014Assignee: Tokyo Electron LimitedInventors: Eiichi Nishimura, Yusuke Shimizu
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Patent number: 8658050Abstract: Techniques for minimizing or eliminating pattern deformation during lithographic pattern transfer to inorganic substrates are provided. In one aspect, a method for pattern transfer into an inorganic substrate is provided. The method includes the following steps. The inorganic substrate is provided. An organic planarizing layer is spin-coated on the inorganic substrate. The organic planarizing layer is baked. A hardmask is deposited onto the organic planarizing layer. A photoresist layer is spin-coated onto the hardmask. The photoresist layer is patterned. The hardmask is etched through the patterned photoresist layer using reactive ion etching (RIE). The organic planarizing layer is etched through the etched hardmask using RIE. A high-temperature anneal is performed in the absence of oxygen. The inorganic substrate is etched through the etched organic planarizing layer using reactive ion etching.Type: GrantFiled: July 27, 2011Date of Patent: February 25, 2014Assignee: International Business Machines CorporationInventors: Sebastian Ulrich Engelmann, Martin Glodde, Michael A. Guillorn
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Patent number: 8652342Abstract: A semiconductor fabrication apparatus and a method of fabricating a semiconductor device using the same performs semiconductor etching and deposition processes at an edge of a semiconductor substrate after disposing the semiconductor substrate at a predetermined place in the semiconductor fabrication apparatus. The semiconductor fabrication apparatus has lower, middle and upper electrodes sequentially stacked. The semiconductor substrate is disposed on the middle electrode. Semiconductor etching and deposition processes are performed on the semiconductor substrate in the semiconductor fabrication apparatus. The semiconductor fabrication apparatus forms electrical fields along an edge of the middle electrode during performance of the semiconductor etching and deposition processes.Type: GrantFiled: May 10, 2012Date of Patent: February 18, 2014Assignee: Samsung Electronics Co., LtdInventors: Kyung-Woo Lee, Jin-Sung Kim, Joo-Byoung Yoon, Yeong-Cheol Lee, Sang-Jun Park, Hee-Kyeong Jeon
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Patent number: 8642473Abstract: Methods and apparatus for removing oxide from a surface, the surface comprising at least one of silicon and germanium, are provided. The method and apparatus are particularly suitable for removing native oxide from a metal silicide layer of a contact structure. The method and apparatus advantageously integrate both the etch stop layer etching process and the native oxide removal process in a single chamber, thereby eliminating native oxide growth or other contaminates redeposit during the substrate transfer processes. Furthermore, the method and the apparatus also provides the improved three-step chemical reaction process to efficiently remove native oxide from the metal silicide layer without adversely altering the geometry of the contact structure and the critical dimension of the trenches or vias formed in the contact structure.Type: GrantFiled: March 2, 2012Date of Patent: February 4, 2014Assignee: Applied Materials, Inc.Inventors: Mei Chang, Linh Thanh, Bo Zheng, Arvind Sundarrajan, John C. Forster, Umesh M. Kellkar, Murali K. Narasimhan
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Patent number: 8623230Abstract: The present method relates to processes for the removal of a material from a sample by a gas chemical reaction activated by a charged particle beam. The method is a multiple step process wherein in a first step a gas is supplied which, when a chemical reaction between the gas and the material is activated, forms a non-volatile material component such as a metal salt or a metaloxide. In a second consecutive step the reaction product of the first chemical reaction is removed from the sample.Type: GrantFiled: December 18, 2008Date of Patent: January 7, 2014Assignee: Carl Zeiss SMS GmbHInventors: Nicole Auth, Petra Spies, Tristan Bret, Rainer Becker, Thorsten Hofmann, Klaus Edinger
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Patent number: 8623765Abstract: A processed object processing apparatus which enables a plurality of processes to be carried out efficiently. A plurality of treatment systems are communicably connected together in a line and in which the objects to be processed are processed. A load lock system is communicably connected to the treatment systems and has a transfer mechanism that transfers the objects to be processed into and out of each of the treatment systems. At least one of the treatment systems is a vacuum treatment system, and the load lock system is disposed in a position such as to form a line with the treatment systems.Type: GrantFiled: August 17, 2009Date of Patent: January 7, 2014Assignee: Tokyo Electron LimitedInventors: Jun Ozawa, Gaku Takahashi
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Patent number: 8617406Abstract: The invention relates to a device for the actively-controlled deposition of microdrops of biological solutions. The inventive device includes at least one flat silicon lever comprising a central body and an end area which forms a point, a slit or groove being disposed in said point. The invention is characterized in that it also comprises at least one metallic track which is disposed on one face of the central body and which runs alongside said slit or groove at least partially. The invention also relates to a method of producing the inventive device and a method for the active-controlled deposition and sampling of microdrops of biological solutions using said device.Type: GrantFiled: November 14, 2011Date of Patent: December 31, 2013Assignee: Centre National de la Recherche ScientifiqueInventors: Christian Bergaud, Matthieu Guirardel, Pascal Belaubre, Benoit Belier, Jean-Bernard Pourciel
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Patent number: 8597530Abstract: A method of forming a semiconductor device comprises forming a mask pattern over an etch target layer, forming an ion implantation region in the mask pattern through an ion implantation process, and forming an ion non-implantation region within the mask pattern, removing the ion implantation region on a top surface of the ion non-implantation region, removing the ion non-implantation region, and patterning the etch target layer by using spacers that comprise the ion implantation region as an etch mask.Type: GrantFiled: November 2, 2010Date of Patent: December 3, 2013Assignee: SK hynix Inc.Inventor: Min Sub Lee
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Patent number: 8598040Abstract: A method for etching features in a plurality of silicon based bilayers forming a stack on a wafer in a plasma processing chamber is provided. A main etch gas is flowed into the plasma processing chamber. The main etch gas is formed into a plasma, while providing a first pressure. A wafer temperature of less than 20° C. is maintained. The pressure is ramped to a second pressure less than the first pressure as the plasma etches through a plurality of the plurality of silicon based bilayers. The flow of the main etch gas is stopped after a first plurality of the plurality of bilayers is etched.Type: GrantFiled: September 6, 2011Date of Patent: December 3, 2013Assignee: Lam Research CorporationInventors: Anne Le Gouil, Jeffrey R. Lindain, Yasushi Ishikawa, Yoko Yamaguchi-Adams
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Patent number: 8580132Abstract: A method for making a strip shaped graphene layer includes the steps of: first, a graphene film is located on a surface of a substrate is provided. Second, a drawn carbon nanotube film composite is disposed on the graphene film. The drawn carbon nanotube film composite includes a polymer material and a drawn carbon nanotube film structure disposed in the polymer material. The drawn carbon nanotube film structure includes a plurality of carbon nanotube segments and a plurality of strip-shaped gaps between the adjacent carbon nanotube segments. Third, the polymer material is partly removed to expose the plurality of carbon nanotube segments. Forth, the plurality of carbon nanotube segments and the graphene film covered by the plurality of carbon nanotube segments is etched. Fifth, the remained polymer material is removed to obtain the strip shaped graphene layer.Type: GrantFiled: December 29, 2012Date of Patent: November 12, 2013Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.Inventors: Xiao-Yang Lin, Kai-Li Jiang, Shou-Shan Fan
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Patent number: 8541313Abstract: A method of etching a sacrificial layer for a micro-machined structure, the sacrificial layer positioned between a layer of a first material and a layer of a second material, the etching being carried out by an etching agent. The method includes: providing at least one species having an affinity for the etching agent greater than that of the layers of first material and second material and less than or equal to that of the sacrificial layer; and then etching the sacrificial layer by the etching agent, the etching being carried out to eliminate at least partially the sacrificial layer and then to eliminate at least partially the species.Type: GrantFiled: October 25, 2006Date of Patent: September 24, 2013Assignee: Commissariat a l'Energie AtomiqueInventors: Stéphan Borel, Jeremy Bilde
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Publication number: 20130232783Abstract: Disclosed is a ceramic substrate including silicon in which the concentration of a silicon oxide and a silicon composite oxide in the surface thereof is less than or equal to 2.7 Atom %.Type: ApplicationFiled: April 22, 2013Publication date: September 12, 2013Applicant: MITSUBISHI MATERIALS CORPORATIONInventors: Hiroshi Tonomura, Takeshi Kitahara, Hiroya Ishizuka, Yoshirou Kuromitsu, Yoshiyuki Nagatomo
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Patent number: 8524520Abstract: First and second sacrificial materials are deposited on a substrate. The first and second patterns are respectively formed in the first and second sacrificial materials. The first pattern made from the first sacrificial material is arranged on the second pattern made from a second sacrificial material. The first pattern leaves an area of predefined width free on the periphery of a top surface of the second pattern. The active layer covers at least the whole of the side walls of the first and second patterns and said predefined area of the second pattern. The active area is patterned so as to allow access to the first sacrificial material. The first and second sacrificial materials are selectively removed forming a mobile structure comprising a free area secured to the substrate by a securing area.Type: GrantFiled: June 8, 2009Date of Patent: September 3, 2013Assignee: Commissariat a l'Energie AtomiqueInventor: Pierre-Louis Charvet
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Patent number: 8518282Abstract: A method for etching features of different aspect ratios in a tungsten containing layer is provided. An etch gas is provided containing a tungsten etch component and a deposition component. A plasma is formed from the provided etch gas. A tungsten containing layer patterned with wide and narrow features is etched with the provided plasma.Type: GrantFiled: November 13, 2008Date of Patent: August 27, 2013Assignee: Lam Research CorporationInventors: Wonchul Lee, Qian Fu, Shenjian Liu, Bryan Pu
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Patent number: 8518283Abstract: The present invention relates to a plasma etching method in which a special area for detecting an end point needs not to be set and an equipment therefor. At an etching step of forming SF6 gas into plasma to etch an etching ground on a Si film, the step is configured by two steps of: a large-amount supply step of supplying a large amount of SF6 gas; and a small-amount supply step of supplying a small amount of SF6 gas. An end-point detecting processor 34 measures an emission intensity of Si or SiFx in the plasma at the small-amount supply step, and determines that an etching end point is reached when the measured emission intensity becomes equal to or less than a previously set reference value.Type: GrantFiled: July 27, 2007Date of Patent: August 27, 2013Assignee: SPP Technologies Co., Ltd.Inventors: Takashi Yamamoto, Masahiko Tanaka, Yoshiyuki Nozawa, Shoichi Murakami
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Patent number: 8512584Abstract: An etching method that uses an etch reactant retained within at least a semi-solid media (120, 220, 224, 230). The etch reactant media is applied to selectively etch a surface layer (106, 218, 222). The etch reactant media may be applied to remove metal shorts (222), smearing and eaves resulting from CMP or in failure analysis for uniform removal of a metal layer (218) without damaging the vias, contact, or underlying structures.Type: GrantFiled: July 26, 2011Date of Patent: August 20, 2013Assignee: Texas Instruments IncorporatedInventor: Darwin Rusli
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Patent number: 8512586Abstract: A method and system for performing gas cluster ion beam (GCIB) etch processing of various materials is described. In particular, the GCIB etch processing includes setting one or more GCIB properties of a GCIB process condition for the GCIB to achieve one or more target etch process metrics.Type: GrantFiled: September 1, 2011Date of Patent: August 20, 2013Assignee: TEL Epion Inc.Inventors: Martin D. Tabat, Christopher K. Olsen, Yan Shao, Ruairidh MacCrimmon
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Patent number: 8501020Abstract: A method for making a three-dimensional nano-structure array includes following steps. First, a substrate is provided. Next, a mask is formed on the substrate. The mask is a monolayer nanosphere array or a film defining a number of holes arranged in an array. The mask is then tailored and simultaneously the substrate is etched by the mask. Lastly, the mask is removed.Type: GrantFiled: December 16, 2010Date of Patent: August 6, 2013Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.Inventors: Zhen-Dong Zhu, Qun-Qing Li, Shou-Shan Fan
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Patent number: 8501024Abstract: The present invention provides a method of fabricating at least one single layer hexagonal boron nitride (h-BN). In an exemplary embodiment, the method includes (1) suspending at least one multilayer boron nitride across a gap of a support structure and (2) performing a reactive ion etch upon the multilayer boron nitride to produce the single layer hexagonal boron nitride suspended across the gap of the support structure. The present invention also provides a method of fabricating single layer hexagonal boron nitride. In an exemplary embodiment, the method includes (1) providing multilayer boron nitride suspended across a gap of a support structure and (2) performing a reactive ion etch upon the multilayer boron nitride to produce the single layer hexagonal boron nitride suspended across the gap of the support structure.Type: GrantFiled: September 30, 2010Date of Patent: August 6, 2013Assignee: The Regents of the University of CaliforniaInventor: Alexander K. Zettl
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Patent number: 8492285Abstract: A dry etching method for texturing a surface of a substrate is disclosed. The method includes performing a first dry etching onto the surface of the substrate thereby forming a surface texture with spikes and valleys, the first dry etching comprising etching the surface of the substrate in a plasma comprising fluorine (F) radicals and oxygen (O) radicals, wherein the plasma comprises an excess of oxygen (O) radicals. The method may further include performing a second dry etching onto the surface texture thereby smoothening the surface texture, the second dry etching comprising chemical isotropic etching the surface texture, obtained after the first dry etching, in a plasma comprising fluorine (F) radicals, wherein the spikes are etched substantially faster than the valleys.Type: GrantFiled: September 15, 2011Date of Patent: July 23, 2013Assignee: IMECInventor: Boon Teik Chan
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Patent number: 8470189Abstract: In the present invention, provided is a method of forming a mask pattern by which a fine thin film pattern may be formed more easily with higher resolution and precision. In the method of forming a mask pattern, a photoresist pattern having an opening is formed on a substrate, then, an inorganic film is formed so as to cover the upper surface of the photoresist pattern and the inside of the opening, then the inorganic film on the upper surface of the photoresist pattern is removed by a dry etching process. Subsequently, an inorganic mask pattern is formed by removing the photoresist pattern. The inorganic mask pattern thus formed hardly produces an issue of deformation such as physical displacement even when it is heated in the dry etching process.Type: GrantFiled: June 3, 2008Date of Patent: June 25, 2013Assignee: TDK CorporationInventors: Akifumi Kamijima, Hideyuki Yatsu, Hitoshi Hatate
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Patent number: 8435419Abstract: Methods of processing substrates having metal layers are provided herein. In some embodiments, a method of processing a substrate comprising a metal layer having a patterned mask layer disposed above the metal layer, the method may include etching the metal layer through the patterned mask layer; and removing the patterned mask layer using a first plasma formed from a first process gas comprising oxygen (O2) and a carbohydrate. In some embodiments, a two step method with an additional second process gas comprising chlorine (Cl2) or a sulfur (S) containing gas, may provide an efficient way to remove patterned mask residue.Type: GrantFiled: January 27, 2011Date of Patent: May 7, 2013Assignee: Applied Materials, Inc.Inventors: Guowen Ding, Herrick Ng, Teh-Tien Sue, Benjamin Schwarz, Zhuang Li
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Patent number: 8426316Abstract: Disclosed are a method and a system for processing a semiconductor structure of the type including a substrate, a dielectric layer, and a TaN—Ta liner on the dielectric layer. The method comprises the step of using XeF2 to remove at least a portion of the TaN—Ta liner completely to the dielectric layer. In the preferred embodiments, the present invention uses XeF2 selective gas phase etching as alternatives to Ta—TaN Chemical Mechanical Polishing (CMP) as a basic “liner removal process” and as a “selective cap plating base removal process.” In this first use, XeF2 is used to remove the metal liner, TaN—Ta, after copper CMP. In the second use, the XeF2 etch is used to selectively remove a plating base (TaN—Ta) that was used to form a metal cap layer over the copper conductor.Type: GrantFiled: September 4, 2008Date of Patent: April 23, 2013Assignee: International Business Machines CorporationInventors: John Michael Cotte, Nils Deneke Hoivik, Christopher Vincent Jahnes, Robert Luke Wisnieff
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Patent number: 8420547Abstract: A plasma processing method performed in a plasma processing apparatus including a processing chamber accommodating a substrate in which a plasma is generated; a mounting table mounting the substrate, which is provided in the processing chamber and to which a plasma attraction high frequency voltage is applied; and a facing electrode provided to face the mounting table in the processing chamber, to which a negative DC voltage is applied, the method including: applying a plasma attraction high frequency voltage to the mounting table for a predetermined period of time; and stopping the application of the plasma attraction high frequency voltage to the mounting table. In the plasma processing method, the application of the plasma attraction high frequency voltage and stopping thereof are alternately repeated.Type: GrantFiled: February 17, 2010Date of Patent: April 16, 2013Assignee: Tokyo Electron LimitedInventor: Yoshinobu Ooya
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Patent number: 8409458Abstract: Provided is a process for manufacturing a diamond like carbon layer. The process for manufacturing the diamond like carbon layer includes, without limitation, forming a layer of diamond like carbon over a substrate, and reactive ion etching the layer of diamond like carbon.Type: GrantFiled: March 2, 2007Date of Patent: April 2, 2013Assignee: Texas Instruments IncorporatedInventors: Erika Leigh Shoemaker, Maria Wang, Mary Roby, Stuart Jacobsen
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Patent number: 8398865Abstract: A method of manufacturing a mechanical part includes the steps of providing a micro-machinable substrate; etching a pattern which includes the part through the entire substrate using photolithography; mounting the etched substrate on a support so as to leave the top and bottom surfaces of said substrate accessible for coating; depositing a tribological quality improving coating of on the outer surface of the part; and releasing the part from the substrate.Type: GrantFiled: July 10, 2009Date of Patent: March 19, 2013Assignee: The Swatch Group Research and Development LtdInventors: Rudolf Dinger, Thierry Ravenel
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Patent number: 8372298Abstract: Epitaxially coated silicon wafers, are coated individually in an epitaxy reactor by a procedure in which a silicon wafer on a susceptor in the epitaxy reactor, is pretreated in a first step with a hydrogen flow rate of 1-100 slm and in a second step with hydrogen and an etching medium at a hydrogen flow rate of 1-100 slm, and an etching medium flow rate of 0.5-1.5 slm, at an average temperature of 950-1050° C., and is subsequently coated epitaxially, wherein, during the second pretreatment step, the power of heating elements is regulated such that there is a temperature difference of 5-30° C. between a radially symmetrical central region of the silicon wafer and an outer region of the silicon outside the central region.Type: GrantFiled: February 2, 2010Date of Patent: February 12, 2013Assignee: Siltronic AGInventor: Joerg Haberecht
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Patent number: 8354032Abstract: A method of manufacturing a mechanical part includes providing a substrate of micro-machinable material; etching, using photolithography, a pattern that includes said part through said entire substrate; assembling a clip on said part so that said part is ready to be mounted without the portion made of micro-machinable material having to be touched by a tool other than the clip; releasing the part from the substrate so as to mount said part in a device such as a timepiece movement.Type: GrantFiled: July 10, 2009Date of Patent: January 15, 2013Assignee: The Swatch Group Research and Development LtdInventors: Rudolf Dinger, Thierry Ravenel
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Patent number: 8343364Abstract: A method of forming a near field transducer (NFT) for energy assisted magnetic recording is disclosed. A structure comprising an NFT metal layer and a first hardmask layer over the NFT metal layer is provided A first patterned hardmask is formed from the first hardmask layer, the first patterned hardmask disposed over a disk section and a pin section of the NFT to be formed. An etch process is performed on the NFT metal layer via the first patterned hardmask, the etch process forming the NFT having the disk section and the pin section.Type: GrantFiled: June 8, 2010Date of Patent: January 1, 2013Assignee: Western Digital (Fremont), LLCInventors: Wei Gao, Guanxiong Li, Zhongyan Wang, Yufeng Hu, Ge Yi
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Patent number: 8273260Abstract: A method of etching a semiconductor wafer is provided. The method comprises the steps of: jetting a mixed gas including hydrogen fluoride and ozone onto a surface of a semiconductor wafer; monitoring the surface of the semiconductor wafer; analyzing the surface of the semiconductor wafer; and adjusting at least one of the hydrogen fluoride concentration and the ozone concentration in the mixed gas based on a result of the analysis.Type: GrantFiled: May 13, 2009Date of Patent: September 25, 2012Assignee: Sumco Techxiv CorporationInventors: Kazuaki Kozasa, Tomonori Kawasaki
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Patent number: RE44356Abstract: A method of manufacturing a tunable wavelength optical filter. The method includes steps of forming a first sacrificial oxide film for floating a lower mirror on a semiconductor substrate; sequentially laminating conductive silicon films and oxide films for defining a mirror region on the first sacrificial oxide film in a multi-layer and laminating another conductive silicon film to form a lower mirror; sequentially laminating conductive silicon films and oxide films for defining the mirror region on a second sacrificial oxide film in a multi-layer and laminating another conductive silicon film to form an upper mirror and forming an optical tuning space between the lower mirror and the upper mirror and etching the first sacrificial oxide film and the second sacrificial oxide film such that the lower mirror is floated on the semiconductor substrate.Type: GrantFiled: July 1, 2010Date of Patent: July 9, 2013Assignee: Electronics and Telecommunications Research InstituteInventors: Chang Auck Choi, Myung Lae Lee, Chang Kyu Kim, Chi Hoon Jun, Youn Tae Kim