Including Active Semiconductor Component Sensitive To Infrared Radiation, Light, Or Electromagnetic Radiation Of A Shorter Wavelength (epo) Patents (Class 257/E27.122)
  • Patent number: 11688754
    Abstract: Photonic devices and methods having an increased quantum effect length are provided. In some embodiments, a photonic device includes a substrate having a first surface. A cavity extends into the substrate from the first surface to a second surface. A semiconductor layer is disposed on the second surface in the cavity of the substrate, and a cover layer is disposed on the semiconductor layer. The semiconductor layer is configured to receive incident radiation through the substrate and to totally internally reflect the radiation at an interface between the semiconductor layer and the cover layer.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: June 27, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsai-Hao Hung, Tao-Cheng Liu, Ying-Hsun Chen
  • Patent number: 11674890
    Abstract: Provided are an optical sensor device using surface acoustic waves and an optical sensor device package. The optical sensor device includes: a substrate including a first light sensing area and a temperature sensing area and including a piezo electric material; a first input electrode and a first output electrode which are disposed in the first light sensing area and are apart from each other with a first delay gap therebetween; a first sensing film overlapping the first delay gap and configured to cover at least some portions of the first input electrode and the first output electrode; and a second input electrode and a second output electrode which are disposed in the temperature sensing area and are apart from each other with a second delay gap therebetween. The second delay gap is exposed to air.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: June 13, 2023
    Assignee: HAESUNG DS CO., LTD.
    Inventors: Jin Woo Lee, Byung Moon Lee, Jin Kee Hong, Jong Woo Kim
  • Patent number: 11527567
    Abstract: An image sensor includes a substrate including a plurality of pixel regions and one or more pairs of dummy pixel regions; a pixel separation structure between two adjacent pixel regions among the plurality of pixel regions and including a first conductive layer; a dummy pixel separation structure between the one or more pairs of dummy pixel regions, electrically connected to the pixel separation structure, and including a second conductive layer; and a pixel separation contact disposed on the dummy pixel separation structure.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: December 13, 2022
    Assignee: SAMSUNG ELECTRONICS CO.. LTD.
    Inventors: Young-sun Oh, Hee-sang Kwon
  • Patent number: 11522097
    Abstract: A diode device may be provided, including a semiconductor substrate including a well region arranged therein, a first doped region and a second doped region arranged within the well region, a first contact region arranged within the first doped region, and an isolation structure arranged within the first doped region, where an oxide layer may line a surface of the isolation structure. The first doped region and the first contact region may have a first conductivity type, and the well region and the second doped region may have a second conductivity type different from the first conductivity type. A doping concentration of the first contact region may be higher than a doping concentration of the first doped region, and a part of the first doped region may be arranged between the first contact region and the well region.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: December 6, 2022
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Khee Yong Lim, Kiok Boone Elgin Quek, Sandipta Roy
  • Patent number: 8901678
    Abstract: A light-assisted biochemical sensor based on a light addressable potentiometric sensor is disclosed. The light-assisted biochemical sensor comprises a semiconductor substrate and a sensing layer, which are used to detect the specific ion concentration or the biological substance concentration of a detected solution. Lighting elements fabricated directly on the back surface of the semiconductor substrate directly illuminate the light to the semiconductor substrate, so as to enhance the photoconduction property of the semiconductor substrate. And then, the hysteresis and the sensing sensitivity of the light-assisted biochemical sensor are respectively reduced and improved. In addition, due to its characteristics of integration, the light-assisted biochemical sensor not only reduces the fabrication cost but also has portable properties and real-time detectable properties. As a result, its detection range and the application range are wider.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: December 2, 2014
    Assignee: Chang Gung University
    Inventors: Liann-Be Chang, Chao-Sung Lai, Po-Chuan Chen
  • Patent number: 8860152
    Abstract: A integrated circuit die includes a chemical sensor, a thermal sensor, and a humidity sensor formed therein. The chemical sensor, thermal sensor, and humidity sensor include electrodes formed in a passivation layer of the integrated circuit die. The integrated circuit die further includes transistors formed in a monocrystaline semiconductor layer.
    Type: Grant
    Filed: October 31, 2011
    Date of Patent: October 14, 2014
    Assignee: STMicroelectronics Pte Ltd.
    Inventors: Suman Cherian, Olivier Le Neel
  • Patent number: 8835980
    Abstract: Provided is a semiconductor wafer including: a base wafer containing silicon; an inhibitor that has been formed on the base wafer, has an aperture in which a surface of the base wafer is exposed, and inhibits crystal growth; and a light-absorptive structure that has been formed inside the aperture in contact with a surface of the base wafer exposed inside the aperture, where the light-absorptive structure includes a first semiconductor and a second semiconductor.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: September 16, 2014
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Masahiko Hata, Taro Itatani
  • Patent number: 8765514
    Abstract: A center region of conductive material/s may be disposed or “sandwiched” between transition regions of relatively lower conductivity materials to provide substantially low defect density interfaces for the sandwiched material. The center region and surrounding transition regions may in turn be disposed or sandwiched between dielectric insulative material to form a sandwiched and transitioned device structure. The center region of such a sandwiched structure may be implemented, for example, as a device layer such as conductive microbolometer layer for a microbolometer detector structure.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: July 1, 2014
    Assignee: L-3 Communications Corp.
    Inventors: Athanasios J. Syllaios, Michael F. Taylor, Sameer K. Ajmera
  • Patent number: 8742522
    Abstract: A method of making a semiconductor radiation detector wherein the metal layers which serve as the cathode and anode electrodes are recessed from the designated prospective dice lines which define the total upper and lower surface areas for each detector such that the dicing blade will not directly engage the metal during dicing and therefore prevent metal from intruding upon (smearing) the vertical side walls of the detector substrate.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: June 3, 2014
    Assignee: eV Products, Inc.
    Inventors: Handong Li, Michael Prokesch, John F. Eger
  • Publication number: 20140091374
    Abstract: A method of forming an integrated photonic semiconductor structure having a photonic device and a CMOS device may include depositing a first silicon nitride layer having a first stress property over the photonic device, depositing an oxide layer having a stress property over the deposited first silicon nitride layer, and depositing a second silicon nitride layer having a second stress property over the oxide layer. The deposited first silicon nitride layer, the oxide layer, and the second silicon nitride layer encapsulate the photonic device.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Solomon Assefa, Tymon Barwicz, Swetha Kamlapurkar, Marwan H. Khater, Steven M. Shank, Yurii A. Vlasov
  • Patent number: 8686471
    Abstract: Disclosed are minority carrier based mercury-cadmium telluride (HgCdTe) infrared detectors and arrays, and methods of making, are disclosed. The constructions provided by the invention enable the detectors to be used at higher temperatures, and/or be implemented on less expensive semiconductor substrates to lower manufacturing costs. An exemplary embodiment a substrate, a bottom contact layer disposed on the substrate, a first mercury-cadmium telluride layer having a first bandgap energy value disposed on the bottom contact layer, a second mercury-cadmium telluride layer having a second bandgap energy value that is greater than the first bandgap energy value disposed on the first mercury-cadmium telluride layer, and a collector layer disposed on the second mercury-cadmium telluride layer, wherein the first and second mercury-cadmium telluride layers are each doped with an n-type dopant.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: April 1, 2014
    Assignee: DRS RSTA, Inc.
    Inventors: Michael A. Kinch, Christopher A. Schaake
  • Publication number: 20140077233
    Abstract: A multi-functional optoelectronic apparatus which comprises an integrated circuit (IC) wafer, respective optoelectronic components which has one or more Input port(s) to receive external command signals to drive the optoelectronic apparatus. Examples of some of the optoelectronic apparatus include an IOLED (Input/Output Light Emitting Diode including visible light and invisible light), IOPD (Input/Output Photo Diode), IOPT (Input/Output Photo Transistor), IOLS (Input/Output Light Sensor), IORS (Input/Output Reflective Sensor), IOPI (Input/Output Photo Interrupter) and IORM (Input/Output Receiver Module). The multi-functional optoelectronic apparatus may drive external peripheral(s) such as speakers, motors or other devices.
    Type: Application
    Filed: September 19, 2012
    Publication date: March 20, 2014
    Inventor: Khok Hing-Wai
  • Patent number: 8674417
    Abstract: A solid-state imaging device including: a substrate; a light-receiving part; a second-conductivity-type isolation layer; a detection transistor; and a reset transistor.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: March 18, 2014
    Assignee: Sony Corporation
    Inventor: Isao Hirota
  • Publication number: 20140027871
    Abstract: A sensor includes a collector, an emitter and a base-region barrier formed as an inverted bipolar junction transistor having a base substrate forming a base electrode to activate the inverted bipolar junction transistor. A level surface is formed by the collector, the emitter and the base-region barrier opposite the base substrate such that when the level surface is exposed to charge, the charge is measured during operation of the bipolar junction transistor.
    Type: Application
    Filed: July 30, 2012
    Publication date: January 30, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jin Cai, Tak H. Ning, Jeng-Bang Yau, Sufi Zafar
  • Publication number: 20140027826
    Abstract: A method of forming an integrated photonic semiconductor structure having a photodetector device and a CMOS device may include depositing a dielectric stack over the photodetector device such that the dielectric stack encapsulates the photodetector. An opening is etched into the dielectric stack down to an upper surface of a region of an active area of the photodetector. A first metal layer is deposited directly onto the upper surface of the region of the active area via the opening such that the first metal layer may cover the region of the active area. Within the same mask level, a plurality of contacts including a second metal layer are located on the first metal layer and on the CMOS device. The first metal layer isolates the active area from the occurrence of metal intermixing between the second metal layer and the active area of the photodetector.
    Type: Application
    Filed: July 30, 2012
    Publication date: January 30, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Solomon Assefa, Jeffrey P. Gambino, Steven M. Shank
  • Publication number: 20140001588
    Abstract: Monolithic optical sensor devices, and methods for fabricating such devices, are described herein. In an embodiment, a semiconductor wafer substrate includes a plurality of photodetector (PD) regions. A wafer-level inorganic dielectric optical filter is deposited and thereby formed over at least a subset of the plurality of PD regions. One or more wafer-level organic color filter(s) is/are deposited and thereby formed on one or more selected portion(s) of the wafer-level inorganic dielectric optical filter that is/are over selected ones of the PD regions. For example, an organic red filter, an organic green filter and an organic blue filter can be over, respectively, portions of the wafer-level inorganic dielectric optical filter that are over first, second and third PD regions.
    Type: Application
    Filed: June 28, 2012
    Publication date: January 2, 2014
    Applicant: INTERSIL AMERICAS LLC
    Inventors: Michael I-Shan Sun, Francois Hebert, Kenneth C. Dyer, Eric S. Lee
  • Patent number: 8610170
    Abstract: An array structure solves issues that exist in conventional compound semiconductor photodiode arrays, such as large cross talk, large surface leaks, large stray capacitance, narrow detection wavelength bands, and bad manufacturing yield, simultaneously. A photodiode array has, laminated upon a semiconductor substrate, a buffer layer (8) with a broad forbidden band width, an I-type (low concentration photosensitive layer (2) with a narrow forbidden band width, and an n-type semiconductor window layer (3) with a broad forbidden band width, wherein photodiode elements are electrically separated from adjacent elements, by doping the periphery of the p-type impurity, and the detection wavelength band is expanded, by making the n-type window layer (3) on the photosensitive layer (2) a thinner layer with crystal growth.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: December 17, 2013
    Assignee: Irspec Corporation
    Inventors: Katsuhiko Nishida, Mutsuo Ogura
  • Patent number: 8569853
    Abstract: A semiconductor light-receiving device includes a semiconductor light-receiving element that has a first electrode and a second electrode, a first wiring coupled to the first electrode, and a second wiring coupled to the second electrode, a width of the second wiring being smaller than a width of the first wiring.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: October 29, 2013
    Assignee: Sumitomo Electric Device Innovations, Inc.
    Inventor: Yuji Koyama
  • Publication number: 20130264669
    Abstract: A method of making a semiconductor radiation detector wherein the metal layers which serve as the cathode and anode electrodes are recessed from the designated prospective dice lines which define the total upper and lower surface areas for each detector such that the dicing blade will not directly engage the metal during dicing and therefore prevent metal from intruding upon (smearing) the vertical side walls of the detector substrate.
    Type: Application
    Filed: April 10, 2012
    Publication date: October 10, 2013
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Handong Li, Michael Prokesch, John Francis Eger
  • Patent number: 8552519
    Abstract: In order to collect a plurality of semiconductor elements easily from a semiconductor module where a plurality of rod-like semiconductor elements for power generation or light emission are built in and to reuse or repair them, two split modules 61 are arranged in series in a containing case 62 in a semiconductor module 60. In each split module 61, power generating semiconductor elements 1 arranged in a matrix of a plurality of rows and columns, and a conductive connection mechanism for connecting the plurality of semiconductor elements 1 in each row in series and the plurality of semiconductor elements 1 in each column in parallel are molded with transparent synthetic resin, and a connection conductor 67 is allowed to project at the end. A conductive waved spring 70 and an external terminal 76 are provided on the end side of the containing case 62, and series connection of the two split modules 61 is ensured by mechanical pressing force of the conductive waved spring 70.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: October 8, 2013
    Assignee: Kyosemi Corporation
    Inventor: Josuke Nakata
  • Patent number: 8536673
    Abstract: Provided is a light receiving circuit for detecting a change in amount of light, in which an input circuit at a subsequent stage is compact and inexpensive and current consumption is low. The light receiving circuit includes: a photoelectric conversion element for supplying a current corresponding to an amount of incident light; an N-channel MOS transistor including a drain supplied with the current from the photoelectric conversion element; and a control circuit for controlling a gate voltage of the NMOS transistor via a low pass filter so that a drain voltage of the N-channel MOS transistor becomes a desired voltage.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: September 17, 2013
    Assignee: Seiko Instruments Inc.
    Inventors: Fumiyasu Utsunomiya, Taro Yamasaki, Isamu Fujii
  • Patent number: 8530945
    Abstract: A solid-state image pickup element includes: a photoelectric conversion region formed in a semiconductor substrate; an electric charge holding region formed in the semiconductor substrate for holding electric charges accumulated in the photoelectric conversion region until the electric charges are read out; a transfer gate formed on the semiconductor substrate for transferring electric charges generated by photoelectric conversion in the photoelectric conversion region to the electric charge holding region, and a light blocking film formed on an upper surface of the transfer gate. In this case, a portion between the semiconductor substrate and the light blocking film is thinly formed as a light made incident to the photoelectric conversion region has a longer wavelength in a wavelength region.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: September 10, 2013
    Assignee: Sony Corporation
    Inventors: Taketo Fukuro, Jun Okuno
  • Patent number: 8492187
    Abstract: A multilayered stack including alternating layers of sacrificial material layers and semiconductor material layers is formed on a base substrate. The thickness of each sacrificial material layer of the stack increases upwards from the sacrificial material layer that is formed nearest to the base substrate. Because of this difference in thicknesses, each sacrificial material layer etches at different rates, with thicker sacrificial material layers etching faster than thinner sacrificial material layers. An etch is performed that first removes the thickest sacrificial material layer of the multilayered stack. The uppermost semiconductor device layer within the multilayered stack is accordingly first released. As the etch continues, the other sacrificial material layers are removed sequentially, in the order of decreasing thickness, and the other semiconductor device layers are removed sequentially.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: July 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Cheng-Wei Cheng, Ning Li, Kuen-Ting Shiu
  • Publication number: 20130181307
    Abstract: According to an embodiment, a method of manufacturing a semiconductor device is provided. The method of manufacturing a semiconductor device includes forming a blocking film by a material including at least carbon on an upper surface of a second element among a first element and the second element formed on a semiconductor substrate, the blocking film configured to inhibit the second element from turning into salicide.
    Type: Application
    Filed: May 16, 2012
    Publication date: July 18, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Atsushi OHTA
  • Patent number: 8482033
    Abstract: In one embodiment, a semiconductor structure is provided which includes a base substrate, and a multilayered stack located on the base substrate. The multilayered stack includes, from bottom to top, a first sacrificial material layer having a first thickness, a first semiconductor device layer, a second sacrificial material layer having a second thickness, and a second semiconductor device layer, wherein the first thickness is less than the second thickness.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: July 9, 2013
    Assignee: International Business Machines Corporation
    Inventors: Cheng-Wei Cheng, Ning Li, Kuen-Ting Shiu
  • Patent number: 8476102
    Abstract: A method for manufacturing a solid state image pickup device including a first active region provided with a first conversion unit, a second active region provided with a second conversion unit, and a third active region adjoining the first and the second active regions with a field region therebetween and being provided with a pixel transistor, the method including the steps of ion-implanting first conductivity type impurity ions to form a semiconductor region serving as a potential barrier against the signal carriers at a predetermined depth in the third active region and ion-implanting second conductivity type impurity ions into the third active region with energy lower than the above-described ion-implantation energy.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: July 2, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideaki Takada, Toru Koizumi, Yasuo Yamazaki, Tatsuya Ryoki
  • Patent number: 8476683
    Abstract: A semiconductor device includes a first field effect transistor (FET) located on a substrate; and a second FET located on the substrate, the second FET comprising a first buried oxide (BOX) region located underneath a channel region of the second FET, wherein the first BOX region of the second FET is configured to cause the second FET to have a higher radiation sensitivity that the first FET.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: July 2, 2013
    Assignee: International Business Machines Corporation
    Inventors: Michael S. Gordon, Kenneth P. Rodbell, Jeng-Bang Yau
  • Publication number: 20130140662
    Abstract: A method for forming the photodiode device is provided. The method comprises providing a substrate, then a transparent conductive film is formed on the substrate. A conductive polymer is formed on the transparent conductive film. A photoactive layer is formed on the conductive polymer. A charge blocking layer is formed on the photoactive layer. Finally, a cathode metal is formed on the charge blocking layer.
    Type: Application
    Filed: May 8, 2012
    Publication date: June 6, 2013
    Applicant: National Chiao Tung University
    Inventors: Fang-Chung Chen, Shu-Cheng Lin
  • Patent number: 8431975
    Abstract: A back side illumination (BSI) image sensor includes at least one pixel. The pixel area includes a photo diode and a transfer transistor. The transfer transistor has a control electrode made of a gate poly and a gate oxide for receiving a control instruction, a first electrode coupled to the photo diode, and a second electrode, wherein an induced conduction channel of the transfer transistor partially surrounds a recessed space which is filled with the gate poly and the gate oxide of the transfer transistor.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: April 30, 2013
    Assignee: Himax Imaging, Inc.
    Inventors: Chih-Wei Hsiung, Fang-Ming Huang, Chung-Wei Chang
  • Publication number: 20130099341
    Abstract: An image sensor includes first pixels, second pixels and a deep trench. The first pixels are formed in an active region of a semiconductor substrate, and configured to measure photo-charges corresponding to incident light. The second pixels are formed in an optical-black region of the semiconductor substrate, and are configured to measure black levels. The deep trench is formed vertically in a boundary region of the optical-black region, where the boundary region is adjacent to the active region, and configured to block leakage light and diffusion carriers from the active region.
    Type: Application
    Filed: September 13, 2012
    Publication date: April 25, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun-Sub SHIM, Jung-Chak AHN, Moo-Sup LIM, Hyung-Jin BAE, Min-Seok OH
  • Patent number: 8426238
    Abstract: A method for manufacturing a solid-state image pickup device is provided. A first pixel isolation member is formed in a semiconductor substrate including pixels by implanting impurity ions in a first region of the substrate to separate pixels in the first region from each other when viewed from a surface of the substrate. A second pixel isolation member is also formed in the substrate by forming a trench in a second region of the substrate different from the first region to separate pixels in the second region from each other, and filling the trench with an electroconductive material harder to polish by CMP than the substrate. The thickness of the substrate is reduced by CMP on a rear surface of the substrate using the second pixel isolation member as a stopper.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: April 23, 2013
    Assignee: Sony Corporation
    Inventors: Kenichi Nishizawa, Hiroshi Takahashi
  • Patent number: 8415725
    Abstract: A solid-state imaging device including: a substrate; a light-receiving part; a second-conductivity-type isolation layer; a detection transistor; and a reset transistor.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: April 9, 2013
    Assignee: Sony Corporation
    Inventor: Isao Hirota
  • Publication number: 20130082341
    Abstract: It is possible to reduce resistance variations of a member connecting a through-silicon via to a line and improve wiring reliability. A hole through which the through-silicon via is to be stretched is created and an over-etching process is carried out on a wiring layer including the line. Then, by embedding copper in the hole, the through-silicon via made of the copper can be created. After the through-silicon via has been connected to the line made of aluminum through the member which is a connection area, the connection area is alloyed in a thermal treatment in order to electrically connect the through-silicon via to the line. Thus, it is possible to reduce variations of a resistance between the through-silicon via and the line and also improve wiring reliability as well. The present technology can be applied to a semiconductor device and a method for manufacturing the semiconductor device.
    Type: Application
    Filed: August 16, 2012
    Publication date: April 4, 2013
    Applicant: SONY CORPORATION
    Inventors: Kan SHIMIZU, Keishi INOUE
  • Publication number: 20130062721
    Abstract: The present invention provides a semiconductor strip detector that can reduce noise generated from floating capacitance between electrodes while maintaining high detection efficiency. The semiconductor strip detector for detecting radiation includes: a substrate integrally formed from semiconductor and receiving incident radiation; a first electrode group made up of a plurality of strip-shaped electrodes to provided in parallel to each other on a major surface of the substrate; and a second electrode group made up of a plurality of strip-shaped electrodes to provided coaxially with an orthogonal projection of the plurality of strip-shaped electrodes to of the first electrode group onto the major surface of the substrate, and the electrode groups are formed so that a ratio of a longitudinal length to an electrode-to-electrode length is 10 or more. Therefore, noise can be sufficiently reduced while a detection range is being maintained.
    Type: Application
    Filed: August 13, 2012
    Publication date: March 14, 2013
    Applicant: RIGAKU CORPORATION
    Inventors: Kazuyuki MATSUSHITA, Masaru KURIBAYASHI
  • Publication number: 20130056839
    Abstract: The present invention is a biosensor apparatus that includes a substrate, a source on one side of the substrate, a drain spaced from the source, a conducting channel between the source and the drain, an insulator region, and receptors on a gate region for receiving target material. The receptors are contacted for changing current flow between the source and the drain. The source and the drain are relatively wide compared to length between the source and the drain through the conducting channel.
    Type: Application
    Filed: November 5, 2012
    Publication date: March 7, 2013
    Applicant: UNIVERSITY OF HAWAII
    Inventor: University Of Hawaii
  • Patent number: 8383448
    Abstract: A method of fabricating an MOS device is provided. First, gates and source/drain regions of transistors are formed on a substrate. A photodiode doped region and a floating node doped region are formed in the substrate. Thereafter, a spacer stacked layer including a bottom layer, an inter-layer and a top layer is formed to cover each gate of the transistors. Afterwards, a first mask layer having an opening exposing at least the photodiode doped region is formed on the substrate, and then the top layer exposed by the opening is removed. Next, the first mask layer is removed, and then a second mask layer is formed on a region correspondingly exposed by the opening. A portion of the top layer and the inter-layer exposed by the second mask layer is removed to form spacers on sidewalls of the gates.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: February 26, 2013
    Assignee: United Microelectronics Corp.
    Inventor: Ching-Hung Kao
  • Publication number: 20130037826
    Abstract: A light emitting diode (LED) package module and the manufacturing method thereof are presented. A plurality of LEDs and a plurality of semiconductor elements are disposed on a silicon substrate, and then a plurality of lenses is formed above the positions of the plurality of the LEDs, and the plurality of the lenses is corresponding to the plurality of the LEDs. Then, a plurality of package units is defined on the silicon substrate, and each package unit has a semiconductor element and at least one LED. After that, the silicon substrate is cut to form a plurality of LED package modules, and each LED package module has at least one package unit.
    Type: Application
    Filed: October 17, 2012
    Publication date: February 14, 2013
    Inventor: Wei-Jen Chou
  • Publication number: 20130032902
    Abstract: Disclosed is an integrated circuit comprising a substrate (10) carrying a plurality of circuit elements; a metallization stack (12, 14, 16) interconnecting said circuit elements, said metallization stack comprising a patterned upper metallization layer comprising a first metal portion (20) and a second metal portion (21); a passivation stack (24, 26, 28) covering the metallization stack; a gas sensor including a sensing material portion (32, 74) on the passivation stack; a first conductive portion (38) extending through the passivation stack connecting a first region of the sensing material portion to the first metal portion; and a second conductive portion (40) extending through the passivation stack connecting a second region of the sensing material portion to the second metal portion. A method of manufacturing such an IC is also disclosed.
    Type: Application
    Filed: July 24, 2012
    Publication date: February 7, 2013
    Applicant: NXP B.V.
    Inventor: Matthias Merz
  • Publication number: 20130026587
    Abstract: Pixel sensor cells with an opaque mask layer and methods of manufacturing are provided. The method includes forming a transparent layer over at least one active pixel and at least one dark pixel of a pixel sensor cell. The method further includes forming an opaque region in the transparent layer over the at least one dark pixel.
    Type: Application
    Filed: July 25, 2011
    Publication date: January 31, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeffrey P. GAMBINO, Robert K. LEIDY, Mark D. LEVY
  • Publication number: 20130026535
    Abstract: Methods of forming photoactive devices include infiltrating pores of a solid porous ceramic material with a fluid, which may be a supercritical fluid, carrying at least one single source precursor therein. The single source precursor may be decomposed to form a plurality of particles within the pores of the solid porous ceramic material. Photoactive devices include a solid porous ceramic material exhibiting electrical conductivity, and a plurality of photoactive semiconductor particles within pores of the solid porous ceramic material.
    Type: Application
    Filed: July 26, 2011
    Publication date: January 31, 2013
    Applicant: BATTELLE ENERGY ALLIANCE, LLC
    Inventors: Robert V. Fox, Rene G. Rodriguez, Joshua J. Pak
  • Publication number: 20130026595
    Abstract: A semiconductor light-receiving device includes a semiconductor light-receiving element that has a first electrode and a second electrode, a first wiring coupled to the first electrode, and a second wiring coupled to the second electrode, a width of the second wiring being smaller than a width of the first wiring.
    Type: Application
    Filed: July 26, 2012
    Publication date: January 31, 2013
    Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Yuji Koyama
  • Publication number: 20130001725
    Abstract: Provided is a method of fabricating a backside illuminated image sensor that includes providing a device substrate having a frontside and a backside, where pixels are formed at the frontside and an interconnect structure is formed over pixels, forming a re-distribution layer (RDL) over the interconnect structure, bonding a first glass substrate to the RDL, thinning and processing the device substrate from the backside, bonding a second glass substrate to the backside, removing the first glass substrate, and reusing the first glass substrate for fabricating another backside-illuminated image sensor.
    Type: Application
    Filed: July 5, 2012
    Publication date: January 3, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuan-Chieh Huang, Dun-Nian Yaung, Chih-Jen Wu, Chen-Ming Huang
  • Publication number: 20120326178
    Abstract: An optoelectronic component includes at least one inorganic optoelectronically active semiconductor component having an active region that emits or receives light during operation, and a sealing material applied by atomic layer deposition on at least one surface region, the sealing material covering the surface region in a hermetically impermeable manner.
    Type: Application
    Filed: November 30, 2010
    Publication date: December 27, 2012
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Michael Fehrer, Alfred Lell, Martin Müller, Tilman Schlenker, Sönke Tautz, Uwe Strauss
  • Patent number: 8338212
    Abstract: A method of forming a mask for lithography includes the step of forming the mask by using reverse data in which positions of at least part of output terminals are reversed, when forming the mask for lithography used for manufacturing a back-illuminated solid-state imaging device which takes incident light from the side of a surface opposite to the side of a surface on which wiring of a device region in which photoelectric conversion elements are formed is formed.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: December 25, 2012
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Publication number: 20120319220
    Abstract: A method of bonding a semiconductor substrate having a substrate 11 formed with a MEMS sensor and a substrate 21 having a bonding portion 30b film-formed by contacting an aluminum containing layer 31 with a germanium layer 32 on either a front surface or a rear surface and formed with an integrated circuit that controls the MEMS sensor, either a front surface or a rear surface of the substrate 11 is put to contact directly on the bonding portion of the substrate 21 to bond by eutectic bonding with pressurization and heating.
    Type: Application
    Filed: December 11, 2009
    Publication date: December 20, 2012
    Applicants: PIONEER MICRO TECHNOLOGY CORPORATION, PIONEER CORPORATION
    Inventors: Naoki Noda, Toshio Yokouchi, Masahiro Ishimori
  • Publication number: 20120313194
    Abstract: A switching device including a first dielectric layer having a first top surface, two conductive features embedded in the first dielectric layer, each conductive feature having a second top surface that is substantially coplanar with the first top surface of the first dielectric layer, and a set of discrete islands of a low diffusion mobility metal between the two conductive features. The discrete islands of the low diffusion mobility metal may be either on the first top surface or embedded in the first dielectric layer. The electric conductivity across the two conductive features of the switching device increases when a prescribed voltage is applied to the two conductive features. A method of forming such a switching device is also provided.
    Type: Application
    Filed: June 8, 2011
    Publication date: December 13, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chih-Chao Yang, Stephan A. Cohen, Baozhen Li
  • Publication number: 20120305785
    Abstract: In a method of manufacturing a detection device including a plurality of pixels arrayed on a substrate, the pixels each including a switch element and a conversion element including an impurity semiconductor layer disposed on an electrode, which is disposed above the switch element, which is isolated per pixel, and which is made of a transparent conductive oxide joined to the switch element, and further including an interlayer insulating layer, which is made of an organic material, which is disposed between the switch elements and the electrodes, and which covers the switch elements, the method includes insulating members each made of an inorganic material and disposed to cover the interlayer insulating layer between adjacent two of the electrodes in contact with the interlayer insulating layer, and forming an impurity semiconductor film covering the insulating members and the electrodes and becoming the impurity semiconductor layer.
    Type: Application
    Filed: May 22, 2012
    Publication date: December 6, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Kentaro Fujiyoshi, Chiori Mochizuki, Minoru Watanabe, Masato Ofuji, Keigo Yokoyama, Jun Kawanabe, Hiroshi Wayama
  • Patent number: 8316745
    Abstract: Techniques are here disclosed for a solar cell pre-processing method and system for annealing and gettering a solar cell semiconductor wafer having an undesirably high dispersion of transition metals, impurities and other defects. The process forms a surface contaminant layer on the solar cell semiconductor (e.g., silicon) wafer. A surface of the semiconductor wafer receives and holds impurities, as does the surface contaminant layer. The lower-quality semiconductor wafer includes dispersed defects that in an annealing process getter from the semiconductor bulk to form impurity cluster toward the surface contaminant layer. The impurity clusters form within the surface contaminant layer while increasing the purity level in wafer regions from which the dispersed defects gettered. Cooling follows annealing for retaining the impurity clusters and, thereby, maintaining the increased purity level of the semiconductor wafer in regions from which the impurities gettered.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: November 27, 2012
    Assignee: Calisolar Inc.
    Inventors: Fritz G. Kirscht, Kamel Ounadjela, Jean Patrice Rakotoniaina, Dieter Linke
  • Publication number: 20120280349
    Abstract: The present invention relates to a photovoltaic module structure 1 and to a method for establishing an electrically conductive connection between two spaced contact layers 4?, 6?, in particular in the photovoltaic module structure 1 according to the invention. The production method is particularly simple and economical and the photovoltaic module structure 1 according to the invention enables a significant gain in efficiency.
    Type: Application
    Filed: November 10, 2010
    Publication date: November 8, 2012
    Inventors: Frank Becker, Michael Bauer, Jochen Frenck, Robert Fischer
  • Publication number: 20120273815
    Abstract: The present invention related to a lift-off structure adapted to a substrate having a photoelectric device, the structure comprising: a buffer layer, forming on the substrate; an upper sacrificial layer, forming on the buffer layer; an etch stop layer, forming on the upper sacrificial layer, and the photoelectric device structure forming on the etch stop layer.
    Type: Application
    Filed: October 14, 2011
    Publication date: November 1, 2012
    Applicant: Institute of Nuclear Energy Research Atomic Energy Council, Executive Yuan
    Inventors: YU-LI TSAI, Chih-Hung Wu, Jei-Li Ho, Chao-Huei Huang, Min-De Yang