Abstract: According to one embodiment, a memory device includes a first electrode, a second electrode and an insulating portion. The first electrode includes an ionizable metal. The second electrode includes a conductive material. The conductive material is more difficult to ionize than the metal. The insulating portion is provided between the first electrode and the second electrode. The insulating portion is made of an insulating material. A space is adjacent to a side surface of the insulating portion between the first electrode and the second electrode.

Abstract: Passivation of group III-nitride heterojunction devices is described herein. The passivation facilitates simultaneous realization of effective/high current collapse suppression and low leakage current without the use of a sophisticated multiple-field plate technique. The passivation can be achieved by growing a charge-polarized AlN thin film on the surface of a group III-nitride based heterojunction device by plasma-enhanced atomic layer deposition such that positive polarization charges are induced at the interface to compensate for a majority of negative charges at the interface.

Abstract: A non-volatile memory device structure. The device structure includes a first electrode, a second electrode, a resistive switching material comprising an amorphous silicon material overlying the first electrode, and a thickness of dielectric material having a thickness ranging from 5 nm to 10 nm disposed between the second electrode and the resistive switching layer. The thickness of dielectric material is configured to electrically breakdown in a region upon application of an electroforming voltage to the second electrode. The electrical breakdown allows for a metal region having a dimension of less than about 10 nm by 10 nm to form in a portion of the resistive switching material.

Abstract: In a process for fabrication of an optical slot waveguide on silicon, a thin single-crystal silicon film is deposited on a substrate covered with an insulating buried layer; a local thermal oxidation is carried out over the entire depth of the thin single-crystal silicon film in order to form an insulating oxidized strip extending along the desired path of the waveguide; an insulating or semi-insulating layer is deposited on the silicon film; two openings having vertical sidewalls are excavated over the entire thickness of this insulating or semi-insulating layer, said openings being separated by a narrow gap constituting an insulating or semi-insulating vertical wall that will be the material of the slot; single-crystal silicon is grown in the openings and right to the edges of the insulating or semi-insulating wall; and then the upper part of the silicon is etched in order to complete the geometry of the waveguide.

Abstract: This invention concerns a quantum device, suitable for quantum computing, based on dopant atoms located in a solid semiconductor or insulator substrate. In further aspects the device is scaled up. The invention also concerns methods of reading out from the devices, initializing them, using them to perform logic operations and making them.

Abstract: In accordance with aspects of the invention, a method of forming a memory cell is provided, the method including forming a steering element above a substrate, and forming a memory element coupled to the steering element, wherein the memory element comprises a carbon-based material having a thickness of not more than ten atomic layers. The memory element may be formed by repeatedly performing the following steps: forming a layer of a carbon-based material, the layer having a thickness of about one monolayer, and subjecting the layer of carbon-based material to a thermal anneal. Other aspects are also described.

Abstract: Ionisation of one of a pair of dopant atoms in a substrate creates a double well potential, and a charge qubit is realised by the location of one or more electrons or holes within this potential. The dopant atoms may comprise phosphorous atoms, located in a silicon substrate. A solid state quantum computer may be formed using a plurality of pairs of dopant atoms, corresponding gate electrodes, and read-out devices comprising single electron transistors.