Manufacturing Circuit On Or In Base Patents (Class 29/846)
  • Patent number: 11953793
    Abstract: A display panel and a display module are provided. The display panel includes a first base, a black matrix layer, and a color resist layer, wherein the black matrix layer includes a plurality of openings, the color resist layer is disposed above the first base and filled in the plurality of openings. A light reflectivity of a side of the black matrix layer away from the first base is greater than a light reflectivity of a side of the black matrix layer close to the first base.
    Type: Grant
    Filed: February 28, 2023
    Date of Patent: April 9, 2024
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Yanfen Li, Lixuan Chen, Xingwu Chen
  • Patent number: 11946896
    Abstract: A GABA detecting probe having a probe body with both a glutamate (Glu) micro-sensor and a GABA micro-sensor positioned on the probe body. The Glu micro-sensor and the GABA micro-sensor include electrodes having a surface modification with (i) GOx and a binding matrix, and (ii) GABASE, GOx, and the binding matrix, respectively. The sensors are positioned no further apart than 250 um and includes a sentinel site located on the probe body.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: April 2, 2024
    Assignee: Louisiana Tech Research Corporation
    Inventor: Prabhu Arumugam
  • Patent number: 11942239
    Abstract: The present application provides a conductive film, a manufacturing method of the conductive film, and a display device. The present application prevents refracted light by using a first metal layer to fully cover a second metal layer of a middle layer, thereby fundamentally solving black level stripes caused by lateral etching of the second metal layer.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: March 26, 2024
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD
    Inventor: Jianlong Huang
  • Patent number: 11924961
    Abstract: A circuit board includes a conductive metal layer, at least one insulating layer, at least one thermally conductive insulating layer and a heat dissipation element. The conductive metal layer is mainly used to transmit electronic signals. The insulating layer is connected to the conductive metal layer. The thermally conductive insulating layer is sandwiched between the conductive metal layer and the insulating layer, and thermally contacts the conductive metal layer, and is used for thermally conducting the heat of the conductive metal layer. The heat dissipation element is in thermal contact with the thermally conductive insulating layer, and is used to conduct the heat of the thermally conductive insulating layer to the outside through a heat dissipation channel.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: March 5, 2024
    Assignee: Unimicron Technology Corp.
    Inventors: Ai Jing Lin, Chung-Yu Lan, Jia Hao Liang
  • Patent number: 11923302
    Abstract: Semiconductor devices and methods of manufacture are provided wherein a metallization layer is located over a substrate, and a power grid line is located within the metallization layer. A signal pad is located within the metallization layer and the signal pad is surrounded by the power grid line. A signal external connection is electrically connected to the signal pad.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Fong-Yuan Chang, Noor Mohamed Ettuveettil, Po-Hsiang Huang, Sen-Bor Jan, Ming-Fa Chen, Chin-Chou Liu, Yi-Kan Cheng
  • Patent number: 11890850
    Abstract: Embodiments of the disclosure provide a flexible and stretchable textile composite including an electrophoretic film. According to one embodiment, a textile composite material can comprise a textile base layer, a first flexible, optically transparent film layer deposited onto and affixed to the textile base layer, and an electrophoretic film layer disposed onto the first flexible, optically transparent film layer on a side of the first flexible, optically transparent film layer opposite the textile base layer. The electrophoretic film layer can comprise a plurality of relief cuts therein. The plurality of relief cuts can allow the electrophoretic film layer to flex or stretch in at least one direction.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: February 6, 2024
    Assignee: Flex Ltd.
    Inventors: Adam M. Whiton, Mark A. Bergman, Eva W. Maskalenko, Anthony Joseph Piazza
  • Patent number: 11848508
    Abstract: A flexible connector, comprising an insulator (10), multiple first conductors (11) are disposed on one side surface of the insulator (10), and multiple second conductors (12) are disposed on the other side surface of the insulator (10), the insulator (10) is further provided with a conductive medium (13) connecting the first conductors (11) and the second conductors (12), and protrusion portions (14) are disposed on the surfaces of the first conductors (11) and the second conductors (12).
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: December 19, 2023
    Assignee: GUANGZHOU FANGBANG ELECTRONICS CO., LTD.
    Inventor: Zhi Su
  • Patent number: 11837400
    Abstract: One object is to provide an electronic component in which a standoff for filling solder is maintained. An electronic component according to an embodiment of the present invention is configured to be surface-mountable on a circuit board. The electronic component includes: an insulating base member; an internal conductor provided in the base member; a first external electrode provided on the mounting surface of the base member so as to be electrically connected to the internal conductor; and a second external electrode provided on the mounting surface of the base member so as to be electrically connected to the internal conductor. The first external electrode has a first protrusion, and the second external electrode has a second protrusion. The first protrusion and the second protrusion enables a standoff for filling solder to be maintained within a region defined by the mounting surface of the base member and the circuit board.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: December 5, 2023
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Takayuki Sekiguchi, Tsuyoshi Ogino, Takao Shibuya
  • Patent number: 11828953
    Abstract: There is provided a frame time-based optical display system, having a control unit, a two-dimensional array of more than two pixels, each of the pixels being an element having a front surface, emitting an output light wave, each of the pixels includes means for controlling the amplitude and direction of the output light wave for each time of the display, wherein for each of the pixels the direction of the output light wave is separately, dynamically and externally controlled by the control unit.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: November 28, 2023
    Inventors: Yaakov Amitai, Mori Amitai, Menachem Amitai
  • Patent number: 11824010
    Abstract: Described are semiconductor interposer, and microelectronic device assemblies incorporating such semiconductor interposers. The described interposers include multiple redistribution structures on each side of the core; each of which may include multiple individual redistribution layers. The interposers may optionally include circuit elements, such as passive and/or active circuit. The circuit elements may be formed at least partially within the semiconductor core.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: November 21, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Owen Fay, Chan H. Yoo
  • Patent number: 11818835
    Abstract: A multilayer printed wiring board including one or more insulating layers 2 and at least one conductive layer 1 which are stacked alternately is disclosed. The one or more insulating layers 2 include at least one liquid crystal polymer resin layer 4 so that each of the one or more insulating layers 2 includes at least one layer selected from a group consisting of at least one polyolefin resin layer 3 and the at least one liquid crystal polymer resin layer 4. A percentage by volume of the at least one liquid crystal polymer resin layer 4 relative to the one or more insulating layers 2 is within a range of 5 to 90%.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: November 14, 2023
    Assignees: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD., TOMOEGAWA CO., LTD.
    Inventors: Hiroaki Takahashi, Kiyotaka Komori, Masaya Koyama, Jun Tochihira, Ryu Harada
  • Patent number: 11808917
    Abstract: An optical assembly includes a first flexible membrane and a first optical element coupled with at least a first portion of the first flexible membrane. The optical assembly also includes a substrate having a curved surface. The first optical element is coupled to the curved surface of the substrate with the first flexible membrane. A method for making an optical assembly includes obtaining a first flexible membrane and a first optical element. The method includes coupling the first optical element with at least a first portion of the first flexible membrane and coupling, with the first flexible membrane, the first optical element to a curved surface of a substrate.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: November 7, 2023
    Assignee: META PLATFORMS TECHNOLOGIES, LLC
    Inventors: Babak Amirsolaimani, Scott Charles McEldowney, Andrew John Ouderkirk
  • Patent number: 11806148
    Abstract: A patient monitoring sensor having a communication interface, through which the patient monitoring sensor can communicate with a monitor is provided. The patient monitoring sensor includes a light-emitting diode (LED) communicatively coupled to the communication interface and a detector, communicatively coupled to the communication interface, capable of detecting light. The patient monitoring sensor also includes a faraday cage disposed around the detector, wherein the faraday cage includes an aperture configured to limit an amount of light from the LED that the detector is able to detect.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: November 7, 2023
    Assignee: COVIDIEN LP
    Inventors: Linden A. Reustle, Sarah L. Hayman, Jacob Dove, Shai Fleischer, Derek L. Moody
  • Patent number: 11799554
    Abstract: An interposer device includes a substrate that includes a laser source chip interface region, a silicon photonics chip interface region, an optical amplifier module interface region. A fiber-to-interposer connection region is formed within the substrate. A first group of optical conveyance structures is formed within the substrate to optically connect a laser source chip to a silicon photonics chip when the laser source chip and the silicon photonics chip are interfaced to the substrate. A second group of optical conveyance structures is formed within the substrate to optically connect the silicon photonics chip to an optical amplifier module when the silicon photonics chip and the optical amplifier module are interfaced to the substrate. A third group of optical conveyance structures is formed within the substrate to optically connect the optical amplifier module to the fiber-to-interposer connection region when the optical amplifier module is interfaced to the substrate.
    Type: Grant
    Filed: July 16, 2022
    Date of Patent: October 24, 2023
    Assignee: Ayar Labs, Inc.
    Inventors: Chen Sun, Roy Edward Meade, Mark Wade, Alexandra Wright, Vladimir Stojanovic, Rajeev Ram, Milos Popovic, Derek Van Orden, Michael Davenport
  • Patent number: 11778723
    Abstract: A circuit board has a main board with a base material of insulating material, at least one metal base copper clad laminate, and each metal base copper clad laminate is provided with at least one component and a pin connected with the main board. The circuit board and the driving power supply with the circuit board have simple structure and low manufacturing cost, and are convenient for automatic manufacturing. The power device can be directly mounted on the metal substrate through the automation equipment, so that the metal substrate can realize the function of the heat sink, thereby improving the production efficiency and reducing the process quality hidden danger; at the same time, the grounding problem of the metal substrate is solved, and the EMC problem is avoided.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: October 3, 2023
    Assignee: Self Electronics Co., Ltd.
    Inventors: Zai Le, Sheng Zhang, Lihong Tong
  • Patent number: 11764077
    Abstract: The embodiment of the disclosure provides a composite layer circuit element and a manufacturing method thereof. The manufacturing method of the composite layer circuit element includes the following. A carrier is provided. A first dielectric layer is formed on the carrier, and the first dielectric layer is patterned. The carrier on which the first dielectric layer is formed is disposed on a first curved-surface mold, and the first dielectric layer is cured. A second dielectric layer is formed on the first dielectric layer. The second dielectric layer is patterned. The carrier on which the first dielectric layer and the second dielectric layer are formed is disposed on a second curved-surface mold, and the second dielectric layer is cured. A thickness of a projection of the first curved-surface mold is smaller than a thickness of a projection of the second curved-surface mold.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: September 19, 2023
    Assignee: Innolux Corporation
    Inventors: Chuan-Ming Yeh, Heng-Shen Yeh, Kuo-Jung Fan, Cheng-Chi Wang
  • Patent number: 11728810
    Abstract: An operator control device for a vehicle, and a method for operating such an operator control device is disclosed. The operator control device is for controlling safety-relevant functions. To this end, the operator control device has at least one user interface having at least one user input panel for user input and a sensor system for identifying a user input in the area of the user input panel, wherein the sensor system has at least one capacitive sensor device having a first, electrically conductive sensor structure and a second, capacitive sensor device having a second, electrically conductive sensor structure, the sensor structures being arranged beneath the user interface in the area of the user input panel. The first sensor structure and the second sensor structure are each configured in comb-like and/or meanderous fashion and arranged in intermeshing fashion at least in a subarea of the user input panel.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: August 15, 2023
    Assignee: Valeo Schalter und Sensoren GmbH
    Inventor: Sascha Staude
  • Patent number: 11698316
    Abstract: A pressure sensor, a manufacturing method thereof, a pressure sensing method and a display device are provided. The pressure sensor includes a first electrode, at least two supports on a first surface of the first electrode, an elastic composite electrode on a side of the supports facing away from the first electrode. Two adjacent supports of the supports, the elastic composite electrode and the first electrode define a compressible space, and the at least two supports are formed of an insulating material. The pressure sensor further comprises a second electrode on a side of the elastic composite electrode facing away from the first electrode and an organic light emitting layer between the first electrode and the second electrode, the organic light emitting layer being in contact with one of the first electrode and the second electrode. The pressure sensor has advantages of low power consumption, fast response and high sensitivity.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: July 11, 2023
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Rui Peng, Xiang Wan, Zhijie Ye, Yue Hu
  • Patent number: 11656195
    Abstract: Systems and methods are provided that address the need to frequently calibrate analyte sensors, according to implementation. In more detail, systems and methods provide a preconnected analyte sensor system that physically combines an analyte sensor to measurement electronics during the manufacturing phase of the sensor and in some cases in subsequent life phases of the sensor, so as to allow an improved recognition of sensor environment over time to improve subsequent calibration of the sensor.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: May 23, 2023
    Assignee: Dexcom, Inc.
    Inventors: Naresh C. Bhavaraju, Becky L. Clark, Vincent P. Crabtree, Chris W. Dring, Arturo Garcia, Jason Halac, Jonathan Hughes, Jeff Jackson, Lauren Hruby Jepson, David I-Chun Lee, Ted Tang Lee, Rui Ma, Zebediah L. McDaniel, Jason Mitchell, Andrew Attila Pal, Daiting Rong, Disha B. Sheth, Peter C. Simpson, Stephen J. Vanslyke, Matthew D. Wightlin, Anna Leigh Davis, Hari Hampapuram, Aditya Sagar Mandapaka, Alexander Leroy Teeter, Liang Wang
  • Patent number: 11653439
    Abstract: Provided is a ground member that can prevent damage to interlayer adhesion between a conductive layer and an adhesive layer of the ground member due to heating in producing a shielded printed wiring board or in mounting an electronic component on a shielded printed wiring board. The ground member of the present invention includes: a conductive layer; and an adhesive layer stacked on the conductive layer, the adhesive layer containing a binder component and hard particles, the adhesive layer having a thickness of 5 to 30 ?m.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: May 16, 2023
    Assignee: TATSUTA ELECTRIC WIRE & CABLE CO., LTD.
    Inventors: Yoshihiko Aoyagi, Kenji Kamino, Yuusuke Haruna
  • Patent number: 11643525
    Abstract: An electronic device with self-recovering properties including a substrate including a polymer composite, a conductive pattern disposed on the substrate, and an electrode disposed on the conductive pattern is provided, and the polymer composite includes a composite of different first and second polymers, the first polymer includes a first functional group capable of forming a hydrogen bond between polymer chains, and the second polymer includes a second functional group capable of forming a hydrogen bond between polymer chains.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: May 9, 2023
    Assignee: Korea University Research and Business Foundation
    Inventors: Jeongsook Ha, Jungwook Kim
  • Patent number: 11616165
    Abstract: The present disclosure provides a method for manufacturing an electronic device. First, a plurality of light-emitting elements is provided on a first substrate. Then, at least one of the plurality of light-emitting elements is transferred from the first substrate to a second substrate by a transferring head. The transferring head includes an electrode and a cantilever supporting the electrode, and the cantilever includes a U-shaped portion.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: March 28, 2023
    Assignee: InnoLux Corporation
    Inventors: Hui-Chieh Wang, Tsau-Hua Hsieh, Fang-Ying Lin
  • Patent number: 11610929
    Abstract: The present disclosure relates to a semiconductor element, a manufacturing method of a semiconductor element, and an electronic apparatus, which enable suppression of crack occurrences and leaks. The present technology has a laminated structure including an insulating film having a CTE value between those of metal and Si and disposed under a metal wiring, and P—SiO (1 ?m) having good coverage and disposed as a via inner insulating film in a TSV side wall portion. As the insulating film having a CTE that is in the middle between those of metal and Si, for example, SiOC is used with a thickness of 0.1 ?m and 2 ?m respectively in the via inner insulating film and a field top insulating film continuous to the via inner insulating film. The present disclosure can be applied to, for example, a solid-state imaging element used in an imaging device.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: March 21, 2023
    Assignee: SONY CORPORATION
    Inventor: Naoto Sasaki
  • Patent number: 11605487
    Abstract: A laminate includes multiple paper layers, with at least one induction coil comprising first and second sets of windings. Two or more paper layers include the sets of windings comprising an electrically-conductive material. The sets of windings may be distributed throughout the laminate layers and provide good wireless induction charging performance in a compact space.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: March 14, 2023
    Assignee: THE DILLER CORPORATION
    Inventors: Robert Jacob Kramer, Kevin Francis O'Brien
  • Patent number: 11532569
    Abstract: A semiconductor package structure includes a first redistribution layer, a second redistribution layer and an interconnecting structure. The first redistribution layer has a first surface and a second surface opposite to each other. The second redistribution layer is disposed over the first surface of the first redistribution layer, wherein the second redistribution layer has a third surface and a fourth surface opposite to each other, and the third surface facing the first surface. The interconnecting structure is disposed between and electrically connected to the first redistribution layer and the second redistribution layer, wherein the interconnecting structure comprises a conductive post and a conductive bump stacked to each other.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: December 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jui-Pin Hung, Feng-Cheng Hsu, Shuo-Mao Chen, Shin-Puu Jeng, De-Dui Marvin Liao
  • Patent number: 11527479
    Abstract: A chip package including a chip; a substrate; an interposer module including a first layer having a larger surface area than the surface area of a second layer, wherein a bottom of the second layer is attached to a top of the first layer area creating an exposed surface area of the first layer; via openings extending at least partially through the first layer; via openings extending at least partially through the first layer and the second layer; a plurality of conductive routing electrically coupled between the via openings, wherein the chip is electrically coupled to the via openings of a top of the second layer, wherein the substrate is electrically coupled to via openings of a bottom of the first layer; and an electronic component electrically coupled to the via openings of the exposed surface area of the first layer.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: December 13, 2022
    Assignee: Intel Corporation
    Inventors: Chin Lee Kuan, Bok Eng Cheah, Jackson Chung Peng Kong
  • Patent number: 11527485
    Abstract: The present disclosure relates to a semiconductor package that may include a substrate, an interposer coupled to the substrate, a shield frame including at least one frame recess and at least one opening positioned over the interposer, a conductive shield layer on the shield frame, and a plurality of components coupled to the interposer.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: December 13, 2022
    Assignee: Intel Corporation
    Inventors: Seok Ling Lim, Bok Eng Cheah, Jenny Shio Yin Ong, Jackson Chung Peng Kong, Kooi Chi Ooi
  • Patent number: 11494039
    Abstract: A touch sensor having a visible area and a peripheral area at least on one side of the visible area includes a substrate, a touch electrode layer, and peripheral traces. The touch electrode layer is disposed on a surface of the substrate and includes touch electrodes corresponding to the visible area. The peripheral traces are disposed on the surface of the substrate and corresponding to the peripheral area. The peripheral traces are respectively electrically connected to the touch electrodes. Each of the peripheral traces includes a matrix and metal nanowires distributed in the matrix. A line width of each of the peripheral traces is more than or equal to 6 ?m and less than or equal to 12 ?m, and a line spacing of any adjacent peripheral traces of the peripheral traces is more than or equal to 6 ?m and less than or equal to 12 ?m.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: November 8, 2022
    Assignee: TPK Advanced Solutions Inc.
    Inventors: Shao Jie Liu, Qin Xue Fang, Xue Long Zhang, Mei Fang Lan, Wei-Chia Fang, En-Chia Chang, Xiao Ping Guo
  • Patent number: 11488906
    Abstract: A bridge embedded interposer and a package substrate and a semiconductor package including the same includes: a connection structure including one or more redistribution layers, a first bridge disposed on the connection structure and including one or more first circuit layers electrically connected to the one or more redistribution layers, a frame disposed around the first bridge on the connection structure and including one or more wiring layers electrically connected to the one or more redistribution layers, and an encapsulant disposed on the connection structure and covering at least a portion of each of the first bridge and the frame.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: November 1, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jung Hyun Cho, Young Kwan Lee, Young Sik Hur, Yun Tae Lee, Ho Kwon Yoon
  • Patent number: 11476035
    Abstract: A coil component includes: a magnetic body part having a first compact containing a first magnetic material and a first resin, and a second compact placed on the outside of the first compact and containing a second magnetic material and a second resin; a coil formed by a conductive wire which comprises a metal conductor covered with an insulating film, and embedded in the magnetic body part; and lead parts of the coil placed on the outside of the first compact; wherein the filling rate of the first magnetic material constituting the first compact is higher than the filling rate of the second magnetic material constituting the second compact. The filling rate of magnetic grains can be improved while also ensuring the insulating property of the coil, etc.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: October 18, 2022
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Makoto Shimizu, Tomoo Kashiwa
  • Patent number: 11448965
    Abstract: Disclosed herein are methods for patterning two-dimensional atomic layer materials, the methods comprising: illuminating a first location of an optothermal substrate with electromagnetic radiation, wherein the optothermal substrate converts at least a portion of the electromagnetic radiation into thermal energy, and wherein the optothermal substrate is in thermal contact with a two-dimensional atomic layer material; thereby: generating an ablation region at a location of the two-dimensional atomic layer material proximate to the first location of the optothermal substrate, wherein at least a portion of the ablation region has a temperature sufficient to ablate at least a portion of the two-dimensional atomic layer material within the ablation region, thereby patterning the two-dimensional atomic layer material. Also disclosed herein are systems for performing the methods described herein, patterned two-dimensional atomic layer materials made by the methods described herein and methods of use thereof.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: September 20, 2022
    Assignee: Board of Regents, The University of Texas System
    Inventors: Yuebing Zheng, Linhan Lin, Jingang Li
  • Patent number: 11424743
    Abstract: An operator control device for a vehicle, and a method for operating such an operator control device is disclosed. The operator control device is for controlling safety-relevant functions. To this end, the operator control device has at least one user interface having at least one user input panel for user input and a sensor system for identifying a user input in the area of the user input panel, wherein the sensor system has at least one capacitive sensor device having a first, electrically conductive sensor structure and a second, capacitive sensor device having a second, electrically conductive sensor structure, the sensor structures being arranged beneath the user interface in the area of the user input panel. The first sensor structure and the second sensor structure are each configured in comb-like and/or meanderous fashion and arranged in intermeshing fashion at least in a subarea of the user input panel.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: August 23, 2022
    Assignee: Valeo Schalter und Sensoren GmbH
    Inventor: Sascha Staude
  • Patent number: 11417604
    Abstract: A method embodiment includes forming a patterned first photo resist over a seed layer. A first opening in the patterned first photo resist exposes the seed layer. The method further includes plating a first conductive material in the first opening on the seed layer, removing the patterned first photo resist, and after removing the patterned first photo resist, forming a patterned second photo resist over the first conductive material. A second opening in the patterned second photo resist exposes a portion of the first conductive material. The method further includes plating a second conductive material in the second opening on the first conductive material, removing the patterned second photo resist, and after removing the patterned second photo resist, depositing a dielectric layer around the first conductive material and the second conductive material.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: August 16, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Hua Yu, Hung-Jui Kuo, Hui-Jung Tsai
  • Patent number: 11399432
    Abstract: A component carrier includes a stack with a plurality of electrically conductive layer structures and at least one electrically insulating layer structure. The electrically conductive layer structures include an electrically conductive vertical through-connection and a horizontally extending electrically conductive trace electrically coupled with an end portion of the vertical through-connection. A back-drill hole extends through at least part of the at least one electrically insulating layer structure towards the end portion of the vertical through-connection. An etching neck connects the back-drill hole with the end portion of the vertical through-connection.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: July 26, 2022
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Markus Kastelic, Lackner Sebastian
  • Patent number: 11380648
    Abstract: The invention concerns a support intended for the implementation of a method of self-assembly of at least one element on a surface of the support, including at least one assembly pad on said surface, a liquid drop having a static angle of contact on the assembly pad smaller than or equal to 15°, and nanometer- or micrometer-range pillars on said surface around the pad, the liquid drop having a static angle of contact on the pillars greater than or equal to 150°.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: July 5, 2022
    Assignee: Commissariat à l'Energie Atomique et aux Energies Alternatives
    Inventors: Léa Di Cioccio, Jean Berthier, Nicolas Posseme
  • Patent number: 11337309
    Abstract: Disclosed herein is a method of forming vias in electrical laminates comprising laminating a sheet having a layer comprising a crosslinkable polymer composition to a substrate wherein the crosslinkable polymer composition has a viscosity at lamination temperatures in the range of 200 Pa-s to 100,000 Pa-s, forming at least one via in the crosslinkable polymer layer by laser ablation; and after the forming of the at least one via, thermally curing the crosslinkable polymer layer. According to certain embodiments the cross linkable polymer composition has a viscosity at lamination temperature of at least 5000 Pa-s. This method yields good lamination results, good via profiles, and good desmear results when such compositions are used and the via is laser ablated before cure.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: May 17, 2022
    Assignee: ROHM AND HAAS ELECTRONIC MATERIALS LLC
    Inventors: Tina Aoude, David Fleming, Michelle Bowerman Riener, Colin O'Mara Hayes, Herong Lei, Robert K. Barr, David Louis Danza
  • Patent number: 11320417
    Abstract: In a non-limiting embodiment, a device may include a substrate having conducting lines thereon. One or more fin structures may be arranged over the substrate. Each fin structure may include a sensor arranged over the substrate and around the fin structure. The sensor may include a self-aligned first sensing electrode and a self-aligned second sensing electrode arranged around the fin structure. The first sensing electrode and the second sensing electrode each may include a first portion lining a sidewall of the fin structure and a second portion arranged laterally from the first portion. At least the first portion of the first sensing electrode and the first portion of the second sensing electrode may define a sensing cavity of the sensor. The second portion of the first sensing electrode and the second portion of the second sensing electrode may be electrically coupled to the conducting lines.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: May 3, 2022
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Xinshu Cai, Shyue Seng Tan, Eng Huat Toh, Kiok Boone Elgin Quek
  • Patent number: 11317522
    Abstract: Provided is a method of manufacturing a circuit board involves: preparing a composite laminate including a support, a release layer, and a multilayered circuit board; disposing the composite laminate on a stage such that one face of the composite laminate is put into tight contact with the stage; and releasing the support or the multilayered circuit board from the release layer such that the support or the multilayered circuit board forms a convex face with a curvature radius of 200 to 5000 mm while the face of the composite laminate is kept in tight contact with the stage. The method according to the present invention can prevent the occurrences of defects, for example, breaking in the support and cracking and wire disconnections in the multilayered circuit board in manufacturing of circuit boards, such as coreless circuit boards, and ensure stable release of the support or the multilayered circuit board.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: April 26, 2022
    Assignee: MITSUI MINING & SMELTING CO., LTD.
    Inventors: Toshimi Nakamura, Yoshinori Matsuura
  • Patent number: 11293495
    Abstract: A bush assembly configured to be disposed between a first component and a second component movably coupled to the first component, the bush assembly comprising a first bush portion comprising a self-lubricating material; and a second bush portion, the second bush portion having greater electrical conductivity than the first bush portion, wherein the second bush portion provides a conductive path between the first component and the second component.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: April 5, 2022
    Inventors: Daniel Haikney, Neil Price
  • Patent number: 11293952
    Abstract: A passive current sensor includes a pair of electrically conductive busbars, a shunt resistor electrically connecting the busbars, and a support having a first pair of voltage drop measuring contacts. At least one of the voltage drop measuring contacts is attached to each of the busbars and forms a direct electrical contact between the at least one voltage drop measuring contact and the busbar.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: April 5, 2022
    Assignee: TE CONNECTIVITY GERMANY GMBH
    Inventors: Christoph Mueller, Sven Faas, Jens Gruendler, Walter Weinerth, Thimo Paulus, Claudio Negretti, Christoph Kraemer
  • Patent number: 11291110
    Abstract: A resin substrate includes a resin body, an interlayer connection conductor provided in the resin body, and a conductor pattern bonded to the interlayer connection conductor. The resin body includes a gap provided adjacent to or in a vicinity of a bonding portion of the interlayer connection conductor and the conductor pattern, and a contact portion that contacts the interlayer connection conductor.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: March 29, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yusuke Kamitsubo
  • Patent number: 11234329
    Abstract: A prepreg is used to fabricate a semiconductor package including a chip and a substrate to mount the chip thereon. The prepreg is in a semi-cured state. The substrate includes a cured product of the prepreg. The chip has: a first chip surface located opposite from the substrate; and a second chip surface located opposite from the first chip surface. The prepreg satisfies the relational expression: 0.9?X2/X1?1.0 (I), where X1 is a coefficient of thermal expansion of the first chip surface of the chip before the chip is mounted on the substrate, and X2 is a coefficient of thermal expansion of the first chip surface of the chip after the chip has been mounted on the substrate.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: January 25, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Rihoko Watanabe, Keiko Kashihara, Hiroharu Inoue
  • Patent number: 11229117
    Abstract: A printed circuit board includes: an insulating layer having one surface and the other surface; metal layers respectively disposed on the one surface and the other surface of the insulating layer; a through-hole penetrating through the insulating layer and the metal layers; a first plating layer disposed in a center portion of the through-hole in a thickness direction thereof; and a plug disposed in the through-hole.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: January 18, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jung Soo Kim, Jin Won Lee, Woo Seok Jeon
  • Patent number: 11217971
    Abstract: The present disclosure provides an AC power adapter comprising plural connectors, plural first power conveying wires, a junction box, a power conveying wire assembly and a plug. The first power conveying wire is connected with the connector and comprises an input neutral wire, an input live wire and an input ground wire. The first power conveying wire is inserted into the junction box. The power conveying wire assembly is inserted into the junction box and comprises plural output neutral wires, plural output live wires and an output ground wire. The output neutral wires are connected with the input neutral wires one-to-one, the output live wires are connected with the input live wires one-to-one, and the output ground wire is connected with the input ground wires. The plug comprises a housing and an electrical connector. The power conveying wire assembly is inserted into the housing and connected with the electrical connector.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: January 4, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventor: Yu-Hung Huang
  • Patent number: 11217951
    Abstract: The present disclosure provides an AC power adapter comprising input connectors, first power conveying wires, a junction box, a power conveying wire assembly and a plug. The first power conveying wire is coupled to the input connector and includes an input neutral wire, an input live wire and an input ground wire. The power conveying wire assembly is electrically connected to the first power conveying wire through the junction box and includes plural output neutral wires, plural output live wires and an output ground wire. The output neutral wires are coupled to the input neutral wires respectively, the output live wires are coupled to the input live wires respectively, and the output ground wire is coupled to the input ground wires. The plug includes a housing and an electrical connector. The power conveying wire assembly is inserted into the housing and connected with the electrical connector.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: January 4, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventor: Yu-Hung Huang
  • Patent number: 11158568
    Abstract: An apparatus is provided which comprises: a plurality of organic dielectric layers forming a substrate, a plurality of first conductive contacts on a top surface of the substrate, a plurality of second conductive contacts on a bottom surface of the substrate, a plurality of third conductive contacts on a side wall surface of the substrate, and one or more discrete capacitor(s) coupled with the third conductive contacts on the side wall surface. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: October 26, 2021
    Assignee: Intel Corporation
    Inventors: Jenny Shio Yin Ong, Seok Ling Lim
  • Patent number: 11152316
    Abstract: Methods of forming packages include forming an encapsulant laterally encapsulating a die over an active surface of the die. The active surface has an electrical pad. A first opening is formed through the encapsulant to the electrical pad. In some embodiments the first opening is formed using a photolithographic technique. In some embodiments the first opening is formed using a temporary pillar by forming the temporary pillar over the electrical pad, forming the encapsulant, and then exposing and removing the temporary pillar. A conductive pattern is formed over the encapsulant including a via formed in the first opening to the electrical pad of the die's active surface. In some embodiments, a dielectric layer is formed over the encapsulant, and the conductive pattern is over the dielectric layer. Embodiments may include forming additional dielectric layers and conductive patterns.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: October 19, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Feng-Cheng Hsu, Szu-Wei Lu, Jing-Cheng Lin
  • Patent number: 11121489
    Abstract: An electrical connector includes a flexible circuit with a flexible material and traces at least partially embedded in the flexible material. The electrical connector further includes a first set of conductive bumps, a second set of conductive bumps, and a stiffener. The first set of conductive bumps is coupled to respective first end portions of the traces and extends from a first side of the flexible circuit. The second set of conductive bumps is coupled to respective second end portions of the traces. The stiffener is coupled to the flexible circuit on a second side of the flexible circuit opposite the first side.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: September 14, 2021
    Assignee: Seagate Technology LLC
    Inventors: Peng Peng, William A. Casey, Dennis L. Buster, Kerry J. Johnson, Ruth LeMon, Ronald E. Anderson
  • Patent number: 11040873
    Abstract: In a method of manufacturing a highly stretchable three-dimensional (3D) percolated conductive nano-network structure, a 3D nano-structured porous elastomer including patterns distributed in a periodic network is formed. A surface of the 3D nano-structured porous elastomer is changed to a hydrophilic state. A polymeric material is conformally adhered on the surface of the 3D nano-structured porous elastomer. The surface of the 3D nano-structured porous elastomer is wet by infiltrating a conductive solution in which a conductive material is dispersed. A 3D percolated conductive nano-network coupled with the 3D nano-structured porous elastomer is formed by evaporating a solvent of the conductive solution and removing the polymeric material.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: June 22, 2021
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Seok-woo Jeon, Dong-hwi Cho
  • Patent number: 10947419
    Abstract: A composition of matter includes a first compatible material having particles containing chemical elements similar to a first substrate, and second compatible material having particles containing chemical elements similar to a second substrate, wherein the first substrate and the second substrate are chemically different. The particles are dispersed into a matrix that is in between the first and the second substrate. A deposition system has a multi-material printhead, a first reservoir of a first compatible material having particles containing chemical elements similar to a first substrate, a second reservoir of a second compatible material having particles containing chemical elements similar to a second substrate, a third reservoir of an polymer precursor material, and at least one mixer.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: March 16, 2021
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Gabriel Iftime, David Mathew Johnson, Jessica Louis Baker Rivest