Input Networks Patents (Class 330/185)
  • Patent number: 11146219
    Abstract: Example embodiments provide a process that includes one or more of receiving an audio signal at a feedback compressor circuit, receiving an auxiliary attenuation signal from an auxiliary attenuation source, determining a threshold power level based on a value of the auxiliary attenuation signal, determining an output power level of the audio signal exceeds the threshold power level, combining the audio signal with the auxiliary attenuation signal from the auxiliary attenuation source and a compressed attenuation signal from the feedback compressor circuit to create a combination signal, and generating an audio output signal of the feedback compressor circuit based on the combination signal.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: October 12, 2021
    Assignee: Biamp Systems, LLC
    Inventor: Aaron Faulstich
  • Patent number: 9350835
    Abstract: A mobile electronic device is provided. In one aspect, the mobile electronic device comprises a chassis including a ground plane; a processor carried by the chassis; a frequency tunable antenna carried by the chassis and fed by an inductor; a communications interface carried by the chassis and operative with the processor for receiving and transmitting RF signals via the frequency tunable antenna; audio circuitry carried by the chassis and operative with the communications interface and processor; an audio transducer having a coil in proximity to the frequency tunable antenna for at least one of receiving and transmitting audio signals from and to the audio circuitry; and at least one RF choke configured for blocking RF energy from the frequency tunable antenna through the audio transducer to the ground plane and decoupling the antenna from the audio transducer to minimize any detuning of antenna impedance match and degradation in antenna gain.
    Type: Grant
    Filed: July 23, 2014
    Date of Patent: May 24, 2016
    Assignee: BLACKBERRY LIMITED
    Inventors: Lizhong Zhu, Michael Stephen Corrigan, Rafaele Pini
  • Patent number: 9041611
    Abstract: An automatic antenna impedance matching method for a radiofrequency transmission circuit. An impedance matching network is inserted between an amplifier and an antenna. The output current and voltage of the amplifier and their phase difference are measured by a variable measurement impedance, and the complex load impedance of the amplifier is deduced from this; the impedance of the antenna is calculated as a function of this complex impedance and as a function of the known current values of the impedances of the matching network. Starting from the value found for the impedance of the antenna, new values of the matching network are calculated that allow the load to be matched to the nominal impedance of the amplifier. The measurement impedance has a value controllable by the calculation processor according to the application and notably as a function of the operating frequency and of the nominal impedance of the amplifier.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: May 26, 2015
    Assignee: Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Francis Chan Wai Po, Emeric De Foucauld
  • Publication number: 20150035595
    Abstract: An apparatus includes an integrated circuit. The integrated circuit includes a low-noise amplifier having a first complex input impedance. The integrated circuit includes a complex attenuator coupled to an input terminal of the integrated circuit. The complex attenuator has a second complex input impedance and a first complex output impedance. The apparatus may include a matching network coupled to the input terminal of the integrated circuit. The matching network is external to the integrated circuit. The matching network may have a first real input impedance and a second complex output impedance. The second complex output impedance is matched to the second complex input impedance.
    Type: Application
    Filed: July 30, 2013
    Publication date: February 5, 2015
    Applicant: Silicon Laboratories Inc.
    Inventors: Navin Harwalkar, Dan B. Kasha
  • Publication number: 20140349589
    Abstract: In accordance with some embodiments, the present disclosure relates to a dual mode control interface that can be used to provide both a radio frequency front end (RFFE) serial interface and a two-mode general purpose input/output (GPIO) interface within a single digital control interface die. In certain embodiments, the dual mode control interface, or digital control interface, can communicate with a power amplifier. Further, the dual mode control interface can be used to set the mode of the power amplifier.
    Type: Application
    Filed: June 10, 2014
    Publication date: November 27, 2014
    Inventor: David Steven Ripley
  • Publication number: 20140320205
    Abstract: Disclosed are devices and methods related to autotransformer-based impedance matching for radio-frequency (RF) applications. In some embodiments, an impedance matching device can include a primary metal trace and a secondary metal trace, each having a respective number of turns. Such metal traces can be interconnected to form an autotransformer with the primary metal trace and the secondary metal trace being in respective planes separated by a selected distance. Such an autotransformer can be utilized to, for example, facilitate impedance matching of an amplified RF signal from a power amplifier (PA). In some embodiments, the impedance matching device can be implemented as an integrated passive device (IPD) mountable on a packaging substrate. Such an IPD can be configured to allow stacking of another component on the IPD to yield a number of desirable features in products such as RF modules.
    Type: Application
    Filed: April 28, 2014
    Publication date: October 30, 2014
    Inventors: Aleksey A. LYALIN, Weimin SUN, Nicholas Quinn MUHLMEYER, Russ Alan REISNER
  • Patent number: 8867668
    Abstract: A data receiver, a method of operating a data receiver, and an integrated coupling system in a data receiver are disclosed. In one embodiment, the data receiver comprises an input terminal for receiving an input data signal, an input amplifier for amplifying selected components of the input data signal, and an input signal path for transmitting specified high-frequency components and a baseline component of the input data signal from the input terminal to the input amplifier. The data receiver further comprises a feed-forward resistive network connected to the input terminal and to the input amplifier. This feed forward resistive network is used to forward a low-frequency drift compensation signal from the input terminal to the input amplifier, using a passive resistive network, to compensate for low frequency variations in the input data signal, and to develop a desired bias voltage at the input amplifier.
    Type: Grant
    Filed: November 8, 2013
    Date of Patent: October 21, 2014
    Assignee: International Business Machines Corporation
    Inventors: Troy J. Beukema, Gautam Gangasani, Thomas H. Toifl
  • Publication number: 20140225680
    Abstract: Assigning multiple functions to a PA and simplifying wiring and circuits are achieved without using switches in a transmission-and-reception system using a high-frequency filter that supports multiple bands. Provided is a high-frequency filter including: first and second transmission filters; first and second reception filters; and a matching circuit connected to input sides of the first and second transmission filters. Transmission signals are inputted to the first and second transmission filters via the matching circuit. A resonator forming the matching circuit is serially connected to an input side of, among the first and second transmission filters, a filter whose passband is a higher frequency band.
    Type: Application
    Filed: October 24, 2012
    Publication date: August 14, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Joji Fujiwara, Tetsuya Tsurunari, Tomoya Komatsu, Hiroyuki Nakamura
  • Publication number: 20140170997
    Abstract: A power amplifying apparatus is provided. A reference signal generator provides a reference signal having an enabling state and a disabling state. A digital power amplifier generates a current based on the reference signal and an input signal. An output signal of the digital power amplifier is related to the current. When the reference signal is in the enabling state, the current is related to the input signal. When the reference signal is in the disabling state, the current is irrelevant to the input signal. During the enabling state of the reference signal, a data generator provides an output alternating between an in-phase signal and a quadrature-phase signal as the input signal to the digital power amplifier. When the reference signal is in the disabling state, the data generator provides a fixed signal as the input signal to the digital power amplifier.
    Type: Application
    Filed: December 19, 2012
    Publication date: June 19, 2014
    Applicant: MSTAR SEMICONDUCTOR, INC.
    Inventors: Chih-Ming Hung, Zhong-Xuan Zhang, Sheng-Che Tseng
  • Patent number: 8755454
    Abstract: An energy converter based transmitter, a method, a multi-element antenna array are provided for a radio frequency (RF) transmission. For example, the energy converter based transmitter can include a control circuit, a multiple input single output (MISO) operator, and an antenna. The control circuit is configured to receive input information and generate amplitude control signals and phase control signals. The MISO operator is configured to receive the amplitude control signals and the phase control signals and to generate an RF output signal. Further, the antenna is configured to receive and transmit the RF output signal.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: June 17, 2014
    Assignee: ParkerVision, Inc.
    Inventors: David F. Sorrells, Gregory Rawlins
  • Patent number: 8737643
    Abstract: A method for amplifier volume specification and control, the method includes: applying an initial volume level to an amplifier; determining one or more of: which A/V component has been selected for use, which channel or frequency is being outputted, and the type of outputted A/V content; modifying the initial amplifier volume level with one or more stored volume level settings in response to at least one of the following: the determined A/V component in use; the selected channel and frequency outputted, and the type of outputted A/V content; wherein the one or more stored volume level settings include: received volume level settings for audio/video (A/V) components; received volume level settings for selected channels and frequencies that are outputted by the A/V components; and received volume level settings for A/V content.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: May 27, 2014
    Assignee: International Business Machines Corporation
    Inventors: David J. Delia, Wayne M. Delia, Stacey L. Moore
  • Publication number: 20130342272
    Abstract: RF signal amplifiers are provided that include an RF input port, a switching device having an input that is coupled to the RF input port, a first output and a second output, a first diplexer having an input that is coupled to both the first output of the switching device and the second output of the switching device, and a first RF output port that is coupled to an output of the first diplexer. These amplifiers further include an attenuator that is coupled between the second output of the switching device and the input of the first diplexer.
    Type: Application
    Filed: February 7, 2013
    Publication date: December 26, 2013
    Applicant: COMMSCOPE, INC. OF NORTH CAROLINA
    Inventors: Robert R. Riggsby, Shi Man Li, Lee Ming Yao
  • Publication number: 20130278199
    Abstract: An apparatus, comprises three driver FETs coupled at their sources; note-driver circuit; a first sense FET coupled to the sources of the three driver FETs; a current mirror having the first sense FET and a mirror FET; wherein the first sense FET is coupled to the mirror FET; a first transconductance amplifier coupled to the first sense FET; a second amplifier coupled to the current mirror, and an output of the first transconductance amplifier is an input to the second amplifier.
    Type: Application
    Filed: March 20, 2013
    Publication date: October 24, 2013
    Inventors: Daijiro Otani, Nakoyuki Tsuruoka, Masaki Yamashita
  • Publication number: 20130222060
    Abstract: An impedance matching circuit is disclosed. The impedance matching circuit includes two or more mutually coupled inductors. A total self inductance of the impedance matching circuit is less than a corresponding impedance matching circuit that includes inductors that are not mutually coupled. The two or more mutually coupled inductors may have known current ratios that match current ratios in the corresponding impedance matching circuit.
    Type: Application
    Filed: February 27, 2012
    Publication date: August 29, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Chi Shun Lo, Jonghae Kim, Wesley Nathaniel Allen, Chengjie Zuo, Changhan Yun, Thomas Andrew Myers, Prasad Srinivasa Siva Gudem, Matthew Michael Nowak
  • Publication number: 20130165062
    Abstract: Disclosed is a tuner input circuit. The tuner input circuit includes an integrated including a low noise amplifier and a band pass filter embedded in one chip.
    Type: Application
    Filed: December 17, 2012
    Publication date: June 27, 2013
    Applicant: LG INNOTEK CO., LTD.
    Inventor: LG INNOTEK CO., LTD.
  • Publication number: 20130141161
    Abstract: There is provided a power amplifier capable of compensating for a distortion without deteriorating a gain of input voltage. The power amplifier includes an input terminal to which an input voltage is applied; a class AB power amplification circuit connected to the input terminal; and an element connected between the input terminal and the class AB power amplification circuit, turned on when the input voltage is equal to or greater than a predetermined value, and varying impedance thereof according to the input voltage.
    Type: Application
    Filed: September 12, 2012
    Publication date: June 6, 2013
    Inventors: Norihisa OTANI, Eiichiro Otobe
  • Publication number: 20130135053
    Abstract: A power amplifier includes a first matching circuit configured to perform harmonic processing of an input signal, and a second matching circuit configured to perform the harmonic processing of an output signal, the output signal being generated by amplifying a power of the input signal. The power amplifier rotates a phase of output impedance at a matching point of the harmonic included in the generated output signal when the power of the input signal is decreased from a value higher than a certain value to a value lower than the certain value.
    Type: Application
    Filed: November 20, 2012
    Publication date: May 30, 2013
    Applicant: FUJITSU LIMITED
    Inventor: FUJITSU LIMITED
  • Publication number: 20130127646
    Abstract: An embodiment of a multiplying digital-to-analog converter (MDAC), an embodiment of a method for converting a digital signal to an analog signal, an embodiment of a pipelined analog-to-digital converter (ADC), and a method of converting an analog signal to a digital signal in a plurality of cascading stages.
    Type: Application
    Filed: November 22, 2011
    Publication date: May 23, 2013
    Applicant: STMICROELECTRONICS PVT. LTD.
    Inventors: Ashish KUMAR, Chandrajit DEBNATH
  • Publication number: 20130114331
    Abstract: A control signal generation circuit includes a voltage detection unit which detects a level of an external voltage and generates first and second detection signals and a control signal control unit which delays a sense amplifier enable signal in response to the first and second detection signals and generates first through third control signals. The enable period of the first and second control signals are controlled based on the levels of the first and second detection signals.
    Type: Application
    Filed: December 28, 2012
    Publication date: May 9, 2013
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Yin Jae Lee
  • Publication number: 20130099797
    Abstract: A variable impedance device includes a passive tuner that includes at least one variable component, which is controllable to apply a variable impedance value to an input signal of the passive tuner. A low noise amplifier is configured to supply the input signal to the passive tuner by amplifying an input RF (radio frequency) signal.
    Type: Application
    Filed: August 31, 2012
    Publication date: April 25, 2013
    Applicants: STMICROELECTRONICS SA, STMICROELECTRONICS (CROLLES 2) SAS
    Inventors: Thomas Quemerais, Daniel Gloria, Romain Debroucke
  • Publication number: 20130076360
    Abstract: A power module for a high frequency amplifier unit is provided. The power module includes a base support plate, on which at least one power electronic module is contacted via a number of contact pins. A shield plate is arranged on a side of the power electronic module facing away from the base support plate. The power electronic module is in contact with a cooling element at a side facing the shield plate.
    Type: Application
    Filed: September 28, 2012
    Publication date: March 28, 2013
    Inventor: Adam Albrecht
  • Publication number: 20130049861
    Abstract: A linear amplification with nonlinear components (LINC) modulator is provided. The LINC modulator includes: a separator that generates a plurality of constant envelope signals from a source signal; a processor that receives an input signal and detects and removes a phase jump in phase trajectory of the input signal to generate a first signal having a continuous phase trajectory and a second signal having a discontinuous phase trajectory; and a quadrature modulator that mixes the first signal with the second signal to reconstruct the input signal.
    Type: Application
    Filed: June 21, 2012
    Publication date: February 28, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Alexander Nikolaevich LOZHKIN
  • Publication number: 20130038389
    Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.
    Type: Application
    Filed: September 13, 2012
    Publication date: February 14, 2013
    Applicant: ParkerVision, Inc.
    Inventors: David F. SORRELLS, Gregory S. RAWLINS, Michael W. RAWLINS
  • Publication number: 20120299651
    Abstract: Systems, methods, and apparatus are described that provide for low phase-noise, spectrally-pure, and low-jitter signals from electrical oscillators. An aspect of the present disclosure includes utilization of an open-loop feed-forward phase-noise cancellation scheme to cancel phase noise, or jitter, of an electrical oscillator. Phase noise can be measured and then subtracted, with the phase noise measurement and subtraction being performed at a speed faster than phase noise variations of the oscillator. Another aspect of the present disclosure includes use of a feedback scheme for phase noise reduction. A feedback scheme can be used alone or in conjunction with a feed-forward scheme. Related phase-noise cancellation and/or reduction methods are described. Notch filter and RF amplifier circuits are also described.
    Type: Application
    Filed: August 2, 2012
    Publication date: November 29, 2012
    Applicant: UNIVERSITY OF SOUTHERN CALIFORNIA
    Inventors: Ankush Goel, Alireza Imani, Hossein Hashemi
  • Patent number: 8310750
    Abstract: A waveform shaping circuit enhances a rise of a waveform of a voltage applied to a load and includes an input unit to which the voltage is input; a supply unit configured to apply the voltage input from the input unit to the load; a first resistor connected in series between the input unit and the supply unit; a second resistor branch-connected to a portion between the input unit and the supply unit; and a stub connected to the first resistor or the second resistor and including a transmission path of a given length configured to shuttle the voltage by transmitting and reflecting the voltage as a voltage wave.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: November 13, 2012
    Assignee: Fujitsu Limited
    Inventor: Setsuo Yoshida
  • Publication number: 20120256689
    Abstract: As relates to automatic matching of antenna impedance for a radiofrequency transmit or receive circuit, an impedance matching network is inserted between an amplifier and antenna. The current i and output (resp. input) voltage V of the amplifier and their phase shift are measured, the complex impedance defined by V/i is deduced; the impedance of the antenna is calculated as a function of this complex impedance and the known existing values of the adjustable impedances of the matching network. New adjustable values of impedances of the matching network to obtain a desired overall load impedance for the amplifier are calculated on the basis of the calculated antenna impedance value, and the matching network is controlled to adjust the adjustable impedances to these new values. The measurement is made at a measurement frequency different from the working frequency to allow automatic matching without interrupting normal operation of the chain.
    Type: Application
    Filed: April 5, 2012
    Publication date: October 11, 2012
    Applicant: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Majid EL KAAMOUCHI, Jean-Baptiste DAVID, Emeric DE FOUCAULD
  • Publication number: 20120243580
    Abstract: Embodiments include but are not limited to apparatuses and systems including a quadrature lattice matching network including first path having a series inductor and a shunt inductor, and a second path having a series capacitor and a shunt capacitor. Other embodiments may be described and claimed.
    Type: Application
    Filed: March 23, 2011
    Publication date: September 27, 2012
    Applicant: TRIQUINT SEMICONDUCTOR, INC.
    Inventor: Peter V. Wright
  • Publication number: 20120194272
    Abstract: An RF power amplifier is disclosed that has improved input matching or reduced return losses over a wider frequency range. The amplifier includes an input impedance matching network, a resistive element, a transistor, and an output impedance matching network. The resistive element is coupled between the input impedance matching network and the input of the transistor. The resistive element is configured to lower the quality factor (Q) of the input impedance matching network. This has the effect of reducing the input impedance variation over a given frequency range. As a result, the overall impedance matching over the given frequency range is improved, thereby reducing the input return losses. This allows the RF power amplifier to be used in wider bandwidth applications.
    Type: Application
    Filed: January 27, 2011
    Publication date: August 2, 2012
    Applicant: INTEGRA TECHNOLOGIES, INC.
    Inventor: Richard P. Keshishian
  • Publication number: 20120069881
    Abstract: The present invention relates to a power amplifier unit (30, 40, 50, 60a-60d, 70) comprising a power amplifier element (31, 41, 51, 71) and a matching unit (32, 42, 52, 72). The unit comprises an impedance matched MicroElectroMechanicalSystem (MEMS) switch element (33, 43, 53, 73) between said power amplifier element (31, 41, 51, 71) and said matching unit (32, 42, 52, 72).
    Type: Application
    Filed: September 15, 2011
    Publication date: March 22, 2012
    Applicant: SONY ERICSSON MOBILE COMMUNICATION AB
    Inventors: Filip SKARP, Olof ZANDER
  • Publication number: 20120038419
    Abstract: Implementations to mitigating side effects of impedance transformation circuits are described. In particular, mitigation circuitry may be coupled to a high impedance circuit to minimize or eliminate non-linear output of the high impedance circuit in order to provide a well-defined bias voltage to the input of a buffer or amplifier device coupled to a capacitive sensor. Additionally, the mitigation circuitry may be coupled to the high impedance circuit to reduce or eliminate rectifying effects of the high impedance circuit. Accordingly, a bias voltage can be utilized to provide a stable operating point of the buffer or amplifier device via a high impedance circuit utilizing one or more impedance transformations.
    Type: Application
    Filed: October 25, 2011
    Publication date: February 16, 2012
    Inventor: Dieter DRAXELMAYR
  • Publication number: 20120021713
    Abstract: According to one embodiment, a concurrent impedance and noise matching transconductance amplifier designed for implementation in a receiver comprises an input device configured to couple to a matching network of the receiver, and a boost capacitor connected to the input device to increase an input capacitance of the transconductance amplifier. The boost capacitor is selected to substantially minimize the receiver noise and to enable the concurrent impedance and noise matching of the receiver and the matching network. In one embodiment, the receiver comprises the transconductance amplifier to provide an amplified receive signal, and a mixer to produce a down-converted signal corresponding to the amplified receive signal, wherein the mixer is coupled to the transconductance amplifier by a blocking capacitor. The blocking capacitor is selected to substantially increase an amplitude ratio of the down-converted signal to the amplified receive signal to substantially increase the front-end gain of the receiver.
    Type: Application
    Filed: July 20, 2010
    Publication date: January 26, 2012
    Applicant: BROADCOM CORPORATION
    Inventors: Mohyee Mikhemar, Hooman Darabi
  • Publication number: 20110294452
    Abstract: Even when an input is weak, an antenna amplifier device may achieve a high sensitivity while reducing a noise factor (NF). The antenna amplifier device includes an amplification circuit 7 for amplifying a high frequency signal received by an antenna A, and an NF matching circuit 5 provided between the amplification circuit 7 and the antenna A of which input impedance has a capacitance, the NF matching circuit 5 for switching the input impedance to the amplification circuit 7 in accordance with a reception frequency. The NF matching circuit 5 includes a plurality of coils having different inductances, and at least one switch SW for connecting one of the coils, selected in accordance with the reception frequency, between the antenna A and the amplification circuit 7. A step-up coil SC is interposed between the NF matching circuit 5 and the amplification circuit 7.
    Type: Application
    Filed: May 13, 2011
    Publication date: December 1, 2011
    Applicant: FUJITSU TEN LIMITED
    Inventors: Kenji KAWAI, Kazuo TAKAYAMA
  • Publication number: 20110254627
    Abstract: Signaling systems, preamplifiers, memory devices and methods are disclosed, such as a signaling system that includes a transmitter configured to receive a first digital signal. The transmitter provides a transmitted signal corresponding to the digital signal to a signal path. A receiver system coupled to the signal line includes a preamplifier coupled to receive the transmitted signal from the signal path. The preamplifier includes a common-gate amplifying transistor that is configured to provide an amplified signal. The receiver system also includes a receiver coupled to receive the amplified signal from the preamplifier. The receiver is configured to provide a second digital signal corresponding to the amplified signal received by the receiver. Such a signaling system may be used in a memory device or in any other electronic circuit.
    Type: Application
    Filed: April 15, 2010
    Publication date: October 20, 2011
    Applicant: Micron Technology, Inc.
    Inventor: Seong-Hoon Lee
  • Publication number: 20110223875
    Abstract: An electronic apparatus having communications capabilities, including: an envelope detector that detects an envelope of a transmission signal; a differentiator that differentiates the envelope with respect to time to obtain differential components; a filtering processor that filters the differential components; an integrator that integrates the filtered differential components with respect to time to generate an envelope tracking signal; an amplifying unit that amplifies the transmission signal; and a voltage controller that controls, in accordance with the envelope tracking signal, a voltage the amplifying unit uses to amplify the transmission signal.
    Type: Application
    Filed: March 4, 2011
    Publication date: September 15, 2011
    Applicant: FUJITSU LIMITED
    Inventor: Mitsuharu Hamano
  • Publication number: 20110123048
    Abstract: The present technology is directed to class G audio amplifiers and the associated methods of operation. In one embodiment, a class G audio amplifier includes an input port, an audio output stage, a level detector, and a charge pump. The class G audio amplifier regulates the power supplies of the audio output stage according to the input signal, so as to realize high efficiency and high quality audio output.
    Type: Application
    Filed: October 20, 2010
    Publication date: May 26, 2011
    Inventors: Haishi Wang, Zhengwei Zhang, Rui Wang, Jinyan Lin
  • Publication number: 20110121903
    Abstract: There is provided a power amplifier that can increase power efficiency by preventing power consumption caused by DC components from an RF input signal. A power amplifier according to an aspect of the invention may include: an inverter amplification section amplifying an input signal according to an inverter method to thereby remove DC components from the input signal; an impedance matching section matching an impedance of a transmission path of the input signal amplified by the inverter amplification section; and an amplification section amplifying an impedance-matched signal from the impedance matching section according to a gain set beforehand.
    Type: Application
    Filed: June 25, 2010
    Publication date: May 26, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Jean SONG, Shinichi IIZUKA, Youn Suk KIM, Hyo Kun BAE, Sang Hee KIM, Jun Goo WON, Joong Jin NAM, Ki Joong KIM, Jae Hyouck CHOI
  • Publication number: 20110090009
    Abstract: A capacitive sensor amplifier circuit comprising: a capacitive sensor; a bias voltage supply connected across the capacitive sensor via a bias resistor; an operational amplifier having an input connected to the capacitive sensor; and a feedback capacitor connected between the input and an output of the amplifier, the input and output being of the same sign.
    Type: Application
    Filed: October 15, 2010
    Publication date: April 21, 2011
    Applicant: NXP B.V.
    Inventor: Robert Hendrikus Margaretha VAN VELDHOVEN
  • Publication number: 20110090011
    Abstract: An adaptive bias power amplifier including an amplifier, a signal coupler, a power detector and a bias control circuit is provided. The signal coupler is connected to an input terminal of the amplifier. The power detector is connected to the signal coupler, and detects an input power of the amplifier via the signal coupler. The bias control circuit is connected to an output terminal of the power detector and the input terminal of the amplifier. The bias control circuit adjusts a gate bias of the amplifier in accordance with a detecting result of the power detector.
    Type: Application
    Filed: March 19, 2010
    Publication date: April 21, 2011
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: De-Cheng Chang, Yu-Cheng Hsu
  • Publication number: 20110006842
    Abstract: A system for processing an input signal, the system including: (a) a hardware memory module configured to store a lookup table; and (b) a signal processing module, configured to process the input signal to provide a second signal, and to transmit the second signal to a power amplifier that is characterized by non-linearity and which is adapted to amplify the second signal to provide an amplified signal; wherein the signal processing module is configured to process the input signal in response to at least one filtering parameter to provide the second signal so as to at least partly compensate for the non-linearity of the amplifier; wherein the at least one filtering parameter is retrieved from the lookup table using a first, a second, and a third lookup table indexes, wherein the first index is responsive to a magnitude of the input signal at a first moment, the second index is responsive to a magnitude of the input signal at a second moment, and the third index is responsive to phases of the input signal at t
    Type: Application
    Filed: July 8, 2009
    Publication date: January 13, 2011
    Inventors: Doron Shahar KOREN, Sergey Toujikov
  • Publication number: 20100327971
    Abstract: A transmission device includes an amplifier that amplifies a transmission signal according to a voltage to be applied, an envelope detector that detects an envelope signal of the transmission signal, a rate decreasing unit that decreases changing rate of the envelope signal detected by the envelope detector, and a voltage controller that changes the voltage applied to the amplifier according to the envelope signal whose changing rate is decreased by the rate decreasing unit.
    Type: Application
    Filed: June 21, 2010
    Publication date: December 30, 2010
    Applicant: FUJITSU LIMITED
    Inventor: Kazuhiko Kumagai
  • Publication number: 20100308904
    Abstract: The device generates a reference voltage, in particular designed for a system of the switched-capacitor type, based on a setpoint voltage. It includes a regulation loop having a first input to receive the setpoint voltage, and an output stage arranged as a voltage follower and looped to a second input of the loop. An additional stage is configured to deliver the reference voltage to the switched-capacitor system, this additional stage, coupled to the output stage, also being arranged as a voltage follower and paired with the output stage.
    Type: Application
    Filed: June 3, 2010
    Publication date: December 9, 2010
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: Hugo Gicquel, Marc Sabut, Fabien Reaute
  • Publication number: 20100308911
    Abstract: Distributed band reject filters are disclosed. A band reject filter includes a first acoustic resonator and a second acoustic resonator, each of which has either shunt resonators adapted to resonate substantially at respective resonance frequencies defining a rejection frequency band or series resonators adapted to anti-resonate substantially at respective anti-resonance frequencies defining the rejection frequency band. These resonators are connected through a phase shifter which imparts an impedance phase shift of approximately 45° to 135°. Exemplary applications of the band reject filters disclosed herein include implementation as an inter-stage band reject filter for a base station power amplifier for a wireless communication system, as a radio frequency band reject filter in a duplexer for a wireless communication terminal, and in a low noise amplifier input stage.
    Type: Application
    Filed: August 16, 2010
    Publication date: December 9, 2010
    Applicant: NORTEL NETWORKS LIMITED
    Inventors: STEVE BEAUDIN, CHUN-YUN JIAN, SOMSACK SYCHALEUN
  • Publication number: 20100271126
    Abstract: A switchable integrated electronic device includes at least three elements r1 . . . r14, s1 . . . s14 series coupled in a chain between a first port and a second port and includes a node between successive elements r1 . . . r14, s1 . . . s14 of the chain. There is a switch means for coupling a selectable one of the nodes to a third port. If successive elements r1 . . . r14, s1 . . . s14 in the chain are denoted ri, i=1 to N, and if adjacent positions occupied by the elements are numbered consecutively 1 to N, then element ri occupies position ? N + 1 2 ? + ( - 1 ) i · 2 · ? i 2 ? ? ? ? for ? ? i = 1 ? ? to ? ? ? N 2 ? and position ? N + 1 2 ? + ( - 1 ) i · ( 2 · ? N - i 2 ? + 1 ) ? ? for ? ? i = ? N 2 ? + 1 ? ? to ? ? N .
    Type: Application
    Filed: April 30, 2010
    Publication date: October 28, 2010
    Applicant: ST-ERICSSON SA
    Inventor: Zhenhua Wang
  • Publication number: 20100231295
    Abstract: An electronic circuit includes a transimpedance amplifier, a bypass circuit that allows a part of an input signal to be applied to the transimpedance amplifier to flow through the bypass circuit so as to bypass the transimpedance amplifier on the basis of a control signal, and a control signal circuit that includes a hold circuit having a time constant that is variable on the basis of a time constant control signal and generates the control signal.
    Type: Application
    Filed: March 11, 2010
    Publication date: September 16, 2010
    Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Hiroshi Hara
  • Publication number: 20020050858
    Abstract: The present invention relates to a preamplifier for computer display for transmitting an analog video signal as a result of converting a digital video signal outputted from a computer by a video D/A converter circuit of a digital signal processing IC to a display, wherein an input characteristic of the preamplifier is current input to match a characteristic of current output of the video D/A converter circuit.
    Type: Application
    Filed: August 13, 2001
    Publication date: May 2, 2002
    Inventor: Akira Arimizu
  • Patent number: 5751555
    Abstract: An electronic component with reduced capacitance includes a substrate (12) with an interconnect line (14), an additional substrate (11) with an interconnect line (13) wherein the substrate (12) overlies the additional substrate (11), an electronic device (15) overlying the substrate (12) and electrically coupled to the interconnect line (14) of the substrate (12), and an additional electronic device (17) having a lead (23) and an additional lead (26) wherein the lead (23) overlies the substrate (12) and is electrically coupled to the interconnect line (14) of the substrate (12) and wherein the additional lead (26) overlies the additional substrate (11) and is electrically coupled to the interconnect line (13) of the additional substrate (11).
    Type: Grant
    Filed: August 19, 1996
    Date of Patent: May 12, 1998
    Assignee: Motorola, Inc.
    Inventors: Henry L. Pfizenmayer, Frederick C. Wernett, III
  • Patent number: 4725789
    Abstract: A circuit arrangement for coupling alternating voltage signals having frequencies within the audio frequency range between a low noise audio frequency source and a zero ohm amplifier, wherein the audio frequency source has a known source impedance. The circuit arrangement includes an output connected to the zero ohm amplifier and a highly resistant input for receiving the alternating voltage signals from the audio frequency source. The input is more resistant by at least one power of ten than the source impedance of the audio frequency source and the arrangement has a voltage amplification factor which is so low that no overshooting of the output signal will happen at the maximum occcurring voltage of the signals received at its input. The output of the arrangement is configured as a short-circuit resistant alternating current source which furnishes a maximum effective current of at least 10 mA.
    Type: Grant
    Filed: August 29, 1986
    Date of Patent: February 16, 1988
    Assignee: Ant Nachrichtentechnik GmbH
    Inventor: Jurgen Wermuth
  • Patent number: 4600892
    Abstract: An RF amplifier arrangement for providing output signals having a controlled frequency distribution and wherein the amplitude and phase of the input signals to an RF amplifier are controlled as a function of the amplitude and phase, respectively, of the output signals from the RF amplifier and also the amplitude of the input signals are adjusted so as to cause the power of the output signal to vary in accordance with a predetermined sequence, whereby such amplitude control of the input signals results in a modified frequency distribution in the energy of the output signals.
    Type: Grant
    Filed: June 28, 1984
    Date of Patent: July 15, 1986
    Assignee: Hughes Aircraft Company
    Inventors: Gene A. Wagner, Irwin L. Newberg