Abstract: A transistor package for a power amplifier is provided. The transistor package includes a plurality of radio frequency, RF, paths that includes a first RF path and second RF path. Each RF path includes a transistor-carrying die and at least one impedance element. The transistor package includes a circuit portion electrically coupling a first impedance element in the first RF path to a second impedance element in the second RF path where the circuit portion includes at least one resistor.

Abstract: A radio-frequency module includes a mounting substrate and first and second power amplifiers. The first and second power amplifiers are each mounted on one main surface of the mounting substrate. The first power amplifier includes a first input terminal and a first outer periphery. The first outer periphery includes a first edge section. The second power amplifier includes a second input terminal and a second outer periphery. The second outer periphery includes a second edge section. The second edge section opposes the first edge section in a first direction. The first input terminal is disposed in the first edge section of the first power amplifier. The second input terminal is disposed in the second edge section of the second power amplifier. The first and second input terminals do not overlap each other in the first direction.

Abstract: RF transistor amplifiers an RF transistor amplifier die having a semiconductor layer structure, an interconnect structure having first and second opposing sides, wherein the first side of the interconnect structure is adjacent a surface of the RF transistor amplifier die such that the interconnect structure and the RF transistor amplifier die are in a stacked arrangement, and one or more circuit elements on the first and/or second side of the interconnect structure.

Abstract: A package that includes a power amplifier and a substrate coupled to the power amplifier. The substrate includes an encapsulation layer, a capacitor device located in the encapsulation layer, an inductor located in the encapsulation layer, at least one first dielectric layer coupled to a first surface of the encapsulation layer, and a plurality of first interconnects coupled to the first surface of the encapsulation layer. The plurality of first interconnects is located at least in the at least one first dielectric layer. The plurality of first interconnects is coupled to the capacitor device and the inductor. The inductor and the capacitor device are configured to be electrically coupled together to operate as elements of a matching network for the power amplifier. The capacitor device is configured to be coupled to ground.

Abstract: A semiconductor chip includes a plurality of transistor rows. Corresponding to the plurality of transistor rows, a first bump connected to a collector of the transistor is arranged, and a second bump connected to an emitter is arranged. The transistor rows are arranged along sides of a convex polygon. A first land and a second land provided in a circuit board are connected to the first bump and the second bump, respectively. A first impedance conversion circuit connects the first land and the signal output terminal. A plurality of transistors in the transistor row are grouped into a plurality of groups, and the first impedance conversion circuit includes a reactance element arranged for each of the groups.

Abstract: A radio frequency module includes: a module board that includes a first principal surface and a second principal surface on opposite sides of the module board; a power amplifier; and a first circuit component. The power amplifier includes: a first amplifying circuit element; a second amplifying circuit element; and an output transformer that includes a primary coil and a secondary coil. An end of the primary coil is connected to an output terminal of the first amplifying circuit element. Another end of the primary coil is connected to an output terminal of the second amplifying circuit element. An end of the secondary coil is connected to an output terminal of the power amplifier. The first amplifying circuit element and the second amplifying circuit element are disposed on the first principal surface. The first circuit component is disposed on the second principal surface.

Abstract: A single servo control loop for amplifier gain control based on signal power change over time or system to system, having an amplifier configured to receive an input signal on an amplifier input and generate an amplified signal on an amplifier output. The differential signal generator processes the amplified signal to generate differential output signals. The single servo control loop processes the differential output signal to generates one or more gain control signals and one or more current sink control signals. A gain control system receives a gain control signal and, responsive thereto, controls a gain of one or more amplifiers. A current sink receives a current sink control signal and, responsive thereto, draws current away from the amplifier input. Changes in input power ranges generate changes in the integration level of the differential signal outputs which are detected by the control loop, and responsive thereto, the control loop dynamically adjusts the control signals.

Abstract: Embodiments of Doherty Power Amplifier (PA) and other PA packages are provided, as are systems including PA packages. In embodiments, the PA package includes a package body having a longitudinal axis, a first group of input-side leads projecting from a first side of the package body and having an intra-group lead spacing, and a first group of output-side leads projecting from a second side of the package body and also having the intra-group lead spacing. A first carrier input lead projects from the first package body side and is spaced from the first group of input-side leads by an input-side isolation gap, which has a width exceeding the intra-group lead spacing. Similarly, a first carrier output lead projects from the second package body side, is laterally aligned with the first carrier input lead, and is separated from the first group of output-side leads by an output-side isolation gap.

Abstract: A power amplifier apparatus includes a semiconductor substrate, a plurality of first transistors on the semiconductor substrate, a plurality of second transistors, at least one collector terminal electrically connected to collectors of the plurality of first transistors, a first inductor having a first end electrically connected to the collector terminal and a second end electrically connected to a power supply potential, at least one emitter terminal electrically connected to emitters of the plurality of second transistors and adjacent to the collector terminal in a second direction, a second inductor having a first end electrically connected to the emitter terminal and a second end electrically connected to a reference potential, and at least one capacitor having a first end electrically connected to the collectors of the plurality of first transistors and a second end electrically connected to the emitters of the plurality of second transistors.

Abstract: Techniques and architecture are disclosed for a method for making a custom circuit comprising forming a common wafer template, selecting at least two elements of the common wafer template to be chosen elements, and adding at least one metal layer to interconnect the chosen elements to form a circuit. The common wafer template includes a plurality of transistors, a plurality of resistors, a plurality of capacitors, and a plurality of bond pads. Final circuit customization of the common wafer template is accomplished by adding at least one metal layer that forms interconnects to passive and active elements in the template in order to complete the circuit.

Abstract: An amplifier module that implements two or more amplifying units connected in series is disclosed. The amplifier module includes a package, input and output terminals, two or more amplifying units including the first unit and the final unit, an output bias terminal for supplying an output bias to one of amplifying units except for the final unit, and an input bias terminal for supplying an input bias to another one of the amplifying units except for the first unit. A feature of the amplifier module is that the output bias terminal and the input bias terminal are disposed in axial symmetry with respect to a reference axis connecting the input terminal with the output terminal in one side of the package.

Abstract: Various embodiments relate to a packaged radio frequency (RF) amplifier device implementing a split bondwire where the direct ground connection of an output capacitor is replaced with a set of bondwires connecting to ground in a direction opposite to the wires connecting to the output of a transistor to an output pad. This is done in order to reduce the effects of mutual inductance between the various bondwires associated with the output of the RF amplifier device.

Abstract: A radio frequency circuit includes a substrate, a first terminal disposed on a first principal surface of the substrate, a second terminal disposed on the first principal surface, a first-surface mounted component disposed on the first principal surface or inside the substrate, and a second-surface mounted component disposed on a second principal surface of the substrate which is opposite the first principal surface. A radio-frequency signal, which is input to the first terminal, is transmitted, for output from the second terminal, so as to make at least one round trip between the first principal surface and the second-surface mounted component, which is disposed on the second principal surface, through wiring lines disposed in the substrate.

Abstract: A radio frequency module includes: a module board; a first semiconductor device containing a first power amplifier and a second power amplifier, the first power amplifier being configured to amplify a radio frequency signal of a first communication band, the second power amplifier being configured to amplify a radio frequency signal of a second communication band, the second communication band being different from the first communication band; and a second semiconductor device containing a control circuit configured to control the first power amplifier and the second power amplifier. In the radio frequency module, the first semiconductor device and the second semiconductor device are stacked together and disposed on the module board.

Abstract: Examples of integrated semiconductor devices are described. In one example, an integrated device includes first and second transistors formed on a substrate, where the transistors share a terminal metal feature to reduce a size of the integrated device. The terminal metal feature can include a shared source electrode metalization, for example, although other electrode metalizations can be shared. In other aspects, a first width of a gate of the first transistor can be greater than a second width of a gate of the second transistor, and the shared metalization can taper from the first width to the second width. The integrated device can also include a metal ground plane on a backside of the substrate, and the terminal metal feature can also include an in-source via for the shared source electrode metalization. The in-source via can electrically couple the shared source electrode metalization to the metal ground plane.

Abstract: A circuit for electrostatic discharge (ESD) protection for wide frequency range multi-band interfaces. The interface may be split into a plurality of signal paths. Each signal path may include an ESD protection circuit configured to shunt an ESD current on each signal path to either ground or supply voltage and a filter configured to block signals from other signal paths. The signal paths are connected to a common signal line such that the signals for the plurality of signal paths can be transported simultaneously. The plurality of signal paths may be a high frequency path and a low frequency path. The low frequency path may include an inductor connected in series and the high frequency path may include a capacitor or transformer connected in series. The ESD protection circuit on each signal path is placed behind the inductor, the capacitor or the transformer.

Abstract: A semiconductor device includes a ground plane, a capacitor disposed on the ground plane and having a first top surface, a semiconductor chip disposed on the ground plane and having a second top surface, a bonding wire connecting the first top surface and the second top surface, and a conductive member disposed on the ground plane. The conductive member is electrically connected to the ground plane. The bonding wire extends in a first direction in a planar view normal to the ground plane. The conductive member is positioned apart from the bonding wire in a second direction orthogonally intersecting in the planar view with the first direction.

Abstract: A radio frequency module includes a module board including a first principal surface and a second principal surface on opposite sides of the module board, a transmission power amplifier connected to a transmission path, a first circuit component connected to a reception path, and a control circuit that controls the transmission power amplifier. The control circuit is disposed on the first principal surface, and the first circuit component is disposed on the second principal surface.

Abstract: A power amplifying circuit includes a bias circuit that supplies a bias current or a bias voltage to a base of a first transistor, and at least one termination circuit that short-circuits a second-order harmonic of an amplified signal output from a collector of the first transistor to a ground voltage. An emitter of the first transistor is connected to ground. The bias circuit includes a second transistor. A collector of the second transistor is connected to the base of the first transistor. An emitter of the second transistor is connected to the emitter of the first transistor. A base of the second transistor is supplied with a predetermined voltage.

Abstract: Doherty power amplifier (PA) devices (e.g., packages and modules) including integrated output combining networks are disclosed. In embodiments, the Doherty PA device includes a first amplifier die having a first transistor with a first output terminal at which a first amplified signal is generated, a second amplifier die having a second transistor with a second output terminal at which a second amplified signal is generated, and an output combining network. The output combining network includes, in turn, a combining node integrally formed with the second amplifier die and electrically coupled to the second output terminal. At least one die-to-die bond wire electrically couples the first output terminal to the combining node. The at least one die-to-die bond wire has an electrical length, which is results in a 90 degree phase shift imparted to the first amplified signal between the first output terminal and the combining node.

Abstract: A power amplifier includes a semiconductor die, and an amplifier and bias circuit integrally formed with the semiconductor die. The die has opposed first and second sides, and a device bisection line extends between the first and second sides. The bias circuit includes a multi-point input terminal with first and second terminals that are electrically connected through a conductive path that extends across the device bisection line, and one or more bias circuit components connected between the multi-point input terminal and the amplifier. The amplifier may include a field effect transistor (FET) with gate and drain terminals, and the bias circuit component(s) are electrically connected between the multi-point input terminal and the gate terminal. In addition or alternatively, the bias circuit component(s) are electrically connected between a multi-point input terminal and the drain terminal. The one or more components may include a resistor-divider circuit.

Abstract: A 3D semiconductor device, the device including: a first level, where the first level includes a first layer, the first layer including first transistors, and where the first level includes a second layer, the second layer including first interconnections; a second level overlaying the first level, where the second level includes a third layer, the third layer including second transistors, and where the second level includes a fourth layer, the fourth layer including second interconnections; and a plurality of connection paths, where the plurality of connection paths provides connections from a plurality of the first transistors to a plurality of the second transistors, where the second level is bonded to the first level, where the bonded includes oxide to oxide bond regions, where the bonded includes metal to metal bond regions, where the third layer includes a crystalline layer, and where the second level includes a Radio Frequency (“RF”) circuit.

Abstract: In integrating RF power amplifier circuits on a package, at least one bias voltage is coupled to at least one amplifier circuit on the package via two or more pins/connectors. In particular, at least one of a gate and drain bias voltage is coupled to one or more amplifier circuits via at least two pins/connectors. In some embodiments, the two or more bias voltage pins/connectors are connected together on the package, placing the pins/connectors in parallel, which reduces an inductance associated with the pins/connectors. In some embodiments, at least of the two pins/connectors connected to the same bias voltage are disposed on either side of an RF signal pin/conductor, simplifying the routing of signals on the package, affording greater flexibility of placement and routing on the package.

Abstract: A semiconductor MOS device having an epitaxial layer with a first conductivity type formed by a drain region and by a drift region. The drift region accommodates a plurality of first columns with a second conductivity type and a plurality of second columns with the first conductivity type, the first and second columns alternating with each other and extending on the drain region. Insulated gate regions are each arranged on top of a respective second column; body regions having the second conductivity type extend above and at a distance from a respective first column, thus improving the output capacitance Cds of the device, for use in high efficiency RF applications.

Abstract: A high-frequency module can be used in communication satellites. The high-frequency module contains an electronic unit and a housing. The housing at least partially encloses the electronic unit, and the electronic unit is arranged at least partially in an interior space of the housing. An internal connector is arranged on the housing, which is coupled to the electronic unit such that electrical signals can be transmitted between the electronic unit and the internal connector. The internal connector is constructed integrally with at least a part of the housing. This allows a thermo-mechanical stress on the electronic unit to be reduced.

Abstract: One embodiment is an apparatus comprising a semiconductor integrated circuit (“IC”) chip comprising at least one active component for implementing an amplifier circuit; and a laminate structure comprising a plurality of metal layers, the laminate structure further comprising a plurality of passive components and transmission line-based structures. The semiconductor IC chip is integrated with the laminate structure such that a top layer of the laminate structure comprises a shield over a top of the semiconductor IC chip and the passive components for limiting electromagnetic coupling of signals generated by the amplifier circuit beyond the laminate structure.

Abstract: A semiconductor device includes a semiconductor substrate including a principal surface parallel to a plane defined by a first direction and a second direction substantially orthogonal to the first direction, and the principal surface having a first side parallel to the first direction; first unit transistors, each amplifying a first signal in a first frequency band to output a second signal; and second unit transistors, each amplifying the second signal to output a third signal and aligned in the second direction between the first side and a substrate center line in the first direction in plan view of the principal surface. A first center line in the first direction of a region in which the first unit transistors are aligned is farther from the first side than a second center line in the first direction of a region in which the second unit transistors are aligned.

Abstract: A communication interface circuit includes a plurality of terminals, two receiver circuits, and a detection circuit. The detection circuit is coupled to at least one of the terminals and detects a communication format, and the detection circuit enables one of the two receiver circuits based on the detected communication format.

Abstract: Embodiments of redrivers and resistive units for redrivers are disclosed. In an embodiment, a resistive unit for a redriver includes at least one resistor connected to an input/output terminal of the redriver, at least one switch serially connected to the at least one resistor, and a voltage regulator connected to the at least one switch and configured to generate a termination voltage for the at least one switch. Instead of grounding the at least one resistor, using the voltage regulator can avoid large voltage jump at input/output terminals to keep connected devices safe.

Abstract: A high-frequency power amplifier is configured to include plural island patterns (28) in which ends thereof are arranged in the vicinity of a transmission line (23) and other ends thereof are arranged in the vicinity of an end line (24a) in a transmission line (24), a wire (30) for connecting an end of an island pattern (28) and the transmission line (23), and a wire (31) for connecting another end of the island pattern (28) and the end line (24a) of the second transmission line (24), so that a mismatch of the impedance component having a resistance component and a reactance component can be compensated for by changing the number of first connecting members and the number of second connecting members, the first and second connecting members configured to connect an island pattern (28) to the transmission lines (23) and (24).

Abstract: A packaged amplifier circuit includes an RF package with a die pad, and RF input and output leads extending away from the die pad opposite directions. An RF transistor die is mounted on the die pad such that a first outer edge side of the RF transistor die faces the first RF lead and a second outer edge side of the RF transistor die faces the second RF lead. A passive electrical connector is integrally formed in the RF transistor die. The passive electrical connector includes a first end connection point closer to the first outer edge side, and a second end connection point closer to the second outer edge side. A first discrete reactive device is mounted on the die pad between the first outer edge side and the first RF lead. The passive electrical connector electrically couples the first discrete reactive device to the second RF lead.

Abstract: An amplifier may include a transistor and input and output matching networks. One or more harmonic trap circuits may be electrically connected to a node located between the input matching network and a gate terminal of the transistor or to a node located between the output matching network and a drain terminal of the transistor. Each harmonic trap may provide a low resistance path to ground for signal energy above a fundamental operating frequency of the amplifier, such as harmonic frequencies thereof. The output matching network may act as an impedance inverter that provides a 90 degree insertion phase between the input of the output matching network and the load. A variable length drain feeder may connect a voltage source to an output of the output matching network.

Abstract: Apparatus and methods for bias switching of power amplifiers are provided herein. In certain configurations, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal, a power management circuit that controls a voltage level of a supply voltage of the power amplifier, and a bias control circuit that biases the power amplifier. The power management circuit is operable in multiple supply control modes, such as an average power tracking (APT) mode and an envelope tracking (ET) mode. The bias control circuit is configured to switch a bias of the power amplifier based on the supply control mode of the power management circuit.

Abstract: This disclosure relates to a mobile device with a transmission line for a radio frequency (RF) signal. The transmission line includes a bonding layer having a bonding surface, a barrier layer proximate the bonding layer, a diffusion barrier layer proximate the barrier layer, and a conductive layer proximate the diffusion barrier layer. The barrier layer and the diffusion barrier layer are configured to prevent conductive material from the conductive layer from entering the bonding layer. The diffusion barrier layer has a thickness sufficiently small such that a radio frequency signal is allowed to penetrate the diffusion barrier layer and propagate in the conductive layer.

Abstract: A Doherty amplifier module includes first and second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. A phase shift and impedance inversion element is coupled between the outputs of the first and second amplifier die. A shunt circuit is coupled to the output of either or both of the first and/or second amplifier die. The shunt circuit includes a series coupled inductance and high-Q capacitor (e.g., a metal-insulator-metal (MIM) capacitor), and the shunt circuit is configured to at least partially resonate out the output capacitance of the amplifier die to which it is connected.

Abstract: A low-noise amplifier device includes an inductive input element, an amplifier circuit, an inductive output element and an inductive degeneration element. The amplifier device is formed in and on a semiconductor substrate. The semiconductor substrate supports metallization levels of a back end of line structure. The metal lines of the inductive input element, inductive output element and inductive degeneration element are formed within one or more of the metallization levels. The inductive input element has a spiral shape and the an amplifier circuit, an inductive output element and an inductive degeneration element are located within the spiral shape.

Abstract: Aspects of this disclosure relate to an impedance transformation circuit for use in an amplifier, such as a low noise amplifier. The impedance transformation circuit includes a matching circuit including a first inductor. The impedance transformation circuit also includes a second inductor. The first and second inductors are magnetically coupled to each other to provide negative feedback to linearize the amplifier.

Abstract: Thermally rugged power amplifiers and related methods. In some embodiments, a method for manufacturing a radio-frequency amplifier can include providing or forming a semiconductor substrate, and forming an array of cascoded devices on the semiconductor substrate to be capable of amplifying a signal, such that the array of cascoded devices includes a plurality of cascoded devices arranged in a first row and a plurality of cascoded devices arranged in a second row. Each cascoded device can include an input stage and an output stage arranged in a cascode configuration, and each of the first and second rows can be configured such that the output stages are positioned in a staggered orientation. The staggered arrangement of the cascoded devices in the first row can be offset relative to the staggered arrangement of the cascoded devices in the second row to avoid a direct row-to-row adjacent pair of output stages.

Abstract: In accordance with an embodiment, an integrated circuit includes a substrate, an amplifier MOSFET, and a bias voltage terminal configured to generate a potential difference of the substrate relative to at least one load terminal of the amplifier MOSFET.

Abstract: In accordance with an embodiment, an RF module includes a bulk semiconductor substrate with at least one integrated RF component integrated in a first main surface region of the bulk semiconductor substrate; an insulator structure surrounding a side surface region of the bulk semiconductor substrate; a wiring layer stack including at least one structured metallization layer embedded into an insulation material, the wiring layer stack being arranged on the first main surface region of the bulk semiconductor substrate and a first main surface region of the insulator structure; and a carrier structure at a second main surface region of the insulator structure, wherein the carrier structure and the insulator structure include different materials.

Abstract: According to the present invention, an integrated circuit includes a first amplifier stage, a second amplifier stage, a first signal line connecting an output of the first amplifier stage and an input of the second amplifier stage to each other, a first plane for ground connected to the first amplifier stage, a second plane for ground connected to the second amplifier stage and at least one at least one line for ground connecting the first plane and the second plane to each other, wherein the at least one line has a center line having a length of 10 ?m to 1 mm, a width of the at least one line is ? or less of a width of the first plane, and a pattern ratio is 1 or more.

Abstract: A radio-frequency module includes switch elements, first signal paths, band pass filters, first matching circuits, second signal paths, and second matching circuits. Each of the first signal paths is connected between one end of a corresponding one of the switch elements and an antenna terminal. Each of the band pass filters is connected to a corresponding one of the first signal paths and allows a radio-frequency signal of one of the plurality of frequency bands to pass therethrough. Each of the first matching circuits is connected to a corresponding one of the first signal paths. Each of the second signal paths is connected to a corresponding one of the switch elements. Each of the second matching circuits is connected to a corresponding one of the second signal paths. A component included in the first matching circuits and a component included in the second matching circuits are electromagnetically coupled.

Abstract: A system, method, and computer-readable storage medium to dynamically manage heat in an electric energy storage system, such as a battery pack or ultra-capacitor pack system in an electric vehicle.

Abstract: Power amplifier having staggered cascode layout for enhanced thermal ruggedness. In some embodiments, a radio-frequency (RF) amplifier such as a power amplifier (PA) can be configured to receive and amplify an RF signal. The PA can include an array of cascoded devices connected electrically parallel between an input node and an output node. Each cascoded device can include a common emitter transistor and a common base transistor arranged in a cascode configuration. The array can be configured such that the common base transistors are positioned in a staggered orientation relative to each other.

Abstract: A radio frequency (RF) switch semiconductor die and an RF supporting structure are disclosed. The RF switch semiconductor die is attached to the RF supporting structure. The RF switch semiconductor die has a first edge and a second edge, which may be opposite from the first edge. The RF supporting structure has a group of alpha supporting structure connection nodes, which is adjacent to the first edge; a group of beta supporting structure connection nodes, which is adjacent to the second edge; and an alpha AC grounding supporting structure connection node, which is adjacent to the second edge. When the group of alpha supporting structure connection nodes and the alpha AC grounding supporting structure connection node are active, the group of beta supporting structure connection nodes are inactive.

Abstract: A heterojunction bipolar transistor (HBT) hybrid type RF (radio frequency) power amplifier includes a first device including an input terminal for receiving an RF signal, a pre-driver stage for amplifying the received RF signal, and an output terminal, the input terminal, the pre-driver stage and the output terminal being disposed in or over a first substrate; and a second device having a main stage having an HBT amplifier circuit disposed in or over a second substrate to further amplify the RF signal amplified by the pre-driver stage. The RF signal further amplified by the main stage is output through the output terminal of the first device.

Abstract: A semiconductor device, related package, and method of manufacturing same are disclosed. In at least one embodiment, the semiconductor device includes a radio frequency (RF) power amplifier transistor having a first port, a second port, and a third port. The semiconductor device also includes an output lead, a first output impedance matching circuit between the second port and the output lead, and a first additional circuit coupled between the output lead and a ground terminal. At least one component of the first additional circuit is formed at least in part by way of one or more of a plurality of castellations and a plurality of vias.

Abstract: A MEMS acoustic transducer device has a capacitive microelectromechanical sensing structure and a biasing circuit. The biasing circuit includes a voltage-boosting circuit that supplies a boosted voltage on an output terminal, and a high-impedance insulating circuit element set between the output terminal and a terminal of the sensing structure, which defines a first high-impedance node associated with the insulating circuit element. The biasing circuit has: a pre-charge stage that generates a first pre-charge voltage on a first output thereof, as a function of, and distinct from, the boosted voltage; and a first switch element set between the first output and the first high-impedance node. The first switch element is operable for selectively connecting the first high-impedance node to the first output, during a phase of start-up of the biasing circuit, for biasing the first high-impedance node to the first pre-charge voltage.

Abstract: A method of improving electrical isolation between a first circuit and a second circuit sharing a common substrate having an effective dielectric constant greater than that of air. The first and second circuits are spaced apart and separated from one another by an intermediate portion of the substrate. The method includes removing a portion of the intermediate portion to replace the portion removed with air thereby reducing the effective dielectric constant of the intermediate portion. By reducing the effective dielectric constant of the intermediate portion, electrical isolation between the first and second circuits is improved thereby reducing crosstalk between the first and second circuits. In particular implementations, the method may be used to reduce alien crosstalk between adjacent communication outlets in a patch panel.

Abstract: A variable matching circuit includes a transformer which is disposed between first and second transistor circuits. A primary inductor device and a secondary inductor device are magnetically coupled in the transformer. The primary inductor device is connected between an output terminal of the first transistor circuit and a bias circuit for the first transistor circuit. The secondary inductor device is connected between an input terminal of the second transistor circuit and a bias circuit for the second transistor circuit. Connection points between the primary inductor device and the bias circuit for the first transistor circuit and between the secondary inductor device and the bias circuit for the second transistor circuit are connected to first and second capacitive elements, respectively. At least one of inductance values of the respective primary and secondary inductor devices and capacitance values of the respective first and second capacitive elements is variable.