Piezoelectric Crystal Resonator Patents (Class 331/73)
  • Patent number: 11706988
    Abstract: A piezoelectric device includes a piezoelectric single crystal body with a homogeneous polarization state and of which at least a portion flexurally vibrates, an upper electrode on an upper surface of the piezoelectric single crystal body, a lower electrode on a lower surface of the piezoelectric single crystal body, and a supporting substrate below the piezoelectric single crystal body. A recess extends from a lower surface of the supporting substrate toward the lower surface of the piezoelectric single crystal body.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: July 18, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shinsuke Ikeuchi, Tetsuya Kimura, Katsumi Fujimoto, Yutaka Kishimoto, Fumiya Kurokawa
  • Patent number: 9000852
    Abstract: Aspects of the disclosure provide a circuit. The circuit includes a signal amplifying circuit coupled with a crystal component of a natural frequency to form a crystal oscillator, and a signal generator circuit configured to generate a signal with an energy distribution about the natural frequency, and to provide the signal to the crystal oscillator to assist the crystal oscillator to begin oscillating.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: April 7, 2015
    Assignee: Marvell International Ltd.
    Inventors: Dennis Sinitsky, Junshi Qiao, Pei Wang, Song Chen, Haiqing Zhang, Tao Shui
  • Patent number: 8867224
    Abstract: A mounting structure includes: an electronic component including: a functional element having a predetermined function; a first resin protrusion section having a surface covered by a covering film including a conductive section electrically connected to the functional element; and a second resin protrusion section that is disposed inside an area surrounded by the first resin protrusion section, and has adhesiveness at least on a surface of the second resin protrusion section, and a base member having a connection electrode and adapted to mount the electronic component. In the structure, the second resin protrusion section mounts the electronic component on the base member in a condition in which the conductive section of the covering film has conductive contact with the connection electrode due to elastic deformation of the first resin protrusion section.
    Type: Grant
    Filed: January 9, 2012
    Date of Patent: October 21, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Yukihiro Hashi
  • Patent number: 8776364
    Abstract: A multilayer ceramic component includes a stack containing ceramic layers and electrode layers interspersed among the ceramic layers. The electrode layers contain copper and define first and second internal electrodes. First and second external contacts are on different sides of the stack. The first and second external contacts contain copper and are substantially perpendicular to the ceramic layers and electrode layers. The first internal electrode is connected to the first external contact and the second internal electrode is connected to the second external contact. The first and second internal electrodes overlap each other at a plane intersecting the stack. In areas adjacent to boundaries between the first and second external contacts and the ceramic layers, the first and second external contacts are not oxidized and material making-up the ceramic layers is not diminished. A bonding strength of the external contacts to the stack exceeds 50 N.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: July 15, 2014
    Assignee: EPCOS AG
    Inventors: Heinz Florian, Marion Ottlinger, Peter Sedlmaier
  • Patent number: 8760231
    Abstract: A piezoelectric device includes an integrated circuit (IC) chip and a piezoelectric resonator element, a part of the piezoelectric resonator element being disposed so as to overlap with a part of the IC chip when viewed in plan. The IC chip includes: an inner pad disposed on an active face and in an area where is overlapped with the piezoelectric resonator when viewed in plan; an insulating layer formed on the active face; a relocation pad disposed on the insulating layer and in an area other than a part where is overlapped with the piezoelectric resonator element, the relocation pad being coupled to an end part of a first wire; and a second wire electrically coupling the inner pad and the relocation pad, the second wire having a relocation wire and a connector that penetrates the insulating layer, the relocation wire being disposed between the insulating layer and the active face.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: June 24, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Kazuhiko Shimodaira
  • Patent number: 8471643
    Abstract: Electromechanical systems resonator structures, devices, circuits, and systems are disclosed. In one aspect, an oscillator includes an active component and a passive component connected in a feedback configuration. The passive component includes one or more contour mode resonators (CMR). A CMR includes a piezoelectric layer disposed between a first conductive layer and a second conductive layer. The conductive layers include an input electrode and an output electrode. The passive component is configured to output a first resonant frequency and a second resonant frequency, which is an odd integer harmonic of the first resonant frequency. The active component is configured to output a signal including the first resonant frequency and the second resonant frequency. This output signal can be a substantially square wave signal, which can serve as a clock in various applications.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: June 25, 2013
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventors: Jonghae Kim, Je-Hsiung Lan, Changhan Yun, Chi Shun Lo, Matthew Nowak
  • Patent number: 8456248
    Abstract: A circuit arrangement (S) for supplying a load (P), whose essential electric property is capacitance, from a DC voltage source (U0) has a switch element (S1), which in the operational state is alternately switched between the conductive and non-conductive state, and at least one component (L1, L2) whose essential property is inductance, the load (P) being coupled into the circuit arrangement (S) in parallel to the component (L1, L2) so that the load (P) and the component (L1, L2) form a parallel resonant circuit, the switch element (S1) is connected between the parallel resonant circuit and a base voltage (GND) and the DC voltage source is to be applied in parallel (U0) to the load. The circuit arrangement (S) according to the invention can be used to drive the capacitive load (P) in a bipolar manner, the supply of the load in the non-conductive phase of the switch element (S1) being achieved by the component (L1, L2).
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: June 4, 2013
    Assignee: Braun GmbH
    Inventors: Uwe Schober, Robert Schäfer, Frank Kressmann
  • Patent number: 8107252
    Abstract: A mounting structure includes: an electronic component including: a functional element having a predetermined function; a first resin protrusion section having a surface covered by a covering film including a conductive section electrically connected to the functional element; and a second resin protrusion section that is disposed inside an area surrounded by the first resin protrusion section, and has adhesiveness at least on a surface of the second resin protrusion section, and a base member having a connection electrode and adapted to mount the electronic component. In the structure, the second resin protrusion section mounts the electronic component on the base member in a condition in which the conductive section of the covering film has conductive contact with the connection electrode due to elastic deformation of the first resin protrusion section.
    Type: Grant
    Filed: September 17, 2009
    Date of Patent: January 31, 2012
    Assignee: Seiko Epson Corporation
    Inventor: Yukihiro Hashi
  • Patent number: 7728684
    Abstract: Device and method for temperature compensation in a clock oscillator using quartz crystals, which integrates dual crystal oscillators. The minimal power consumption is achieved through an efficient use of a processor in charge of the synchronization of the two oscillators. The invention is particularly adapted for the provision of a precise reference clock in portable radiolocalization devices.
    Type: Grant
    Filed: September 10, 2007
    Date of Patent: June 1, 2010
    Assignee: QUALCOMM Incorporated
    Inventor: Andrew Tozer
  • Publication number: 20090293132
    Abstract: An apparatus providing for a secure execution environment. The apparatus includes a microprocessor and an external crystal. The microprocessor is configured to execute non-secure application programs and a secure application program, where the non-secure application programs are accessed from a system memory via a system bus and the secure application program is accessed from a secure non-volatile memory via a private bus coupled to the microprocessor. The microprocessor has a secure real time clock that is configured to provide a persistent time, where the secure real time clock is only visible and accessible by the secure application program when the microprocessor is executing in a secure mode. The external crystal is coupled to the secure real time clock within the microprocessor and is configured to cause an oscillator within the secure real time clock to generate an oscillating output voltage that is proportional to the frequency of the external crystal.
    Type: Application
    Filed: October 31, 2008
    Publication date: November 26, 2009
    Applicant: VIA TECHNOLOGIES, INC
    Inventors: G. Glenn Henry, Terry Parks
  • Patent number: 7595701
    Abstract: The present invention provides a constant temperature oven type crystal oscillator for reducing the difference of frequency stability caused by controlling the temperature in the oscillator when detecting the change of the outside-air temperature and controlling the amount of generated heat of a heat source provided in the oscillator.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: September 29, 2009
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventor: Minoru Fukuda
  • Patent number: 7426373
    Abstract: An impedance tuning system, especially for a cellular telephone system. The system can be used to match the impedance of an antenna element with that of an output stage of a transmitter driving the antenna element. The system includes a piezo capacitor in parallel with the magnetostrictive inductor to form an LC circuit. A voltage controller applies a voltage bias signal to the piezo capacitor and a current controller applies a current bias signal to the inductor. A primary controller monitors the frequency of the output signal from the transmitter and controls the voltage and current controllers as needed to alter the impedance of the system as needed to match the impedance of the antenna element with that of the output stage of the transmitter. In an alternative form an ultrasonic sensor is provided.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: September 16, 2008
    Assignee: The Boeing Company
    Inventors: Dan J Clingman, Frederick T. Calkins
  • Patent number: 6967538
    Abstract: A PLL comprising a phase detector, a loop filter and a VCO is disclosed. The phase detector periodically compares an externally inputted clock signal with a frequency of an internal clock signal, and outputs an output signal resulting from phase difference of the two signals. The loop filter outputs a predetermined voltage in response to an output signal from said phase detector. The VCO outputs said internal clock signal having a frequency proportional to said predetermined voltage. Here, the VCO includes a capsule for adjusting the value of capacitance using an internal control signal. As a result, frequencies may be pre-compensated by control signals used in the PLL. In addition, the disclosed PLL having a VCO therein can be configured into a single chip, thereby simplifying the embodiment of the whole PLL and enabling accurate compensation.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: November 22, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sung Hun Woo
  • Patent number: 6816021
    Abstract: A multi-band local oscillator for generating an output oscillator signal of a desired frequency is implemented with a single voltage controlled oscillator providing an input oscillator signal and a switch divider block. The output signal is passed through a selected one of a set of filters for band switching and through a frequency divider and subsequently mixed with the input oscillator signal of the voltage controlled oscillator.
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: November 9, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Wilhelm S. Hahn, Emmanuel Riou
  • Patent number: 6778030
    Abstract: An oscillation circuit is provided including a differential amplifier having plural output terminals that provide output signals having different phases from each other, a SAW resonator, and a phase shift circuit, wherein the differential amplifier, SAW resonator, and phase shift circuit forming a positive feedback oscillation loop and a switch circuit being provided for selecting one of the output terminals of the differential amplifier to complete the positive feedback oscillation loop. The switch circuit selects one of the signals SQ1 and SQ2 and transmits it to the phase shift circuit. The phase shift circuit transmits output signals that result from a predetermined phase shift of input signals to the SAW resonator.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: August 17, 2004
    Assignee: Seiko Epson Corporation
    Inventors: Yoshihiro Kobayashi, Nobuyuki Imai
  • Patent number: 6544331
    Abstract: A crystal oscillator and method for manufacturing same including excitation electrode portions formed upon a crystal substrate and thus forming an excitation portion of the area defined between the electrode portions. Axis inversion portions possess an electrical axis (−X) opposite to the electrical axis (X) of the excitation portion, these axis inversion portions being formed within the crystal substrate at a position other than that of the excitation portion. A stable resonance frequency and filter frequency can be obtained even under conditions of ambient temperature fluctuation, by means of a relatively simple temperature compensation circuit, wherein handling is easy and no complicated adjustment is necessary, and low costs can be realized.
    Type: Grant
    Filed: May 18, 1999
    Date of Patent: April 8, 2003
    Assignee: Mitsubishi Materials Corporation
    Inventor: Takehiko Uno
  • Patent number: 6134117
    Abstract: A method for high resolution trimming of PCB components, such as capacitors, inductors, transmission lines, transformers, antennas, resistors, etc. The method includes drilling or milling the PCB to effect the electrical characteristics of the component. The actual component can be machined to reduce the size of the component, or electrical connections to the component can be severed. The method can be used to set the capacitance of a tuning capacitor for an oscillator circuit. The tuning capacitor is etched out of the conductive planes on opposing sides of the PCB. The dielectric substrate of the PCB acts as the dielectric for the capacitor. The conductive planes are also etched to define conductive traces and connection pads suitable for surface mounting and electrically connecting the various electrical components on the PCB. The area of the selectively etched capacitive plates has a capacitance that is predetermined.
    Type: Grant
    Filed: April 16, 1999
    Date of Patent: October 17, 2000
    Assignee: Delphi Technologies, Inc.
    Inventors: John David Funk, Paul John Dobosz
  • Patent number: 5875099
    Abstract: An electronic component suppresses stray capacitance and exhibits a high electromagnetic shielding effect, and eliminates flowing of a conductive agent into inappropriate areas and occurrence of a poor electrical connection. Electronic-component devices are mounted on an insulating substrate having input and output electrodes and a ground electrode. Then, a metallic cap is bonded and sealed onto the substrate via an insulating layer having holes formed therein so as to cover the electronic-component devices. A conductive layer connected to the ground electrode is disposed on part of the cap-mounting portion of the substrate and positioned at a level higher than the insulating layer so that the metallic cap is electrically connected via the conductive layer to the ground electrode.
    Type: Grant
    Filed: May 21, 1998
    Date of Patent: February 23, 1999
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Michinobu Maesaka, Tetsuo Tatsumi, Masato Higuchi
  • Patent number: 5717402
    Abstract: The GPS-disciplined clock consists of two digital phase locked loops. The first, Loop 1, tracks the crystal oscillator's third overtone vs. fundamental frequency variation with a numerical controlled oscillator, NCO1; The second digital phase locked loop, Loop 2, tracks the GPS satellite receiver's 1PPS signal vs. the crystal oscillator's frequency counter output variation with another numerical controlled oscillator, NCO2. When the satellites are in view, the embedded computer writes the two NCOs tracking record onto a memory; while the satellites are not in view, the computer directs a digital frequency synthesizer to generate frequency according to the tracking records stored in the memory. The hardware implementation of the inventive design is mostly digital, but a very-large-scale ASIC can be used to miniaturize the whole GPS-Synchronized clock system, making it a battery-powered, truly portable, and easy to be integrated into other instruments.
    Type: Grant
    Filed: December 9, 1994
    Date of Patent: February 10, 1998
    Inventor: Peter Chu
  • Patent number: 4610894
    Abstract: In a method of manufacturing a surface-acoustic-wave device composed of, at least, a substrate through which a surface acoustic wave is propagated, the propagation velocity of the surface acoustic wave is adjusted by applying light directly to the surface of the substrate constituting the device or through a thin film of asymmetric lattice configuration deposited thereon by sputtering, the thin film having a thickness not exceeding a value of 0.03 times as large as the wavelength of the surface acoustic wave propagated through the substrate.
    Type: Grant
    Filed: June 19, 1984
    Date of Patent: September 9, 1986
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kentaro Setsune, Osamu Yamazaki, Kiyotaka Wasa, Kazuo Tazuke
  • Patent number: 4586110
    Abstract: A composite part of a piezo-electric resonator and a condenser integrally joined together and a method of producing the composite part. A composite element is formed of a piezo-electric resonator and a condenser each provided with end electrodes at end portions thereof by fixedly integrating the piezo-electric resonator and the condenser under the condition that a gap serving as a vibration space is formed between the face of the piezo-electric resonator and the face of the condenser opposing the face of the piezo-electric resonator. This composite element is cut out of a pile of a laterally long piezo-electric resonator and a laterally long condenser by cutting it in the direction of width. This composite element is housed in a case and both end electrodes and a common electrode thereof are connected with lead terminals, the opening of the case being sealed.
    Type: Grant
    Filed: November 26, 1984
    Date of Patent: April 29, 1986
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Takashi Yamamoto
  • Patent number: 4472655
    Abstract: A tuning fork flexural quartz resonator is cut out from a Z plate rotated at 25.degree.-165.degree. around the X-axis as the rotary axis. The resonator with an excellent frequency sensitivity of about -100 ppm/.degree.C. is obtained when the cut angle .theta. is 120.degree..
    Type: Grant
    Filed: March 25, 1983
    Date of Patent: September 18, 1984
    Assignee: Kabushiki Kaisha Daini Seikosha
    Inventor: Hirofumi Kawashima