Abstract: Provided is a balance-unbalance converter including: a substrate; an unbalanced line; a first balanced line; and a second balanced line on the substrate. The unbalanced line has a first end at which an unbalanced signal is input, and an opened second end. The first balanced line is in parallel with a line portion of the unbalanced line from the first end to a midpoint of the unbalanced line, and has a midpoint-side third end at which a balanced signal is output, and a grounded fourth end. The second balanced line is in parallel with a line portion of the unbalanced line from the second end to the midpoint, and has a midpoint-side fifth end at which the balanced signal is output, and a grounded sixth end. The unbalanced line is bent at the midpoint toward an opposite side of the first and second balanced lines.

Abstract: A magnetic sensor for superconducting quantum interference device using single operational amplifier comprising SQUID, a feedback coil, feedback resistor and an operational amplifier. The voltage signal of SQUID is delivered to one input of the operational amplifier, a bias voltage is delivered to other input of the operational amplifier, and the output of the operational amplifier connects to one end of a feedback resistor, the other end of the feedback resistor connects to a feedback coil that is coupled through mutual inductance with the SQUID so as to generate feedback magnetic flux, the output voltage of the operational amplifier drives the feedback resistance to generate current, thereby forming a flux locking loop. The present invention uses an open loop operational amplifier to implement SQUID magnetic flux locking feedback circuit which simplifies the circuit configuration, decrease the loop delay and thereby achieving higher bandwidth of the flux locking loop.

Abstract: Devices and methods for providing enhanced diversity reception and cosite cancellation are disclosed. According to one aspect, the subject matter described herein includes a device for providing enhanced diversity reception and cosite cancellation. The device includes a transmit chain connected to a circulator further connected to first antenna and to a combiner. The combiner is connected to anti-cosite circuitry and to first detector. The anti-cosite circuitry is further connected to a secondary antenna. The first detector is further connected to a receive chain.

Abstract: Embodiments of digital high-speed bi-phase modulator and method for bi-phase modulation are generally described herein. In some embodiments, the digital high-speed bi-phase modulator comprises a high-speed digital divider, a high-speed digital multiplexer, and matched signal paths provided between the divider and the multiplexer. The high-speed digital divider is configured to receive a carrier signal and generate complementary output signals. The high-speed digital multiplexer is configured to switch between the complementary output signals and generate a bi-phase modulated output at a carrier frequency (fc) modulated with a bi-phase code. The bi-phase code may be provided to control inputs of the multiplexer.

Abstract: Some embodiments relate to a phase shifter that includes an I/Q phase shifter and at least one LC balun. Compared to conventional phase shifters, phase shifter has primarily only LC components, thereby limiting losses relative to conventional solutions. In one embodiment, for example, a phase shifter shows a large bandwidth at 77 GHz center frequency (e.g., 1 dB amplitude error bandwidth is approximately 40 GHz; 1° phase error bandwidth is about 16.5 GHz). The inductors included in phase shifter, in contrast to the quarter wave transmission lines used in conventional phase shifters, reduces chip area compared with conventional solutions. In some embodiments, an emitter follower helps to provide a relatively constant output that is largely independent of temperature, input power, VCC, manufacturing variation, and so on.

Abstract: Embodiments provide a mixer cell, which is implemented to logically combine a data signal with an oscillator signal and a sign signal to obtain a mixer cell output signal based on the logical combination. Further embodiments provide a modulator with a plurality of mixer cells.

Abstract: Polar feedback architecture. A polar modulator, as may be implemented within a transmitter module, of a communication device includes feedback. This feedback involves monitoring of phase information and magnitude/amplitude information of an output signal generated by the polar modulator. The output signal can be a radio frequency (RF) signal such as may be transmitted via a communication channel within a communication system. A baseband processing module processes the monitored phase information and magnitude/amplitude information to perform adjustment of a phase modulator and/or other components within the polar modulator.

Abstract: The present invention is a method and an apparatus for optical modulation, for example for use in optical communications links. In one embodiment, an apparatus for optical modulation includes a first silicon layer having one or more trenches formed therein, a dielectric layer lining the first silicon layer, and a second silicon layer disposed on the dielectric layer and filling the trenches.

Abstract: In one embodiment, a local oscillator (LO) is configured to generate an LO signal. A transmission line receives the LO signal from the local oscillator and transmits the LO signal. A first set of taps and a second set of taps tap the transmission line to receive the LO signal. A plurality of transceiver blocks are configured to receive and transmit a plurality of phase-shifted radio frequency signals. Each transceiver block is coupled to a first tap and a second tap. Each LO signal received for a transceiver block is received with a different phase. However, the same reference phase may be calculated from a first LO signal received from the first tap and a second LO signal received from a second tap. Each transceiver block receives the reference LO signal having the reference phase determined from the first LO signal and the second LO signal.

Abstract: A quadrature amplitude modulator is provided. An oscillator generates an in-phase carrier signal having a rectangular wave, a trapezoidal wave or a waveform similar to these, and a quadrature carrier signal, the phase of which is shifted by ¼ cycle relative to the in-phase carrier signal. A multi-level driver generates an in-phase modulated signal by amplitude modulating the in-phase carrier signal with an analog in-phase baseband signal having a discrete voltage level or current level in accordance with the in-phase baseband data. Likewise, the multi-level driver generates a quadrature modulated signal by amplitude modulating the quadrature carrier signal with an analog quadrature baseband signal having a discrete voltage level or current level in accordance with the quadrature baseband data The multi-level driver generates a modulated signal, the amplitude of which takes a discrete level, by combining the modulated signals together.

Abstract: Embodiments provide a mixer cell, which is implemented to logically combine a data signal with an oscillator signal and a sign signal to obtain a mixer cell output signal based on the logical combination. Further embodiments provide a modulator with a plurality of mixer cells.

Abstract: A quadrature modulator has first to fourth transistors, a first node, a second node, and a first output node. A non-inversion in-phase analog signal, an inversion in-phase analog signal, a non-inversion quadrature analog signal, and an inversion quadrature analog signal are supplied to input electrodes of the first to fourth transistors, respectively. Control electrodes of the first to fourth transistors respond to a non-inversion in-phase RF signal, an inversion in-phase RF signal, a non-inversion quadrature RF signal, and an inversion quadrature RF signal, respectively. Output electrodes of the first and second transistors are coupled to the first node, and output electrodes of the third and fourth transistors are coupled to the second node. A first high-pass filter is coupled between the first node and the first output node, and a second high-pass filter is coupled between the second node and the first output node.

Abstract: Some aspects of the present disclosure provide for polar modulation techniques that utilize an 180° phase shift module disposed downstream of a VCO-DCO. In some embodiments, this configuration allows a polar modulator to use the VCO-DCO to achieve small phase shifts (e.g., less than or equal to) 90°, while carrying out 180° phase shifts in the 180° phase shift module downstream of the VCO-DCO.

Abstract: A modulation circuit for use in a radiofrequency transmitter includes a local oscillator circuit configured to generate one or more local oscillator signals at a desired frequency and with a duty cycle at or about twenty-five percent, and a modulator configured to generate one or more modulated signals responsive to the one or more local oscillator signals and one or more baseband information signals. In at least one embodiment, the modulation circuit includes a modulator comprising a combined mixing and transconductance circuit that includes a transistor circuit for each baseband information signal serving as a modulation input to the modulator. Each transistor circuit comprises a first transistor driven by the baseband information signal and coupling a modulator output node to a corresponding transconductance element, and a second transistor driven by one of the one or more local oscillator signals and coupling the corresponding transconductance element to a signal ground node.

Abstract: Modulators for amplitude-modulating signals defined by phase information and envelope codes are provided with first transistors for receiving the phase information and second transistors for receiving the envelope codes. The first main electrode of one transistor is coupled to the second main electrode of the other transistor and the other second main electrode constitutes an output of the modulator. This modulator can be used in any kind of transistor environment and is simple and low cost. The doped areas of the coupled first and second main electrodes comprise an overlap to reduce cross-talk and to reduce silicon area. Polar transmitters are provided with this modulator and with a circuit for generating a phase/frequency code and the envelope code and with an oscillator for receiving the phase/frequency code and for generating the phase information. A phase shift between the phase information and the envelope code reduce aliases.

Abstract: A radio frequency integrated circuit (and method of making) for enhancing wireless communication and/or sensing systems comprising a base comprising a gallium arsenide (GaAs) substrate; a binary phase shift keying modulator fabricated on the base; a power amplifier fabricated on the base and operatively associated with the binary phase shift keying modulator; the power amplifier having a first shunt operatively associated therewith; a transmit/receive switch fabricated on the base, the transmit/receive switch being operatively associated with the power amplifier and being alternately connectable to an antenna port adapted to be connected to an antenna; a low noise amplifier fabricated on the base; the low noise amplifier being alternately connectable to the antenna port, the low noise amplifier having a second shunt operatively associated therewith; the circuit operating in a transmit stage in which the power amplifier is connected to the antenna port and in a receive stage in which the low noise amplifier is

Abstract: A radio frequency (RF) transmission correction module includes an RF transmission error detection module and a correction module. The error detection module includes an RF envelope detector, a signal conversion module, and an error detection module. The RF envelope detector is operably coupled to produce an envelope signal from a transmit RF signal, wherein the envelope signal represents at least one of local oscillation leakage and in-phase (I) and quadrature (Q) imbalance. The signal conversion module is operably coupled to convert the envelope signal into an error signal in accordance with baseband processing of the transmit RF signal. The error detection module is operably coupled to determine at least one of a local oscillation leakage value and an I and Q imbalance value from the error signal.

Abstract: Provided is a polar modulation apparatus which compensates for output characteristics of a power amplifier. A data generator (11) generates, from a baseband signal, an amplitude component signal and a phase component signal. A phase modulator (12) generates a phase modulated signal obtained by phase modulating the phase component signal. An adder (16) adds an amplitude offset voltage to the amplitude component signal. A power amplifier (13), which includes a first hetero-junction bipolar transistor, amplifies the phase modulated signal by using the amplitude component signal. A monitor unit (14) monitors the power amplifier (13) and outputs a monitor voltage. The control unit (15) calculates the amplitude offset voltage according to the monitor voltage and outputs the calculated amplitude offset voltage to the adder (16). The monitor unit (14) includes a second hetero-junction bipolar transistor, and outputs a collector-emitter voltage of the second hetero-junction bipolar transistor as the monitor voltage.

Abstract: The method and system are disclosed for automatic feedback control of integrated optical quadrature modulator for generation of optical quaternary phase-shift-keyed signal in coherent optical communications. The method comprises the steps of detecting at least a part of an output optical signal from the QPSK modulator, extracting of a particular portion of the output signal in frequency domain, and processing the signal in frequency domain to optimize the transmission of an optical link. The system and method of optical communications in fiber or free space are disclosed that implement the quadrature data modulator with automatic feedback control.

Abstract: To provide an adder capable of obtaining an addition signal of a plurality of high frequency signals, and also a power combiner, a quadrature modulator, a quadrature demodulator, a power amplifier, a transmitter, and a wireless communicator, each of which uses the adder. Impedances (Zg, Zh) seen from a common output point (P3) of a plurality of first impedance circuits (110a, 110b) toward respective input terminals (102a, 102b) are set so that high frequency currents (Ig, Ih) are approximately zero. An impedance (Zs) seen from a first connection point (P1) toward the input terminals (102a, 102b) is set so that a high frequency current (Is) is approximately zero. An impedance (Zc) seen from the first connection point (P1) toward a circuit (150) is set so that a high frequency current (Ic) is approximately zero. An impedance (Zm) seen from a second connection point (P2) toward a power supply is set so that a high frequency current (Im) is approximately zero.

Abstract: A multi-phase ultra-wideband signal generator uses differential pulse oscillators. The multi-phase ultra-wideband signal generator using differential pulse oscillators includes N pulse oscillators for generating pulse signals based on a supply of power, and further comprises N inverting amplification units for outputting inverted amplified signals of output signals of the N pulse oscillators when a number of pulse oscillators is at least two, wherein, when the number of pulse oscillators is an even or odd number, the pulse oscillators are arrayed such that they have a connection form in which output terminals OUT(+) and OUT(?) of a relevant pulse oscillator are connected to output terminals OUT(+) and OUT(?) of a next pulse oscillator through a relevant inverting amplification unit, and the connection form is consecutively applied to the pulse oscillators.

Abstract: The present disclosure relates to I/Q modulation circuits, devices, and methods.

Abstract: A quadrature modulator has first to fourth transistors, a first node, a second node, and a first output node. A non-inversion in-phase analog signal, an inversion in-phase analog signal, a non-inversion quadrature analog signal, and an inversion quadrature analog signal are supplied to input electrodes of the first to fourth transistors, respectively. Control electrodes of the first to fourth transistors respond to a non-inversion in-phase RF signal, an inversion in-phase RF signal, a non-inversion quadrature RF signal, and an inversion quadrature RF signal, respectively. Output electrodes of the first and second transistors are coupled to the first node, and output electrodes of the third and fourth transistors are coupled to the second node. A first high-pass filter is coupled between the first node and the first output node, and a second high-pass filter is coupled between the second node and the first output node.

Abstract: A differential positive coefficient weighted quadrature modulator is actuated responsive to quadrature clock signals and positive digital modulation signals input to the modulator. The modulator includes an I-channel positive coefficient weighted modulator (PCWM) and a Q-channel PCWM. The I-channel PCWM has differential output nodes configured to output a differential I-channel signal responsive to the state of first and second positive digital modulation signals and first and second complimentary quadrature clock signals input to the I-channel PCWM. The Q-channel PCWM has differential output nodes configured to output a differential Q-channel signal responsive to the state of third and fourth positive digital modulation signals and third and fourth complimentary quadrature clock signals input to the Q-channel PCWM.

Abstract: A voltage control oscillator includes: first and second field effect transistors, a drain of one of which is connected to a gate of the other and a drain of the other of which is connected to a gate of the one; third and fourth field effect transistors, a drain of one of which is connected to a gate of the other and a drain of the other of which is connected to a gate of the one; a first inductor connected between the drain of the first field effect transistor and the drain of the second field effect transistor; a second inductor connected between the drain of the third field effect transistor and the drain of the fourth field effect transistor; a third inductor magnetically coupled to the first inductor; a fourth inductor magnetically coupled to the second inductor; a first capacitor that capacitively couples one end of the third inductor and one end of the fourth inductor; and a second capacitor that capacitively couples the other end of the third inductor and the other end of the fourth inductor.

Abstract: A modulation/demodulation apparatus according to an embodiment of the present invention includes a sine wave generating circuit configured to output two sine waves which are orthogonal to each other and have equal amplitude, an orthogonal modulator connected to the sine wave generating circuit and configured to modulate the sine waves to generate a modulated signal, a detecting section configured to detect amplitude fluctuation in the modulated signal, a multiplying section configured to multiply the modulated signal and the amplitude fluctuation detected by the detecting section together, and an orthogonal demodulator configured to demodulate the modulated signal multiplied with the amplitude fluctuation by the multiplying section to generate a demodulated signal.

Abstract: A bi-polar modulator that can perform quadrature modulation using amplitude modulators is described. In one design, the bi-polar modulator includes first and second amplitude modulators and a summer. The first amplitude modulator amplitude modulates a first carrier signal with a first input signal and provides a first amplitude modulated signal. The second amplitude modulator amplitude modulates a second carrier signal with a second input signal and provides a second amplitude modulated signal. The summer sums the first and second amplitude modulated signals and provides a quadrature modulated signal that is both amplitude and phase modulated. The first and second input signals may be obtained based on absolute values of first and second modulating signals, respectively. The first and second carrier signals have phases determined based on the sign of the first and second modulating signals, respectively. Each amplitude modulator may be implemented with a class-E amplifier.

Abstract: A switching circuit comprising: first and second steering switches operable to make or break a path between first and second terminals thereof, and each steering switch further having a control terminal for controlling the switch, the first and second steering switches having their control terminals driven by first and second switching signals, the first and second switching signals having a first frequency and the second switching signal being in anti-phase with the first switching signal and a first chopping switch operable to make or break a path between first and second terminals thereof and being connected in series with at least one of the first and second steering switches and receiving at its first terminal an input to be modulated, wherein the control terminal of the chopping switch is driven by a first switching control signal such that the chopping switch is non-conducting while the first and second steering switches are changing between being conducting and being non-conducting.

Abstract: An offset errors of a quadrature modulator is corrected. A device including a first correction signal output unit (50) for outputting a first correction signal based upon a local signal (phase: 0°) from a 180°-phase amplifier (27) or a phase shift local signal (phase: 180°) from a 180°-phase amplifier (23), a second correction signal output unit (60) for outputting a second correction signal based upon an orthogonal local signal (phase: 90°) from a 180°-phase amplifier (37) or an orthogonal phase shift local signal (phase: 270°) from a 180°-phase amplifier (33), and a correction signal output unit (70) for outputting a correction signal based upon the first and second correction signals, wherein a correction signal is further added to outputs from an I signal mixer (42) and a Q signal mixer (44) by an adder (46) resulting in correcting offset errors of the quadrature modulation.

Abstract: In a radio communication system, transmitter and receiver stations share information on a maximum number of bits communicated per symbol. The transmitter station encodes a signal with sufficient error correcting capabilities to create a codeword. The transmitter station allocates the bits from the codeword to each symbol, modulates the symbols using a modulation type which processes symbols each having a number of bits equal to or smaller than the maximum number of bits per symbol, and transmits the modulated symbols. The receiver station demodulates the symbols using a modulation type which processes a larger number of bits per symbol as the transmission path quality is higher from among modulation types which process symbols having a number of bits equal to or smaller than the maximum number of bits per symbol.

Abstract: A bi-polar modulator that can perform quadrature modulation using amplitude modulators is described. In one design, the bi-polar modulator includes first and second amplitude modulators and a summer. The first amplitude modulator amplitude modulates a first carrier signal with a first input signal and provides a first amplitude modulated signal. The second amplitude modulator amplitude modulates a second carrier signal with a second input signal and provides a second amplitude modulated signal. The summer sums the first and second amplitude modulated signals and provides a quadrature modulated signal that is both amplitude and phase modulated. The first and second input signals may be obtained based on absolute values of first and second modulating signals, respectively. The first and second carrier signals have phases determined based on the sign of the first and second modulating signals, respectively. Each amplitude modulator may be implemented with a class-E amplifier.

Abstract: The present invention relates to a polar modulation apparatus and method, in which a polar-modulated signal is generated based on separately processed phase modulation (PM) and amplitude modulation (AM) components of an input signal. An amplified polar modulated output signal is generated in accordance with the phase modulation and amplitude modulation components by using a differential power amplifier circuitry (30) and supplying an amplified phase modulation component to a differential input of the differential power amplifier circuitry (30). A bias input of the differential power amplifier circuitry (30) is controlled based on the amplitude modulation component, so as to modulate a common-mode current of the differential power amplifier circuitry (30). Thereby, a new concept of a polar modulator with static DC-DC converter and power and/or efficiency and/or linearity controlled output power amplifier can be achieved.

Abstract: A modulation circuit is provided that generates an output signal obtained by modulating an input signal with a local signal and includes a local input section that receives the local signal and generates the local signal and an inverted local signal obtained by inverting the local signal, a signal input section that receives the input signal and generates the input signal and an inverted input signal obtained by inverting the input signal, a first multiplying section that outputs from a terminal that receives the input signal a first multiplied signal obtained by multiplying the local signal with the input signal, a second multiplying section that outputs from a terminal that receives the inverted input signal a second multiplied signal obtained by multiplying the inverted local signal with the inverted input signal, an output section that adds the first multiplied signal to the second multiplied signal and generates the output signal, and a transmission line that sends to the output section the first multipl

Abstract: A novel apparatus and method for a fully digital quadrature architecture for a complex modulator. The complex modulator can substitute for existing prior art analog quadrature modulator structures and those based on a digital polar architecture (r, ?). The modulator effectively operates as a complex digital-to-analog converter where the digital inputs are given in Cartesian form, namely I and Q representing the complex number I+jQ, while the output is a modulated RF signal having a corresponding amplitude and phase shift. The phase shift being with respect to a reference phase dictated by the local oscillator, which is also input to the converter/modulator. Several embodiments are provided including modulators incorporating dual I and Q transistor arrays, a single shared I/Q transistor array, modulators with single ended and differential outputs and modulators with single and dual polarity clock and I/Q data signals.

Abstract: A varactor element having a junction region, in which the depletion capacitance of the varactor element varies when a reverse bias voltage is applied to the varactor element. The varactor element has an exponential depletion capacitance-voltage relation, e.g. obtained by providing a predetermined doping profile in the junction region. The varactor element can be used in a narrow tone spacing varactor stack arrangement, in which two varactor elements are connected in an anti-series configuration. A low impedance path for base band frequency components between a control node and each of two RF connection nodes is provided, while for fundamental and higher order harmonic frequencies, a high impedance path is provided.

Abstract: An IQ modulator's performance is optimized through determination of suitable control parameters by the application of known DC biases as the I and Q inputs. Also known are the relative amplitude and actual phase of the sine and cosine carriers to be modulated before they are summed. It is shown that by measuring an RMS voltage Atotal an appropriate number of times for a related combination of the applied DC biases in conjunction with the other known input parameters, a number of behavior parameters that are indicative of mixer performance can be discovered through analysis, such as the solution of a system of linear equations. The combination of behavior parameters may be assigned a Figure Of Merit (FOM) that can be taken as an indication of the degree to which mixer operation approaches ideal behavior. The control parameters may be perturbed over a selected range, and the extraction of the behavior parameters repeated.

Abstract: A data communication apparatus and method based on OFDMA are provided. In a first user transmitting unit through which a user transmits user information to a base station in units of first symbol blocks each including M symbols, a first encoder generates a first sub-block composed of Mu user symbols for a u-th user by encoding the user information. A first block repeater repeats the first sub-block Lu times to generate M symbols. A first multiplier multiplies the M symbols by ?u exp(j2?kmu/M) and outputs a u-th user signal. A first cyclic extension symbol inserter inserts a cyclic extension symbol into the u-th user signal and generates a single complete first symbol block. Accordingly, data transmission speed can be freely changed, a very small PAR can be provided, influence of the signal interference is greatly reduced, interference occurring between received blocks due to channels can be prevented, and distortion between channels can be effectively compensated for.

Abstract: A transmitter and a receiver share a maximum number of transmission bits per symbol as a parameter. The transmitter modulates an encoded and interleaved transmission signal in accordance with a modulation scheme which enables the transmission of one bit or more per symbol, while the receiver demodulates a received signal based on a channel quality in accordance with a modulation scheme which has a higher modulation level as the channel quality is higher. When the number of demodulated bits per symbol is smaller than the maximum number of transmission bits per symbol, the receiver deinterleaves and decodes a received signal after the demodulation on the assumption that the received signal has likelihoods of zero as much as the number of missing bits.

Abstract: System for highly linear phase modulation. Apparatus is provided for linear phase modulation utilizing a phase-locked loop (PLL). The apparatus includes a PLL utilizing fractional N synthesis to realize a non-integer divide value. A two-port voltage-controlled oscillator includes a first port controlled by the phase-locked loop and a second port accessed for direct modulation. A second input to the fractional-N phase-locked loop is provided to remove the modulation introduced at the second port. Lastly, a calibration loop is provided wherein a frequency offset applied at the second port is adjusted until it cancels the effects of a known frequency offset introduced to the fractional-N phase-locked loop.

Abstract: A transceiver and transmitter are shown. A baseband processor receives a signal for transmission. It converts the signal into amplitude and phase polar components. Each component is then processed—the phase component through a wideband phase modulator and the amplitude component through a wideband amplitude modulator, and the components are then recombined for further processing or transmission.

Abstract: The invention relates to a system for electromagnetic processing of an input wave involving receiving a modified signal derived from two or more signals that represent the input wave when combined; and alternately regulating the modified signal using a digital signal containing at least one characteristic of said two or more signals. The invention may utilize in-phase and quadrature phase signals, where the magnitude portion of the signals may be used for regulating the modified signal. The modified signal may be created by modulating a characteristic of the I, Q signals, such as their sign, with an RF or other frequency carrier wave.

Abstract: A method and a circuit for modulating a carrier signal (Se) with a signal (SCj) having at least a modulation cell (CMi) by phase shift for receiving two digital control signals (Scji, SCji2) representing at least part of the digital modulation signal (SCj). For at least a value of the digital modulation signal (SCj), the method consists in applying on at least a common modulation cell (CMi), two digital control signals (SCji1, SCji2) of identical value, the modulation cell (CMi) delivering a signal, called a modulated elementary signal (Ssi), which is null for the digital modulation signal value (SCj).

Abstract: System for highly linear phase modulation. Apparatus is provided for linear phase modulation utilizing a phase-locked loop (PLL). The apparatus includes a PLL utilizing fractional N synthesis to realize a non-integer divide value. A two-port voltage-controlled oscillator includes a first port controlled by the phase-locked loop and a second port accessed for direct modulation. A second input to the fractional-N phase-locked loop is provided to remove the modulation introduced at the second port. Lastly, a calibration loop is provided wherein a frequency offset applied at the second port is adjusted until it cancels the effects of a known frequency offset introduced to the fractional-N phase-locked loop.

Abstract: A semiconductor integrated circuit device includes an orthogonal modulator that maintains carrier leak characteristics regardless of attenuation of an output signal level. The orthogonal modulator includes a phase shifter circuit and generates a modulation signal. An auto gain controller amplifies the modulation signal to generate an amplified modulation signal. A gain adjusting circuit adjusts a gain of the phase shifter circuit in accordance with a control signal.

Abstract: A method and an arrangement for compensating for amplitude imbalance of a quadrature modulator including: determining a first correlation on the basis of a first modulation signal and an output signal of the quadrature modulator; determining a second correlation on the basis of a second modulation signal and the output signal of the quadrature modulator; producing a compensation signal proportional to the amplitude imbalance on the basis of a ratio of the determined correlations and the first and second modulation signals; and processing at least one of the modulation signals of the quadrature modulator with the compensation signal; wherein determining the correlations uses unprocessed modulation signals of the quadrature modulator for determining the correlations.

Abstract: A modulated signal source for implementing A modulated signal method of a generating a modulated signal having a radio frequency based upon a linear mixing of signals is disclosed. An in-phase pulse signal modulator of the modulated signal source provides an in-phase pulse modulated signal in response to a reception of a baseband in-phase signal and an in-phase clock signal with the in-phase clock signal and the in-phase pulse modulated signal being synchronized. A quadrature pulse signal modulator of the modulated signal source provides a quadrature pulse modulated signal in response to a reception of a baseband quadrature signal and a quadrature clock signal with the quadrature clock signal and the quadrature pulse modulated signal being synchronized.

Abstract: A modulated signal source for implementing A modulated signal method of a generating a modulated signal having a radio frequency based upon a linear mixing of signals is disclosed. An in-phase pulse signal modulator of the modulated signal source provides an in-phase pulse modulated signal in response to a reception of a baseband in-phase signal and an in-phase clock signal with the in-phase clock signal and the in-phase pulse modulated signal being synchronized. A quadrature pulse signal modulator of the modulated signal source provides a quadrature pulse modulated signal in response to a reception of a baseband quadrature signal and a quadrature clock signal with the quadrature clock signal and the quadrature pulse modulated signal being synchronized.

Abstract: A low-noise quadrature phase I-Q modulator having a pair of Gilbert cell input stages driven by a feed voltage line and receiving in input respective square wave command signals coming from a local oscillator. The modulator comprises a transistor block with transistors connected to each cell and destined to carry out a voltage-current conversion of a signal in radio frequency received from the block itself; such block further including a single degeneration resistance.

Abstract: A modulator having a high signal-to-noise ratio. The modulator comprises a switching arrangement and a driver arrangement coupled to the switching arrangement, said driver arrangement comprising driver components and among the driver components a low-pass filter arrangement. The modulator can be used, for example, in the transmitters of dual-band mobile stations without separate filters for each frequency band.

Abstract: An orthogonal modulator capable of eliminating an offset component between an I signal and a Q signal. The orthogonal modulator includes a generation circuit for generating a plurality of base band signals such as voice signal, a mixing circuit for mixing the base band signals and a plurality of carrier waves, an extraction circuit for extracting each DC offset component generated by the generation circuit or the mixing circuit, a comparison circuit for comparing the DC offset components thus extracted with each other, an addition circuit for adding a plurality of comparison results with other comparison results, and an offset elimination circuit for eliminating the DC offset components included in a plurality of addition signals by subtracting the DC offset components from the base band signals before they are applied to the mixing circuit.