Core In Transfer Loop Patents (Class 365/84)
  • Patent number: 8750011
    Abstract: A ROM cell comprises a first first-level contact formed on a first active region of a transistor of a memory cell, a first second-level contact formed on the first first-level contact, wherein the first second-level contact shifts in a first direction with reference to the first first-level contact. The ROM cell further comprises a second first-level contact formed on a second active region of the transistor of the memory cell, wherein the second first-level contact is aligned with the first first-level contact and a second second-level formed on the second first-level contact, wherein the second second-level contact shifts in a second direction with reference to the second first-level contact, and wherein the first direction is opposite to the second direction.
    Type: Grant
    Filed: March 19, 2012
    Date of Patent: June 10, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Jhon-Jhy Liaw
  • Patent number: 5329486
    Abstract: A ferromagnetic memory circuit (10) and a ferromagnetic memory device (15) which has a substrate (42). Within the substrate (42), a first current electrode (44) and a second current electrode (46) are formed. A control electrode (50) is formed to control current flow between the first and second current electrodes (44 and 46). A ferromagnetic region (68) is used to store a logic value via magnetic flux. Two conductive layers (62 and 70) and a conductive spacer (78) form a sense conductor for device (15). The sense conductor is used to externally provide the logic value stored in the device (15). A conductive layer (82) forms a program/erase line for altering the logic value stored in the device (15). A logic one or a logic zero is stored in ferromagnetic region (68) depending upon a direction and a magnitude of current flow through conductive layer (82).
    Type: Grant
    Filed: July 23, 1993
    Date of Patent: July 12, 1994
    Assignee: Motorola, Inc.
    Inventor: Craig S. Lage
  • Patent number: 4903343
    Abstract: A new data storage device that includes one or more digital data storage elements, each element including a magnetic core, and an input addressing portion comprising a magnetic input addressing element for receiving at an input magnetic flux representing a data value and selectively coupling a flux to an output for transmission to a magnetic core in response to addressing flux generated therein. An output element magnetically coupled to a magnetic core detects transitions in magnetic flux in a magnetic core. In addition, the data storage element may further comprise an output addressing portion comprising a magnetic input addressing element for receiving at an input magnetic flux representative of flux in a magnetic core and selectively coupling a flux to an output in response to addressing flux generated therein.
    Type: Grant
    Filed: January 23, 1989
    Date of Patent: February 20, 1990
    Assignee: MRAM, Inc.
    Inventors: David B. Cope, Gary J. Spletter