Logic Patents (Class 365/89)
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Patent number: 9659124Abstract: Some embodiments provide a method of monitoring the implementation of a user design in a configurable integrated circuit (IC). The method receives a user design for an IC and optimizes the user design to produce a second IC design. The optimization results in the elimination of circuit element(s). The method defines the second IC design for the configurable IC and generates output data for the eliminated circuit element(s) to allow for monitoring the user design.Type: GrantFiled: November 26, 2014Date of Patent: May 23, 2017Assignee: Altera CorporationInventors: Brad Hutchings, Andrew Caldwell, Steven Teig
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Patent number: 8622633Abstract: A connector for one or more optical fibers has a ferrule into which the optical fibers are glued directly with their outer cladding. No stripping of the fibers is required any longer before gluing them to the ferrule and thus, the difficulty of the fragility of the stripped fibers is overcome. The fibers are special fiber having a primary coating with smaller tolerances of ±2 microns. The fibers are arranged on a flexible foil which forms an optical overlay for a printed circuit board.Type: GrantFiled: July 8, 2002Date of Patent: January 7, 2014Assignee: Avanex CorporationInventor: Martin Kowatsch
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Patent number: 8213210Abstract: A magnetic shift register including at least one magnetic track is provided. Each magnetic track has at least one set of burst data formed by a plurality of consecutive magnetic domains. Each magnetic domain has a magnetization direction corresponding to a stored data. A head magnetic domain having a given magnetization direction corresponding to a given stored data is set at a most front of the set of burst data, and the head magnetic domain and the set of burst data form a data storage unit. A method for reading a magnetic shift register is provided.Type: GrantFiled: September 23, 2009Date of Patent: July 3, 2012Assignee: Industrial Technology Research InstituteInventors: Chien-Chung Hung, Ching-Hsiang Tsai
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Patent number: 8125810Abstract: An integrated circuit (200) includes a semiconductor memory device (202) operative for determining match between received search data and stored data in a plurality of ternary content addressable memory (TCAM) bitcells (100). The plurality of TCAM bitcells (100) each include bit storage including a pair of memory cells (102-0, 102-1) for holding stored data. The TCAM bitcells (100) also include bit comparison circuitry (104) operative for comparing between the stored data and search data on a search line coupled to the TCAM bitcell, wherein the bit comparison circuitry includes a static logic gate operable to provide a match output signal exclusive of a pulsed input. Match circuitry (205) is coupled to receive the match output signal (108) from the plurality of TCAM bitcells (100) for determining whether a match is present for a given search word.Type: GrantFiled: April 29, 2008Date of Patent: February 28, 2012Assignee: Texas Instruments IncorporatedInventor: Patrick W. Bosshart
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Publication number: 20040047171Abstract: A test circuit for testing differential read signals during a memory access is disclosed. The test circuit is coupled to a pair of bitlines. During a read access, a selected memory cell produces a differential read signal on the bitlines. When the test circuit is activated, the magnitude of the differential read signal is varied. This enables easy testing of read signal margins in, for example, memory ICs.Type: ApplicationFiled: September 10, 2002Publication date: March 11, 2004Inventors: Thomas Roehr, Hans-Oliver Joachim, Michael Jacob, Joerg Wohlfahrt, Takashima Daisaburo
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Patent number: 4075613Abstract: A plurality of data tracks, each formed of a strip of isotropic magnetic film, i.e., having substantially zero uniaxial anisotropy, are configured into a cross-tie wall memory system logic gate. The data-track-defining-strip of isotropic magnetic film utilizes its shape, i.e., its edge contour, induced anisotropy, rather than its easy axis magnetic field induced anisotropy, to constrain the cross-tie wall within the planar contour of the film strip. The use of the shape induced anisotropy of an isotropic strip of magnetic film permits the use of nonlinear, i.e., curved, data tracks. Two input and one output data tracks are configured into an AND/OR logic gate to permit the cross-tie wall memory system to perform both memory and logic functions.Type: GrantFiled: January 3, 1977Date of Patent: February 21, 1978Assignee: Sperry Rand CorporationInventor: Ernest James Torok