Hysteresis Storage (e.g., Counters Using Saturable Magnetic Core Elements) Patents (Class 377/97)
  • Patent number: 7573950
    Abstract: An IBOC broadcasting receiver that uses two different bit error rates as threshold values in receiving hybrid broadcasting in a simultaneous broadcasting format, and switches between digital broadcasting reception and analog broadcasting reception based on the two threshold values. The IBOC broadcasting receiver counts the number of occurrences of switching between digital broadcasting reception and analog broadcasting reception in a specified period of time, and increases a hysteresis width between the two threshold values when the number of occurrences of switching counted exceeds a specified number.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: August 11, 2009
    Assignee: Kabushiki Kaisha Kenwood
    Inventor: Yasuhiro Shimizu
  • Patent number: 4573178
    Abstract: A counter for counting pulses or dividing frequencies has a timing signal generator circuit for generating a timing signal at a predetermined interval. A hysteresis circuit has input-output characteristics defining a low input threshold level and a high input threshold level. A control circuit responds to the timing signal for generating at least three control signals having different levels including a first control signal having a level lower than the low input threshold level, a second control signal having a level higher than the high input threshold level, and a third control signal having an intermediate level which is between the low input threshold level and the high input threshold level. The counter has a very large capacity, simple construction, and is effective with both analog and digital signals.
    Type: Grant
    Filed: July 18, 1985
    Date of Patent: February 25, 1986
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Hiroshi Morito