Abstract: A multilayer capacitor includes a body including a stack structure in which at least one first internal electrode and at least one second internal electrode are alternately stacked in a first direction with at least one dielectric layer interposed therebetween; and first and second external electrodes spaced apart from each other and disposed on the body to be respectively connected to the at least one first internal electrode and the at least one second internal electrode, wherein each of the first and second external electrodes includes a first conductive layer including a first conductive material and glass; and an oxide layer including an oxide and disposed on at least a portion of an external surface of the first conductive layer.

Abstract: A method of manufacturing a semiconductor device includes a first laminating step, a second laminating step, a third laminating step, a first annealing step, and a fourth laminating step. In the first laminating step, a first electrode film is laminated on a substrate. In the second laminating step, a capacitive insulator is laminated on the first electrode film. In the third laminating step, a metal oxide is laminated on the capacitive insulator. In the first annealing step, the first electrode film, the capacitive insulator, and the metal oxide, which are laminated on the substrate, are annealed. In the fourth laminating step, a second electrode film is laminated on the annealed metal oxide. The capacitive insulator is an oxide that contains at least one of zirconium and hafnium, and the metal oxide is an oxide that contains at least one of tungsten, molybdenum, and vanadium.

Abstract: A method of forming electronic substrates and assemblies is provided. The method includes depositing a material. The material is deposited as a powder or slurry. The method includes sintering the material, and retrieving an article, including a solid electronic substrate. Also provided are electronic substrates formed by additive manufacturing, and methods of deploying the same.

Abstract: A capacitor includes a lower electrode, a first dielectric layer provided on the lower electrode including a perovskite structure, an upper electrode including a perovskite structure, a first dielectric layer between provided on the lower electrode and the upper electrode; and a second dielectric layer, having a band gap energy greater than that of the first dielectric layer, provided between on the first dielectric layer and the upper electrode, the capacitor may have a low leakage current density and stable crystallinity, thereby suppressing a decrease in a dielectric constant.

Abstract: A capacitor includes a lower electrode, a first dielectric layer provided on the lower electrode including a perovskite structure, an upper electrode including a perovskite structure, a first dielectric layer between provided on the lower electrode and the upper electrode; and a second dielectric layer, having a band gap energy greater than that of the first dielectric layer, provided between on the first dielectric layer and the upper electrode, the capacitor may have a low leakage current density and stable crystallinity, thereby suppressing a decrease in a dielectric constant.

Abstract: A multi-layer ceramic electronic component includes a multi-layer ceramic electronic component main body including a multi-layer body including stacked ceramic layers, stacked internal electrode layers, first and second main surfaces, first and second side surfaces, and first and second end surfaces, first and second external electrodes respectively on sides where the first and second end surfaces are located, and first and second metallic terminals respectively connected to the first and second external electrodes. The multi-layer ceramic electronic component main body and at least portion of the first and second metallic terminals are covered with an external material. The second main surface is connected to the metallic terminals. The first and second external electrodes cover a portion of the second main surface. A gap is provided between the multi-layer body and tips of the first and second external electrodes. The external material is in the gap.

Abstract: Methods of forming encapsulated electrochemical and/or ionically conducting particles as their use in manufacturing electrochemical cells are described.

Abstract: An energy storage device comprising a substrate comprising a series of grooves. Each groove having a first and a second face. Wherein there is a capacitor material in each groove of the series of grooves.

Abstract: The disclosed technology generally relates to energy storage devices, and more particularly to energy storage devices comprising frustules. According to an aspect, a supercapacitor comprises a pair of electrodes and an electrolyte, wherein at least one of the electrodes comprises a plurality of frustules having formed thereon a surface active material. The surface active material can include nanostructures. The surface active material can include one or more of a zinc oxide, a manganese oxide and a carbon nanotube.

Abstract: An electronic component includes a multilayer body including a multilayer main body including end surfaces at which internal nickel electrode layers are exposed, side gap portions, external nickel layers on the end surfaces of the multilayer body, and external copper electrode layers covering the end surfaces on which the external nickel layers are provided. A nickel-based oxide and/or a silicon-based oxide are provided between the external nickel layer and the external copper electrode layer. A nickel layer and a tin layer are provided outside the external copper electrode layer. In a cross section passing through a middle of the electronic component in the width direction and extending in the length direction and the lamination direction, a relationship of about 0.2?Tea/Tem?about 1.1 is satisfied.

Abstract: A multilayer ceramic capacitor includes a ceramic multilayer body including ceramic layers and internal electrodes that are layered, main surfaces, side surfaces, and end surfaces, a conductor layer covering each of the end surfaces of the ceramic multilayer body and electrically connected to the internal electrodes, an insulating layer covering the conductor layer, and an external electrode electrically connected to the conductor layer. The conductor layer includes a portion that extends to a portion of each of the main surfaces of the ceramic multilayer body.

Abstract: An integrated circuit device includes a capacitor structure, wherein the capacitor structure includes: a bottom electrode over a substrate; a supporter on a sidewall of the bottom electrode; a dielectric layer on the bottom electrode and the supporter; and a top electrode on the dielectric layer and covering the bottom electrode. The bottom electrode comprises: a base electrode layer over the substrate and extending in a first direction that is perpendicular to a top surface of the substrate, and a conductive capping layer including niobium nitride that is between a sidewall of the base electrode layer and the dielectric layer, and also between a top surface of the base electrode layer and the dielectric layer.

Abstract: A multilayer electronic component includes a silicon (Si) organic compound layer having a body cover portion disposed in a region, in which electrode layers are not disposed, of external surfaces of a body, and an extending portion disposed to extend from the body cover portion between an electrode layer and a conductive resin layer of an external electrode, and thus, may improve bending strength and humidity resistance reliability.

Abstract: A configurable capacitance device includes a semiconductor substrate including a plurality of integrally formed capacitors; and a separate interconnect structure coupled to the semiconductor substrate, wherein the separate interconnect structure is configurable to electrically couple two or more of the plurality of integrally formed capacitors together in a parallel configuration.

Abstract: A capacitor component includes a body including a plurality of dielectric layers and first and second internal electrodes, alternately disposed to face each other with respective dielectric layers interposed therebetween, and first and second external electrodes disposed on external surfaces of the body and connected to the first and second internal electrodes, respectively. The body includes a capacitance forming portion, in which capacitance is formed by including the first and second internal electrodes, cover portions disposed above and below the capacitance forming portion, respectively, and margin portions disposed on both side surfaces of the capacitance forming portion, respectively. At least one selected from the cover portions and the margin portions includes a plurality of graphene platelets.

Abstract: A circuit structure and a driving method thereof, a neural network are disclosed. The circuit structure includes at least one circuit unit, each circuit unit includes a first group of resistive switching devices and a second group of resistive switching devices, the first group of resistive switching devices includes a resistance gradual-change device, the second group of resistive switching devices includes a resistance abrupt-change device, the first group of resistive switching devices and the second group of resistive switching devices are connected in series, in a case that no voltage is applied, a resistance value of the first group of resistive switching devices is larger than a resistance value of the second group of resistive switching devices.

Abstract: The present document relates to multilayered dielectric composites for high-temperature applications and related methods.

Abstract: The present disclosure provides a touch device and a manufacturing method thereof. The touch device includes a substrate, a touch electrode layer, a protective layer, and a plurality of wires. The substrate includes a first region and a second region, in which the second region is adjacent to the first region. The touch electrode layer is disposed in the first region and is completely covered by the protective layer. The protective layer has a plurality of openings. The openings expose a portion of the touch electrode layer and extend from the first region to the second region. Each wire is formed in the corresponding openings and extends from the portion of the touch electrode layer to the second region, in which each opening is partially filled with one of the wires, and thereby a recess is defined in each opening.

Abstract: A multilayer ceramic capacitor includes a ceramic body including a dielectric layer and first and second internal electrodes disposed to oppose each other with the dielectric layer interposed therebetween, and first and second external electrodes disposed outside of the ceramic body and connected to the first and second internal electrodes, respectively. The ceramic body includes an active portion including of the first and second internal electrodes disposed to oppose each other with the dielectric layer interposed therebetween to form capacitance, and a cover portion disposed in upper and lower portions of the active portion. The cover portion has a larger number of pores than the dielectric layer of the active portion, and the cover portion includes a ceramic-polymer composite filled with a polymer in the pores of the cover portion.

Abstract: A multilayer electronic component includes a silicon (Si) organic compound layer having a body cover portion disposed in a region in which an electrode layer and a conductive resin layer are not disposed, of external surfaces of a body, and an extending portion disposed to extend from the body cover portion between a conductive resin layer and a plating layer of an external electrode, and thus, may improve bending strength and moisture resistance reliability.

Abstract: A multilayer electronic component includes a body, a protrusion disposed on at least one surface of the body, and an external electrode having an electrode layer disposed on a side surface of the body and extending to be in contact with a side surface of the protrusion and a conductive resin layer disposed on the electrode layer and extending to cover a portion of the protrusion.

Abstract: A method of fabricating a circuit board includes forming a conductive layer on a surface of a substrate, and patterning the conductive layer to define a plurality of plating regions and a plurality of plating lines. The plating regions have at least two different sizes, a first group of the plating regions are interconnected by a first plating line of the plating lines, and a second group of the plating regions are interconnected by a second plating line of the plating lines. A ratio of a total area of the first group of the plating regions to a total area of the second group of the plating regions is from about 1 to about 5. A solder mask is formed on the surface of the substrate to cover the plating lines and partially expose the plating regions. At least one metal layer is electroplated on the exposed plating regions.

Abstract: The present application discloses a touch panel including a base substrate, a first touch electrode layer on the base substrate, and a second touch electrode layer. The first touch electrode layer includes a plurality of first touch electrodes. Each of the plurality of first touch electrodes includes a plurality of first touch electrode patterns along a second direction, each of which extending substantially along a first direction. The second touch electrode layer includes a plurality of second touch electrodes along the second direction. Each of the plurality of second touch electrodes extends substantially along the first direction. The first touch electrode layer and the second touch electrode layer are insulated from each other.

Abstract: A capacitor unit and a manufacturing method thereof are provided. The manufacturing method includes the following steps. An isolation layer is formed on a substrate. A first capacitor stacked structure and a second capacitor stacked structure are formed on the isolation layer. Electrode connectors are formed on the first capacitor stacked structure and the second capacitor stacked structure. The electrode connectors are exposed, so that the electrode connectors, the first capacitor stacked structure, the second capacitor stacked structure, the isolation layer, and the substrate are combined to form a capacitor integrated structure, wherein the isolation layer electrically isolates the substrate from the first capacitor stacked structure and the second capacitor stacked structure. The capacitor integrated structure is cut to form a first capacitor unit and a second capacitor unit separated from each other.

Abstract: An electrolytic capacitor includes an anode body, a dielectric layer disposed on the anode body, and a solid electrolyte layer disposed on the dielectric layer. The solid electrolyte layer includes a conductive polymer, a polyanion, and an alkali component. The alkali component includes two or more kinds of alkali compound.

Abstract: A multilayer capacitor includes a body including a stack structure of a plurality of dielectric layers, and a plurality of internal electrodes stacked with the dielectric layers interposed therebetween. A stress alleviation portion is disposed on at least one surface among surfaces of the body, and an external electrode is disposed on an external portion of the body and connected to the internal electrodes. The stress alleviation portion includes a first resin layer adjacent to the body, and a second resin layer covering the first resin layer and including a filler dispersed in a resin of the second resin layer.

Abstract: A capacitor component includes: a body including a dielectric layer and first and second internal electrodes alternately disposed with the dielectric layer interposed therebetween; first and second external electrodes including first and second connection portions, and first and second band portions extending onto portions of a surface from the first and second connection portions, respectively; first and second plating layers disposed on the first and second band portions, respectively; humidity resistant layers disposed between the first and second external electrodes, disposed on the first and second external electrodes, and having openings respectively exposing portions of the first and second band portions. The first and second plating layers are disposed in the openings of the humidity resistant layers, respectively, and are in contact with the first and second band portions, respectively.

Abstract: A multilayer ceramic electronic component and a mounting board thereof include a reinforcing member that is disposed on upper and lower surfaces of a ceramic body of the multilayer ceramic electronic component and that is bonded to the first and the second external electrodes. The reinforcing member provides reduced occurrence of cracking and reduced stress applied to the component. The reinforcing member may have a coefficient of thermal expansion (CTE) that is within a range of 1 to 4 times a coefficient of thermal expansion of a dielectric layer of the ceramic body, and/or may have a modulus that is 0.5 or more times a modulus of the dielectric layer.

Abstract: A solventless system for fabricating electrodes includes a mechanism for feeding a substrate through the system, a first application region comprised of a first device for applying a first layer to the substrate, wherein the first layer is comprised of an active material mixture and a binder, and the binder includes at least one of a thermoplastic material and a thermoset material, and the system includes a first heater positioned to heat the first layer.

Abstract: An energy storage device can include a cathode, an anode, and a separator between the cathode and the anode, where the anode comprises a first lithium ion intercalating carbon component and a second lithium ion intercalating carbon component. The first lithium ion intercalating carbon component can include hard carbon, and the second lithium ion intercalating component can include graphite or soft carbon. A ratio of the hard carbon to the graphite or of the hard carbon to the soft carbon can be between 1:19 to 19:1. The anode may comprise a first lithium ion intercalating carbon component, a second lithium ion intercalating carbon component and a third lithium ion intercalating carbon component. The first lithium ion intercalating carbon component can include hard carbon, the second lithium ion intercalating carbon component can include soft carbon, and the third lithium ion intercalating carbon component can include graphite.

Abstract: An electronic component includes: a body having electrical insulating properties; an external electrode disposed on an external surface of the body; and a reinforcing layer disposed on a surface of the body and including a metal oxide layer and a graphene oxide layer.

Abstract: A method for manufacturing chip signal elements includes steps as follows. A substrate is provided. A plurality of through holes is drilled, and a plurality of side holes is formed along the through holes. A first cooper-plating process is performed to form a plurality of conductive layers electrically connected to the upper and the lower metal layer. A second cooper-plating process is performed to increase thickness of the conductive layers. A first and a second pattern layers are formed on the substrate by an etching. The first pattern layer is electrically connected to the second pattern layer to form a spiral radiator. An ink is printed on the substrate to cover the spiral radiator and form a solder mask layer. An organic metal process and a plating process are performed to form terminal electrodes. Finally, a single chip signal element having a spiral radiator is formed.

Abstract: Provided is a process for producing a sulfur cathode for a metal-sulfur battery. The process comprises: (a) Preparing a humic acid-derived foam or combined humic acid/graphene-derived foam composed of multiple pores and pore walls, wherein the pore walls contain one or a plurality of hexagonal carbon atomic planes; and (b) Impregnating the foam with sulfur or sulfide in a form of thin particles or coating, having a diameter or thickness less than 500 nm, which are lodged in the pores or deposited on the pore walls of the foam.

Abstract: A multilayer ceramic electronic component includes a first organic layer located on both principal surfaces and both side surfaces in contact with a first external electrode, and a second organic layer located on the both principal surfaces and the both side surfaces in contact with a second external electrode. The first organic layer includes an organic silicon compound and covers an end of a first base electrode layer of the first external electrode, and the second organic layer includes an organic silicon compound and covers an end of a second base electrode layer of the second external electrode. A first plating layer of the first external electrode includes an end in contact with the surface of the first organic layer, and a second plating layer of the second external electrode includes an end in contact with the surface of the second organic layer.

Abstract: A process for producing a humic acid (HA)-derived foam, comprising: (a) preparing a HA dispersion having multiple HA molecules and an optional blowing agent dispersed in a liquid medium having a blowing agent-to-HA weight ratio from 0/1.0 to 1.0/1.0; (b) dispensing and depositing the HA dispersion onto a surface of a supporting substrate to form a wet HA layer; (c) partially or completely removing liquid medium from the wet HA layer to form a dried HA layer; and (d) heat treating the dried HA layer at a first heat treatment temperature from 80° C. to 3,200° C. at a desired heating rate sufficient to induce volatile gas molecules from the non-carbon elements or to activate the blowing agent for producing the HA-derived foam.

Abstract: The invention relates to a method for performing a coating process of a workpiece (4), comprising the steps of: providing the workpiece (4) in a coating unit (2); prefilling (S2) the coating unit (2) with a coating medium using a pump (6); filling (S3) the coating unit (2) with the coating medium by a dosing unit (5), wherein a predetermined amount of coating medium is applied to the coating unit (2) by the dosing unit (5) as soon the coating medium level has reached a given reference level (R).

Abstract: A diagnostic method for a capacitive humidity sensor comprising a heater, and a capacitance-sensing element that individually identifies heater, temperature-sensing element, or capacitance-sensing element degradation. By this method, individual elements of the sensor may be replaced or compensated for to allow for further operation.

Abstract: A supercapacitor to be submerged in a medium containing a biological material and an oxidant, wherein the anode comprises a first enzyme that can catalyse the oxidation of the biological material and the cathode comprises a second enzyme that can catalyse the reduction of the oxidant, and wherein each of the anode and cathode electrodes consists of a solid agglomerate of a conductive material mixed with the first or the second enzyme, said agglomerate having a specific surface that is larger than or equal to 20 m2/g and an average pore size varying between 0.7 nm and 10 pm.

Abstract: In an aspect, a negative electrode for a lithium secondary battery and a method of manufacturing the same is provided. The negative electrode for the lithium secondary battery includes a negative active material layer.

Abstract: An inkjet ink that contains a functional particle having a BET-equivalent particle diameter of 50 to 1000 nm, a rheology-controlling particle having a BET-equivalent particle diameter of 4 to 40 nm, and an organic vehicle. The ink has a viscosity of 1 to 50 mPa·s at a shear rate of 1000 s?1. At a shear rate of 0.1 s?1, the ink has a viscosity equal to or higher than a viscosity ? calculated using the following equation: ?=(D)2×?/104/2+80 [where ? is the viscosity (mPa·s) at a shear rate of 0.1 s?1, D is the BET-equivalent particle diameter (nm) of the functional particle, and ? is the specific gravity of the functional particle].

Abstract: A semiconductor device includes a capacitor with reduced oxygen defects at an interface between a dielectric layer and an electrode of the capacitor. The semiconductor device includes a lower metal layer; a dielectric layer on the lower metal layer and containing a first metal; a sacrificial layer on the dielectric layer and containing a second metal; and an upper metal layer on the sacrificial layer. An electronegativity of the second metal in the sacrificial layer is greater than an electronegativity of the first metal in the dielectric layer.

Abstract: A touch panel can include a substrate; driving lines on the substrate along a first direction, each of the driving lines including first driving electrodes, second driving electrodes and first connecting patterns; and sensing lines on the substrate along a second direction, each of the sensing lines including first sensing electrodes, second sensing electrodes and second connecting patterns, wherein each of the first connecting patterns connects the first driving electrodes adjacent thereto, and the second driving electrodes overlap and contact the first driving electrodes, and wherein each of the second connecting patterns connects the first sensing electrodes adjacent thereto, and the second sensing electrodes overlap and contact the first sensing electrodes.

Abstract: To provide a resistance change device that can be protected from an excess current without enlarging a device size. A resistance change device 1 according to the present embodiment includes a lower electrode layer 3, an upper electrode layer 6, a first metal oxide layer 51, a second metal oxide layer 52, and a current limiting layer 4. The first metal oxide layer 51 is disposed between the lower electrode layer 3 and the upper electrode layer 6, and has a first resistivity. The second metal oxide layer 52 is disposed between the first metal oxide layer 51 and the upper electrode layer 6, and has a second resistivity higher than the first resistivity. The current limiting layer 4 is disposed between the lower electrode layer 3 and the first metal oxide layer 51, and has a third resistivity higher than the first resistivity and lower than the second resistivity.

Abstract: An anode active material including: a core having a molybdenum-based material; and a coating layer formed on at least a portion of a surface of the core, wherein the coating layer comprises at least one material selected from the group consisting of molybdenum oxynitride and molybdenum nitride, a method of preparing the same, and an anode and a lithium battery.

Abstract: Fuel cell bipolar plates are made by depositing a pinhole free corrosion resistant and/or a conductive layer on a metal plate using an atomic layer deposition method. In one embodiment, a conductive layer is deposited on an anodized metal plate using atomic layer deposition method. In another embodiment, at least one corrosion resistant metal oxide layer and at least one conductive layer are deposited on a metal plate individually using atomic layer deposition method. In yet another embodiment, a corrosion resistant and conductive metal oxynitride layer is deposited on a metal plate using an atomic layer deposition method.

Abstract: Disclosed is a method of making a pyrochlore comprising, obtaining a solution comprising a solvent and a metal precursor or salt thereof capable of forming a pyrochlore, wherein the metal precursor or salt thereof is dissolved in the solvent, subjecting the solution to a drying step to obtain a non-gelled or non-polymerized pyrochlore precursor material in powdered form, and subjecting the pyrochlore precursor material to a calcination step to obtain a pyrochlore.

Abstract: A method of making a doped metal oxide includes heating a first doped metal oxide by rapid thermal annealing, to form a second doped metal oxide. The crystal structure of the second doped metal oxide is different from the crystal structure of the first doped metal oxide. The method may provide a doped titanium oxide, where the atomic ratio of dopant nonmetal to titanium is from 2% to 20%, and at least 10% of the doped titanium oxide is in the rutile phase. The method also can provide a doped tin oxide, where the atomic ratio of dopant nonmetal to tin is from 2% to 20%, and at least 50% of 900 the doped tin oxide is in the rutile phase.

Abstract: An apparatus includes a two-terminal MLCC. The two-terminal MLCC includes a conductive layer, where the conductive layer includes at least one slot. The apparatus may also include a second conductive layer that includes at least one slot and an insulating layer that separates the two conductive layers. In one example, a first (e.g., positive) terminal of the two-terminal MLCC is formed by a first set of plates, where each plate in the first set includes at least one slot. A second (e.g., negative) terminal of the two-terminal MLCC is formed by a second set of plates, where each plate in the second set also includes at least one slot. The first set of plates and the second set of plates are interleaved, and each pair of plates is separated by an insulating layer.

Abstract: A thin sub-layer (<15 ?) of an impurity is formed under, over, or inside a thicker layer (˜30-100 ?) of a high-k (k>12) host material. The sub-layer may be formed by atomic layer deposition (ALD). The layer and sub-layer are annealed to form a composite dielectric layer. The host material crystallizes, but the crystalline lattice and grain boundaries are disrupted near the impurity sub-layer, impeding the migration of electrons. The impurity may be a material with a lower dielectric constant than the high-k material, added in such a small relative amount that the composite dielectric is still high-k. Metal-insulator-metal capacitors may be fabricated by forming the composite dielectric layer between two electrodes.

Abstract: Systems, articles, and methods for improved capacitive electromyography (“EMG”) sensors are described. The improved capacitive EMG sensors include one or more sensor electrode(s) that is/are coated with a protective barrier formed of a material that has a relative permittivity ?r of about 10 or more. The protective barrier shields the sensor electrode(s) from moisture, sweat, skin oils, etc. while advantageously contributing to a large capacitance between the sensor electrode(s) and the user's body. In this way, the improved capacitive EMG sensors provide enhanced robustness against variations in skin and/or environmental conditions. Such improved capacitive EMG sensors are particularly well-suited for use in wearable EMG devices that may be worn by a user for an extended period of time and/or under a variety of skin and/or environmental conditions. A wearable EMG device that provides a component of a human-electronics interface and incorporates such improved capacitive EMG sensors is described.