Abstract: The disclosed plasma processing apparatus is provided with a chamber, a substrate support, and a power source system. The substrate support has an electrode and configured to support a substrate in the chamber. The power source system is electrically connected to the electrode and configured to apply a bias voltage to the electrode to draw ions from a plasma in the chamber into the substrate on the substrate support. The power source system is configured to output a first pulse to the electrode in a first period and output a second pulse to the electrode in a second period after the first period, as the bias voltage. Each of the first pulse and the second pulse is a pulse of a voltage. A voltage level of the first pulse is different from a voltage level of the second pulse.

Abstract: A light emitting device includes a substrate, a first semiconductor layer provided to the substrate, a laminated structure disposed at an opposite side to the substrate of the first semiconductor layer, and including a plurality of columnar parts, a first electrically-conductive layer as a surface layer at laminated structure side in the first semiconductor layer, and a second electrically-conductive layer opposed to the first electrically-conductive layer via the laminated structure, wherein the columnar part includes a light emitting layer configured to emit light, a second semiconductor layer which is disposed between the light emitting layer and the first electrically-conductive layer, and a third semiconductor layer disposed between the light emitting layer and the second electrically-conductive layer, concavo-convex shapes are formed on a surface of the first electrically-conductive layer, an insulating layer is disposed on the first electrically-conductive layer, and electrode layers are disposed so as

Abstract: An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The heterostructure can include a p-type interlayer located between the electron blocking layer and the p-type contact layer. In an embodiment, the electron blocking layer can have a region of graded transition. The p-type interlayer can also include a region of graded transition.

Abstract: A light emitting device includes a substrate, a laminated structure provided to the substrate, and including a plurality of columnar parts, and an electrode disposed at an opposite side to the substrate of the laminated structure, wherein the columnar parts have a light emitting layer, the columnar parts are disposed between the electrode and the substrate, light generated in the light emitting layer propagates through the plurality of columnar parts to cause laser oscillation, and the electrode is provided with a hole.

Abstract: A light emitting device, a method of manufacturing the same, and a display device including the same are disclosed. The light emitting device including a first electrode and a second electrode facing each other, an emission layer disposed between the first electrode and the second electrode, the emission layer including quantum dots, and a charge auxiliary layer disposed between the emission layer and the second electrode, wherein the emission layer includes a first surface facing the charge auxiliary layer and an opposite second surface, the quantum dots include a first organic ligand on a surface of the quantum dots, in the emission layer, an amount of the first organic ligand in a portion adjacent to the first surface is larger than an amount of the first organic ligand in a portion adjacent to the second surface.

Abstract: To provide a bonding-type semiconductor light-emitting device which has excellent reliabilities with smaller time deviations of the light output power and the forward voltage. A semiconductor light-emitting device 100 according to the present disclosure includes a conductive support substrate 80; a metal layer 60 containing a reflective metal provided on the conductive support substrate 10; a semiconductor laminate 30 formed from a stack of a plurality of InGaAsP group III-V compound semiconductor layers containing at least In and P provided on the reflective metal layer 60; an n-type InGaAs contact layer 20A provided on the semiconductor laminate 30; and an n-side electrode 93 provided on the n-type InGaAs contact layer 20A, wherein the center emission wavelength of light emitted from the semiconductor laminate 30 is 1000 to 2200 nm.

Abstract: A structure, comprising an island comprising a III-N material. The island extends over a substrate and has a sloped sidewall. A cap comprising a III-N material extends laterally from a top surface and overhangs the sidewall of the island. A device, such as a transistor, light emitting diode, or resonator, may be formed within, or over, the cap.

Abstract: An optical device includes a first conductive layer, a first junction layer, a light absorption layer, a second junction layer, and a second conductive layer. The first junction layer is disposed on the first conductive layer. The light absorption layer is disposed on the first junction layer, wherein the light absorption layer includes a plurality of unit cells, each of the unit cells includes a plurality of pillar structures, and the pillar structures of each of the unit cells are different sizes. The second junction layer is disposed on the light absorption layer. The second conductive layer is disposed on the second junction layer.

Abstract: An RRAM structure and its manufacturing method are provided. The RRAM structure includes a bottom electrode layer, a resistance switching layer, and an implantation control layer sequentially formed on a substrate. The resistance switching layer includes a conductive filament confined region and an outer region surrounding the conductive filament confined region. The RRAM structure includes a protective layer and a top electrode layer. The protective layer conformally covers the bottom electrode layer, the resistance switching layer, and the implantation control layer and has a first opening. The top electrode layer is located on the implantation control layer, and a portion of the top electrode layer is filled into the first opening. The position of the top electrode layer corresponds to that of the conductive filament confined region, and the top surface of the top electrode layer is higher than that of the protective layer.

Abstract: A vapor deposition mask preparation body in which a metal mask is provided on one surface of a resin plate for obtaining a resin mask, and a protective sheet with peel strength not less than about 0.0004 N/10 mm and less than about 0.2 N/10 mm in conformity with JIS Z-0237:2009 is provided on the other surface of the resin plate is prepared, with respect to the vapor deposition mask preparation body, the resin plate is irradiated with laser light from the metal mask side to form a resin mask opening corresponding to a pattern to be produced by vapor deposition in the resin plate, and the protective sheet is peeled off from the resin mask in which the resin mask opening corresponding to the pattern to be produced by vapor deposition is formed.

Abstract: A vapor deposition mask preparation body in which a metal mask is provided on one surface of a resin plate for obtaining a resin mask, and a protective sheet with peel strength not less than about 0.0004 N/10 mm and less than about 0.2 N/10 mm in conformity with JIS Z-0237:2009 is provided on the other surface of the resin plate is prepared, with respect to the vapor deposition mask preparation body, the resin plate is irradiated with laser light from the metal mask side to form a resin mask opening corresponding to a pattern to be produced by vapor deposition in the resin plate, and the protective sheet is peeled off from the resin mask in which the resin mask opening corresponding to the pattern to be produced by vapor deposition is formed.

Abstract: A phosphor composition is derived from combining K2SiF6:Mn4+ in solid form with a saturated solution of a manganese-free complex fluoride including a composition of formula I: A3[MF6], where A is selected from Na, K, Rb, and combinations thereof and M is selected from Al, Ga, In, Sc, Y, Gd, and combinations thereof. The composition of formula I: A3[MF6] has a water solubility lower than a water solubility of K2SiF6. A lighting apparatus including the phosphor composition is also provided.

Abstract: A phosphor comprising: a chemical composition expressed by the following formula (K1-p, Mp)a(Si1-y, Mny)Fb (M is at least one element selected from the group consisting of Na and Ca, and p satisfies 0?p?0.01, a satisfies 1.5?a?2.5, b satisfies 5.5?b?6.5, and y satisfies 0<y?0.1), Wherein the phosphor satisfies I (2,500-3,000)/I (1,200-1,240)<0.04, when I (1,200-1,240) is an intensity of a highest peak in a range of 1,200-1,240 cm?1 and I (2,500-3,000) is an intensity of a highest peak in a range of 2,500-3,000 cm?1 in an infrared spectrum.

Abstract: According to one embodiment, at first, a compound semiconductor layer is bonded to a position straddling a plurality of chip formation regions arranged on a substrate. One of the chip formation regions has a first size, and the compound semiconductor layer has a second size smaller than the first size. Thereafter, the compound semiconductor layer is processed to provide compound semiconductor elements on the chip formation regions. Then, the substrate is divided to correspond to the chip formation regions.

Abstract: Resistive RAM (RRAM) devices having increased uniformity and related manufacturing methods are described. Greater uniformity of performance across an entire chip that includes larger numbers of RRAM cells can be achieved by uniformly creating enhanced channels in the switching layers through the use of radiation damage. The radiation, according to various described embodiments, can be in the form of ions, electromagnetic photons, neutral particles, electrons, and ultrasound.

Abstract: A semiconducting structure configured to emit electromagnetic radiation. The structure includes a first zone and a second zone with first and second types of conductivities respectively opposite to each other, the first and second zones being connected to each other to form a semiconducting junction. The first zone includes at least a first and a second part, the first and the second parts being separated from each other by an intermediate layer, as a spreading layer, extending approximately parallel to a junction plane along a major part of the junction. The spreading layer can cause spreading of carriers in the plane of the spreading layer.

Abstract: Resistive RAM (RRAM) devices having increased uniformity and related manufacturing methods are described. Greater uniformity of performance across an entire chip that includes larger numbers of RRAM cells can be achieved by uniformly creating enhanced channels in the switching layers through the use of radiation damage. The radiation, according to various described embodiments, can be in the form of ions, electromagnetic photons, neutral particles, electrons, and ultrasound.

Abstract: A light-emitting device, according to one embodiment, comprises: a light-emitting structure comprising a first conductive semiconductor layer, an active layer which is underneath the first conductive semiconductor layer, and a second conductive semiconductor layer which is underneath the active layer; a reflective electrode, which is arranged under the light-emitting structure; and an electrode which is arranged inside the first conductive semiconductor layer and comprises a conductive ion injection layer.

Abstract: The present invention provides an electronic apparatus, such as a lighting device comprised of light emitting diodes (LEDs) or a power generating apparatus comprising photovoltaic diodes, which may be created through a printing process, using a semiconductor or other substrate particle ink or suspension and using a lens particle ink or suspension. An exemplary apparatus comprises a base; at least one first conductor; a plurality of substantially spherical or optically resonant diodes coupled to the at least one first conductor; at least one second conductor coupled to the plurality of diodes; and a plurality of substantially spherical lenses suspended in a polymer attached or deposited over the diodes. The lenses and the suspending polymer have different indices of refraction. In some embodiments, the lenses and diodes have a ratio of mean diameters or lengths between about 10:1 and 2:1.

Abstract: A light-emitting device comprises an active-region sandwiched between an n-type layer and a p-type layer, that allows lateral carrier injection into the active-region so as to reduce heat generation in the active-region and to minimize additional forward voltage increase associated with bandgap discontinuity. In some embodiments, the active-region is a vertically displaced multiple-quantum-well (MQW) active-region. A method for fabricating the same is also provided.

Abstract: A method (100; 100a; 100b; 100c) for manufacturing a solar cell from a semiconductor substrate (1) of a first conductivity type, the semiconductor substrate having a front surface (2) and a back surface (3). The method includes in a sequence: texturing (102) the front surface to create a textured front surface (2a); creating (103) by diffusion of a dopant of the first conductivity type a first conductivity-type doped layer (2c) in the textured front surface and a back surface field layer (4) of the first conductivity type in the back surface; removing (105; 104a) the first conductivity-type doped layer from the textured front surface by an etching process adapted for retaining texture of the textured front surface; creating (106) a layer of a second conductivity type (6) on the textured front surface by diffusion of a dopant of the second conductivity type into the textured front surface.

Abstract: Provided is a novel method for producing an m-plane nitride-based LED, the method making it possible to obtain an m-plane nitride-based LED reduced in forward voltage. The method comprising (i) a step of forming an active layer consisting of a nitride semiconductor over an n-type nitride semiconductor layer in which an angle between the thickness direction and the m-axis of a hexagonal crystal is 10 degrees or less, (ii) a step of forming an AlGaN layer doped with a p-type impurity over the active layer, (iii) a step of forming a contact layer consisting of InGaN is formed on the surface of the AlGaN layer, and (iv) a step of forming an electrode on the surface of the contact layer.

Abstract: A semiconductor device has a multilayer doping to provide improved passivation by quantum exclusion. The multilayer doping includes at least two doped layers fabricated using MBE methods. The dopant sheet densities in the doped layers need not be the same, but in principle can be selected to be the same sheet densities or to be different sheet densities. The electrically active dopant sheet densities are quite high, reaching more than 1×1014 cm?2, and locally exceeding 1022 per cubic centimeter. It has been found that silicon detector devices that have two or more such dopant layers exhibit improved resistance to degradation by UV radiation, at least at wavelengths of 193 nm, as compared to conventional silicon p-on-n devices.

Abstract: According to one embodiment, a semiconductor light emitting device includes a first layer of n-type and a second layer of p-type including a nitride semiconductor, a light emitting unit provided between the first and second layers, a first stacked structure provided between the first layer and the light emitting unit, and a second stacked structure provided between the first layer and the first stacked structure. The light emitting unit includes barrier layers and a well layer provided between the barrier layers. The first stacked structure includes third layers including a nitride semiconductor, and fourth layers stacked with the third layers and including GaInN. The fourth layers have a thinner thickness than the well layer. The second stacked structure includes fifth layers including a nitride semiconductor, and sixth layers stacked with the fifth layers and including GaInN. The sixth layers have a thinner thickness than the well layer.

Abstract: A strain release layer adjoining the active layer in a blue LED is bounded on the bottom by a first relatively-highly silicon-doped region and is also bounded on the top by a second relatively-highly silicon-doped region. The second relatively-highly silicon-doped region is a sublayer of the active layer of the LED. The first relatively-highly silicon-doped region is a sublayer of the N-type layer of the LED. The first relatively-highly silicon-doped region is also separated from the remainder of the N-type layer by an intervening sublayer that is only lightly doped with silicon. The silicon doping profile promotes current spreading and high output power (lumens/watt). The LED has a low reverse leakage current and a high ESD breakdown voltage. The strain release layer has a concentration of indium that is between 5×1019 atoms/cm3 and 5×1020 atoms/cm3, and the first and second relatively-highly silicon-doped regions have silicon concentrations that exceed 1×1018 atoms/cm3.

Abstract: A light-emitting element includes a n-type silicon oxide film and a p-type silicon nitride film. The n-type silicon oxide film and the p-type silicon nitride film formed on the n-type silicon oxide film form a p-n junction. The n-type silicon oxide film includes a plurality of quantum dots composed of n-type Si while the p-type silicon nitride film includes a plurality of quantum dots composed of p-type Si. Light emission occurs from the boundary between the n-type silicon oxide film and the p-type silicon nitride film by injecting electrons from the n-type silicon oxide film side and holes from the p-type silicon nitride film side.

Abstract: A nitride semiconductor device according to the present invention includes a p-type nitride semiconductor layer, an n-type nitride semiconductor layer, and an active layer interposed between the p-type nitride semiconductor layer and the n-type nitride semiconductor layer. The p-type nitride semiconductor layer includes: a first p-type nitride semiconductor layer containing Al and Mg; and a second p-type nitride semiconductor layer containing Mg. The first p-type nitride semiconductor layer is located between the active layer and the second p-type nitride semiconductor layer, and the second p-type nitride semiconductor layer has a greater band gap than a band gap of the first p-type nitride semiconductor layer.

Abstract: According to example embodiments, a semiconductor light emitting device includes a first semiconductor layer, a pit enlarging layer on the first semiconductor layer, an active layer on the pit enlarging layer, a hole injection layer, and a second semiconductor layer on the hole injection layer. The first semiconductor layer is doped a first conductive type. An upper surface of the pit enlarging layer and side surfaces of the active layer define pits having sloped surfaces on the dislocations. The pits are reverse pyramidal spaces. The hole injection layer is on a top surface of the active layer and the sloped surfaces of the pits. The second semiconductor layer doped a second conductive type that is different than the first conductive type.

Abstract: A first pixel includes a first charge accumulation portion of a first conductivity type in a first region. A second pixel includes a second charge accumulation portion of the first conductivity type in a second region and a semiconductor region of a second conductivity type in a third region. Impurities of the second conductivity type are doped in the third region and the impurities of the second conductivity type are doped in at least the second region to generate a first difference between quantities of doping the impurities of the second conductivity type in the first and second regions. Impurities are doped in the first and second regions to reduce a second difference, caused by the first difference, between net quantities of doping impurities of the first conductivity type in the first and second regions.

Abstract: The present disclosure involves a light-emitting device. The light-emitting device includes an n-doped gallium nitride (n-GaN) layer located over a substrate. A multiple quantum well (MQW) layer is located over the n-GaN layer. An electron-blocking layer is located over the MQW layer. A p-doped gallium nitride (p-GaN) layer is located over the electron-blocking layer. The light-emitting device includes a hole injection layer. In some embodiments, the hole injection layer includes a p-doped indium gallium nitride (p-InGaN) layer that is located in one of the three following locations: between the MQW layer and the electron-blocking layer; between the electron-blocking layer and the p-GaN layer; and inside the p-GaN layer.

Abstract: In a semiconductor light emitting element outputting light indicating green color by using a group III nitride semiconductor, light emission output is improved. A semiconductor light emitting element includes: an n-type cladding layer containing n-type impurities (Si); a light emitting layer laminated on the n-type cladding layer; and a p-type cladding layer containing p-type impurities and laminated on the light emitting layer. The light emitting layer has a barrier layer including first to fifth barrier layers and a well layer including first to fourth well layers, and has a multiple quantum well structure to sandwich one well layer by two barrier layers. The light emitting layer is configured such that the first to fourth well layers are set to have a composition to emit green light, and the first barrier layer is doped with n-type impurities, whereas the other barrier layers are not doped with n-type impurities.

Abstract: In an example, the present invention provides a gallium and nitrogen containing laser diode device. The device has a gallium and nitrogen containing substrate material comprising a surface region, which is configured on either a non-polar ({10-10}) crystal orientation or a semi-polar ({10-10} crystal orientation configured with an offcut at an angle toward or away from the [0001] direction). The device also has a GaN region formed overlying the surface region, an active region formed overlying the surface region, and a gettering region comprising a magnesium species overlying the surface region. The device has a p-type cladding region comprising an (InAl)GaN material doped with a plurality of magnesium species formed overlying the active region.

Abstract: Disclosed are a light emitting diode having an n-doped ohm contact buffer layer and a manufacturing method therefor. In the present invention, a highly n-doped ohm contact buffer layer with an electronic concentration up to 1×1018 cm3 is formed on the n side of a light emitting epitaxy layer; when a growth substrate is removed, the n-type ohm contact buffer layer on the surface is exposed, which is a no-nitride polarity-face n-type GaN base material with a lower energy gap; an n-type ohm contact electrode is prepared on the n-type ohm contact buffer layer and follows the Ti/Al ohm contact electrode, which can overcome the problem of the existing vertical gallium nitride-based vertical light emitting diode that the voltage of the thin film GaN base light emitting device is unreliable because the ohm contact electrode on the nitride-face GaN base semiconductor layer is easy to crack due to temperature.

Abstract: The present invention provides a method for producing a Group III nitride semiconductor light-emitting device wherein a p-cladding layer has a uniform Mg concentration. A p-cladding layer having a superlattice structure in which AlGaN and InGaN are alternately and repeatedly deposited is formed in two stages of the former process and the latter process where the supply amount of the Mg dopant gas is different. The supply amount of the Mg dopant gas in the latter process is half or less than that in the former process. The thickness of a first p-cladding layer formed in the former process is 60% or less than that of the p-cladding layer, and 160 ? or less.

Abstract: A method of manufacturing a p type nitride semiconductor layer doped with carbon in a highly reproducible manner with an increased productivity is provided. The method includes supplying an III-group material gas for a predetermined time period T1, supplying a V-group material gas containing a carbon source for a predetermined time period T2 when a predetermined time period t1 (t1+T2>T1) elapses after the supply of the III-group material gas begins, repeating the step of supplying the III-group material gas and the step of supplying the V-group material gas when a predetermined time period t2 (t1+T2?t2>T1) elapses after the supply of the V-group material gas begins, and thus forming an AlxGa1-xN semiconductor layer (0<x?1) at a growth temperature of 1190° C.˜1370° C. or a growth temperature at which a substrate temperature is 1070° C.˜1250° C. using a chemical vapor deposition method or a vacuum evaporation method. Nitrogen sites within the semiconductor layer are doped with carbon.

Abstract: A light emitting diode (LED) comprises an n-type Group III-V semiconductor layer, an active layer adjacent to the n-type Group III-V semiconductor layer, and a p-type Group III-V semiconductor layer adjacent to the active layer. The active layer includes one or more V-pits. A portion of the p-type Group III-V semiconductor layer is in the V-pits. A p-type dopant injection layer provided during the formation of the p-type Group III-V layer aids in providing a predetermined concentration, distribution and/or uniformity of the p-type dopant in the V-pits.

Abstract: A donor substrate for a laser transfer includes a base layer, a primer layer disposed on the base layer, a light-to-heat conversion layer disposed on the primer layer, and an intermediate layer disposed on the light-to-heat conversion layer, where the light-to-heat conversion layer includes graphene.

Abstract: A method of applying a conversion means to an optoelectronic semiconductor chip includes preparing the optoelectronic semiconductor chip having a main radiation face, preparing the conversion means, the conversion means being applied to a main carrier face of a carrier, arranging the conversion means such that it faces the main radiation face and has a spacing relative to the main radiation face, and releasing the conversion means from the carrier and applying the conversion means to the main radiation face by irradiation and heating of an absorber constituent of the conversion means and/or of a release layer located between the conversion means and the carrier with a pulsed laser radiation which passes through the carrier.

Abstract: Provided is a compound semiconductor deposition method of adjusting the luminous wavelength of a compound semiconductor of a ternary or higher system in a nanometer order in depositing the compound semiconductor on a substrate.

Abstract: A method for manufacturing interdigitated back contact photovoltaic cells is disclosed. In one aspect, the method includes providing on a rear surface of a substrate a first doped layer of a first dopant type, and providing a dielectric masking layer overlaying it. Grooves are formed through the dielectric masking layer and first doped layer, extending into the substrate in a direction substantially orthogonal to the rear surface and extending in a lateral direction underneath the first doped layer at sides of the grooves. Directional doping is performed in a direction substantially orthogonal to the rear surface, thereby providing doped regions with dopants of a second dopant type at a bottom of the grooves. Dopant diffusion is performed to form at the rear side of the substrate one of the emitter regions and back surface field regions between the grooves and the other at the bottom of the grooves.

Abstract: A method for impurity-induced disordering in III-nitride materials comprises growing a III-nitride heterostructure at a growth temperature and doping the heterostructure layers with a dopant during or after the growth of the heterostructure and post-growth annealing of the heterostructure. The post-growth annealing temperature can be sufficiently high to induce disorder of the heterostructure layer interfaces.

Abstract: To provide a method of manufacturing an infrared light-emitting element having a wavelength of 1.57 ?m, including: forming a SiO2 film on a Si substrate containing C; and performing RTA treatment in an atmosphere containing oxygen, or implanting impurity ions therein and thereafter performing RTA treatment in an atmosphere containing oxygen, thereby forming C centers.

Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type layer, a p-type layer, and a light emitting unit provided between the n-type layer and the p-type layer and including barrier layers and well layers. At least one of the barrier layers includes first and second portion layers. The first portion layer is disposed on a side of the n-type layer. The second portion layer is disposed on a side of the p-type layer, and contains n-type impurity with a concentration higher than that in the first portion layer. At least one of the well layers includes third and fourth portion layers. The third portion layer is disposed on a side of the n-type layer. The fourth portion layer is disposed on a side of the p-type layer, and contains n-type impurity with a concentration higher than that in the third portion layer.

Abstract: An organic electroluminescence device (100, 200) comprises a substrate (110), an anode (130), a light emitting layer (160) and a cathode (190) stacked sequentially. The anode (130) comprises a light transmittance increased layer (131), a conductive layer (132) and a hole injection auxiliary layer (133) stacked on the substrate (110) sequentially. The materials of the light transmittance increased layer (131) are inorganic compounds of zinc with a light transmittance of 400 nm to 800 nm in the visible region and a refractive index greater than 2.3. The material of the conductive layer (132) is graphene. The utilization of light transmittance increased principle for multilayer anode structure can make the light transmittance of the anode in the visible region high and surface resistance low.

Abstract: Provided is a method of producing a wafer for a solar cell that can produce the solar cell with high conversion efficiency. A method of producing a wafer for a solar cell according to the present invention comprises a first step of contacting lower alcohol to at least one surface of the semiconductor wafer and a second step, after the first step, of contacting hydrofluoric acid containing metal ion to the at least one surface of the semiconductor wafer, and a third step that is, after the second step, a step of contacting alkali solution to the at least one surface of the semiconductor wafer, a step of contacting acid solution containing hydrofluoric acid and nitric acid to the at least one surface of the semiconductor wafer, or a step of carrying out an oxidation treatment to the at least one surface of the semiconductor wafer.

Abstract: Methods for processing an amorphous silicon thin film sample into a polycrystalline silicon thin film are disclosed. In one preferred arrangement, a method includes the steps of generating a sequence of excimer laser pulses, controllably modulating each excimer laser pulse in the sequence to a predetermined fluence, masking portions of each fluence controlled laser pulse in the sequence with a two dimensional pattern of slits to generate a sequence of fluence controlled pulses of line patterned beamlets, irradiating an amorphous silicon thin film sample with the sequence of fluence controlled slit patterned beamlets to effect melting of portions thereof, and controllably sequentially translating a relative position of the sample with respect to each of the fluence controlled pulse of slit patterned beamlets to thereby process the amorphous silicon thin film sample into a single or polycrystalline silicon thin film.

Abstract: A process is provided for producing a doped organic semiconductive layer, comprising the process steps of A) providing a matrix material, B) providing a dopant complex, and C) simultaneously applying the matrix material and the dopant complex to a substrate by vapor deposition, wherein, in process step C), the dopant complex is decomposed and the pure dopant is intercalated into the matrix material.

Abstract: In a method of forming a photonic device, a first silicon electrode is formed, and then a germanium active layer is formed on the first silicon electrode while including n-type dopant atoms in the germanium layer, during formation of the layer, to produce a background electrical dopant concentration that is greater than an intrinsic dopant concentration of germanium. A second silicon electrode is then formed on a surface of the germanium active layer. The formed germanium active layer is doped with additional dopant for supporting an electrically-pumped guided mode as a laser gain medium with an electrically-activated n-type electrical dopant concentration that is greater than the background dopant concentration to overcome electrical losses of the photonic device.

Abstract: A light-emitting device and a method of fabricating the same, in which the light emission characteristics of the light-emitting device in the UV range are maximized such that a high-efficiency light-emitting device can be produced at low cost. For this, the method includes the step of forming a zinc oxide light-emitting layer on a base substrate, the zinc oxide light-emitting layer including zinc oxide doped with a dopant; and activating the dopant by rapidly heat-treating the zinc oxide light-emitting layer, so that light emission in an ultraviolet range is increased.

Abstract: A light emitting device with graded composition hole tunneling layer is provided. The device comprises a substrate and an n-type semiconductor layer is disposed on the substrate, in which the n-type semiconductor layer comprises a first portion and a second portion. A graded composition hole tunneling layer is disposed on the first portion of the n-type semiconductor layer. An electron blocking layer is disposed on the graded composition hole tunneling layer. A p-type semiconductor layer is disposed on the electron blocking layer. A first electrode is disposed on the p-type semiconductor layer, and a second electrode is disposed on the second portion of the n-type semiconductor layer and is electrical insulated from the first portion of the n-type semiconductor. The graded composition hole tunneling layer is used as the quantum-well to improve the transport efficiency of the holes to increase the light emitting efficiency of the light emitting device.