Abstract: A semiconductor device, which comprises: a silicon substrate having a front surface and a back surface; a metal layer located on said front surface; a through silicon via (TSV) extending through said silicon substrate from said back surface to said front surface, wherein said TSV is connected at one end to said metal layer; and a redistribution layer (RDL), wherein said RDL is embedded in said silicon substrate.

Abstract: A display including a bending region is provided. The display includes a pixel layer including a plurality of pixel and a substrate disposed under the pixel layer and including a first area on which the pixel layer is disposed and a second area extending out of the pixel layer from the first area, at least a partial area of the second area being bendable, wherein the substrate includes: a wiring layer including at least one first wiring electrically connected with at least one pixel of the plurality of pixels and connected from the first area to the second area, and at least one second wiring disposed in the at least partial area and electrically connected with the at least one first wiring in the second area. Further, other embodiments may be possible.

Abstract: Provided is a semiconductor device, a manufacturing method, and an electronic device designed to suppress the occurrence of Cu pumping. The semiconductor device includes a Cu electrode pad serving as a bonding surface for bonding a plurality of semiconductor members together and an electrode via, the electrode via being a connection member that connects the Cu electrode pad to a lower-layer metal. The Cu electrode pad is formed in a location displaced from the electrode via.

Abstract: A semiconductor device includes a semiconductor substrate. The semiconductor substrate has a first main surface and a second main surface opposite to the first main surface, and includes a first conductive layer formed on the second main surface. A through hole penetrates through the semiconductor substrate from the first main surface to the second main surface, so that the first conductive layer formed on the second main surface is exposed at a bottom portion of the through hole. A seed layer is formed on a side surface of the through hole from the bottom portion of the through hole to the first main surface; a second conductive layer is formed on the seed layer; and a third conductive layer is selectively formed on the second conductive layer.

Abstract: In one embodiment, a semiconductor device includes a glass substrate, a semiconductor substrate disposed on the glass substrate, and a magnetic sensor disposed within and/or over the semiconductor substrate.

Abstract: A method of manufacturing a flip-chip nitride semiconductor light emitting element includes steps of providing a nitride semiconductor light emitting element structure; forming an insulating protective layer on the nitride semiconductor light emitting element structure; forming a resist pattern having openings above an n-side electrode connecting surface and a p-side electrode connecting surface; etching the protective layer to expose the n-side electrode connecting surface and the p-side electrode connecting surface using the resist pattern as a mask; forming a first metal layer that becomes an n-side electrode and a p-side electrode, the first metal layer being formed as a continuous layer disposed on the n-side electrode connecting surface, the p-side electrode connecting surface and the resist pattern; forming a second metal layer that becomes metal bumps by electrolytic plating using the first metal layer as an electrode for the electrolytic plating; and removing the resist pattern.

Abstract: Embodiments of the present description relate to the field of fabricating microelectronic structures. The microelectronic structures may include a glass routing structure formed separately from a trace routing structure, wherein the glass routing structure is incorporated with the trace routing substrate, either in a laminated or embedded configuration. Also disclosed are embodiments of a microelectronic package including at least one microelectronic device disposed proximate to the glass routing structure of the microelectronic substrate and coupled with the microelectronic substrate by a plurality of interconnects. Further, disclosed are embodiments of a microelectronic structure including at least one microelectronic device embedded within a microelectronic encapsulant having a glass routing structure attached to the microelectronic encapsulant and a trace routing structure formed on the glass routing structure.

Abstract: A semiconductor device includes a lead frame having a down bond area, a die attach area and a dam formed between the down bond area and the die attach area. A bottom of the dam is attached on a surface of the lead frame. The dam prevents contamination of the down bond area from die attach material, which may occur during a die attach process.

Abstract: A fabrication method for producing semiconductor chips with enhanced die strength comprises following steps: forming a semiconductor wafer with enhanced die strength by comprising the substrate, the active layer on the front side of the substrate and the backside metal layer on the backside of the substrate, wherein at least one integrated circuit forms in the active layer; forming a protection layer on a front side of the semiconductor wafer; dicing the semiconductor wafer by at least one laser dicing process and removing the laser dicing residues and removing said protection layer by at least one etching process, whereby plural semiconductor chips with enhanced die strength are produced, and wherein the backside metal layer of said semiconductor chip fully covers the backside of said semiconductor chip after dicing.

Abstract: A die having a ledge along a sidewall, and a method of forming the die, is provided. A method of packaging the die is also provided. A substrate, such as a processed wafer, is diced by forming a first notch having a first width, and then forming a second notch within the first notch such that the second notch has a second width less than the first width. The second notch extends through the substrate, thereby dicing the substrate. The difference in widths between the first width and the second width results in a ledge along the sidewalls of the dice. The dice may be placed on a substrate, e.g., an interposer, and underfill placed between the dice and the substrate. The ledge prevents or reduces the distance the underfill is drawn up between adjacent dice. A molding compound may be formed over the substrate.

Abstract: The various aspects comprise methods and devices for processing a wafer. An aspect of this disclosure includes a wafer. The wafer comprises a plurality of die regions; a plurality of kerf regions between the plurality of die regions; and a metallization area on the plurality of die regions.

Abstract: An RF-power device includes a semiconductor substrate having a plurality of active regions arranged in an array. Each active region includes one or more RF-power transistors. The active regions are interspersed with inactive regions for reducing mutual heating of the RF-power transistors in separate active regions. The devices also includes at least one impedance matching component located in one of the inactive regions of the substrate.

Abstract: According to an embodiment, a semiconductor device includes a silicon substrate, an insulation film, and a plurality of chip-side connection terminals. The silicon substrate is internally provided with a first wire layer. The insulation film is stacked on a first surface of surfaces of the silicon substrate, the first surface being approximately parallel to the first wire layer. The chip-side connection terminals are electrically connected to the wire layer. Moreover, the chip-side connection terminals are exposed on a second surface side, the second surface being continuous from the first surface in an approximately perpendicular manner.

Abstract: A manufacturing method of a lead frame substrate includes: applying a photosensitive resist or a dry film to first and second surfaces of a metal plate; pattern-exposing the photosensitive resist or the dry film, and then developing the first surface and the second surface to form on the first surface a first resist pattern for forming a connection post and to form on the second surface a second resist pattern for forming a wiring pattern; etching the first surface partway down the metal plate to form the connection post; filling the first surface with a pre-molding resin to a thickness with which the etched surface is buried; removing the pre-molding resin uniformly in a thickness direction of the pre-molding resin until a bottom surface of the connection post is exposed; and etching the second surface to form a wiring pattern.

Abstract: A method of cutting an object which can accurately cut the object is provided. An object to be processed 1 such as a silicon wafer is irradiated with laser light L while a light-converging point P is positioned therewithin, so as to form a modified region 7 due to multiphoton absorption within the object 1, and cause the modified region 7 to form a starting point region for cutting 8 shifted from the center line CL of the thickness of the object 1 toward the front face 3 of the object 1 along a line along which the object should be cut. Subsequently, the object 1 is pressed from the rear face 21 side thereof. This can generate a fracture from the starting point region for cutting 8 acting as a start point, thereby accurately cutting the object 1 along the line along which the object should be cut.

Abstract: An object to be processed is reliably cut along a line to cut. An object to be processed is irradiated with laser light while locating a converging point at the object, so as to form a modified region in the object along a line to cut. The object formed with the modified region is subjected to an etching process utilizing an etching liquid exhibiting a higher etching rate for the modified region than for an unmodified region, so as to etch the modified region. This can etch the object selectively and rapidly along the line to cut by utilizing a higher etching rate in the modified region.

Abstract: Embodiments of the present disclosure provide an apparatus including a semiconductor die having a plurality of integrated circuit devices, a pad structure electrically coupled to at least one integrated circuit device of the plurality of integrated circuit devices via an interconnect layer, an electrically insulative layer disposed on the interconnect layer, a first shielding structure disposed in the electrically insulative layer and electrically coupled to the pad structure, an under-ball metallization (UBM) structure electrically coupled to the first shielding structure, and a solder bump electrically coupled to the UBM structure, the solder bump comprising a solder bump material capable of emitting alpha particles, wherein the first shielding structure is positioned between the solder bump and the plurality of integrated circuit devices to shield the plurality of integrated circuit devices from the alpha particles. Other embodiments may be described and/or claimed.

Abstract: This invention discloses a process for packaging semiconductor device with external leads. The process includes comprises Step 1: providing a lead frame comprising a plurality of lead frame units connected by a plurality of metal beams, each lead frame unit comprising a die pad and a plurality of leads located on opposite sides of the die pad; adhering a semiconductor chip onto each of the die pad, and providing a plurality of metal connections for electrically connecting each chip to its corresponding leads; Step 2 providing a plastic molding material to enclose the plurality of the lead frame units, the metal beams, the chips, and at least portions of the metal connections; Step 3 removing a portion of the plastic molding material above the metal beams to expose the metal beams and portions of the leads in connection with the metal beams; and Step 4 separating each lead frame unit, forming a plurality of individual semiconductor plastic package components with external leads.

Abstract: A method of cutting an object which can accurately cut the object is provided. An object to be processed 1 such as a silicon wafer is irradiated with laser light L while a light-converging point P is positioned therewithin, so as to form a modified region 7 due to multiphoton absorption within the object 1, and cause the modified region 7 to form a starting point region for cutting 8 shifted from the center line CL of the thickness of the object 1 toward the front face 3 of the object 1 along a line along which the object should be cut. Subsequently, the object 1 is pressed from the rear face 21 side thereof. This can generate a fracture from the starting point region for cutting 8 acting as a start point, thereby accurately cutting the object 1 along the line along which the object should be cut.

Abstract: Watercraft automation and aquatic data utilization for aquatic efforts are utilized for fishing and network communication. In one aspect, an anchor point is obtained and a water craft position maintenance routine is actuated to control the watercraft to maintain association with the anchor point. In another aspect, prior aquatic effort data is obtained in association with an anchor point. In yet another, aspect, current aquatic effort data is generated in association with an anchor point. In still another aspect, current aquatic effort data and prior aquatic effort data are utilized for prediction generation. In yet another aspect, current aquatic effort data and prior aquatic effort data are utilized to obtain another anchor point for a watercraft.

Abstract: A substrate dividing method which can thin and divide a substrate while preventing chipping and cracking from occurring. This substrate dividing method comprises the steps of irradiating a semiconductor substrate 1 having a front face 3 formed with functional devices 19 with laser light while positioning a light-converging point within the substrate, so as to form a modified region including a molten processed region due to multiphoton absorption within the semiconductor substrate 1, and causing the modified region including the molten processed region to form a starting point region for cutting; and grinding a rear face 21 of the semiconductor substrate 1 after the step of forming the starting point region for cutting such that the semiconductor substrate 1 attains a predetermined thickness.

Abstract: A substrate dividing method which can thin and divide a substrate while preventing chipping and cracking from occurring. This substrate dividing method comprises the steps of irradiating a semiconductor substrate 1 having a front face 3 formed with functional devices 19 with laser light while positioning a light-converging point within the substrate, so as to form a modified region including a molten processed region due to multiphoton absorption within the semiconductor substrate 1, and causing the modified region including the molten processed region to form a starting point region for cutting; and grinding a rear face 21 of the semiconductor substrate 1 after the step of forming the starting point region for cutting such that the semiconductor substrate 1 attains a predetermined thickness.

Abstract: A thin overlay structure for use in imaging based metrology is disclosed. The thin overlay structure may include a first structure and second structure, the first and second structures designed to have a common center of symmetry, both structures being invariant to a 180 degree rotation about the common center of symmetry, wherein a mark region defining the extent of the structures is characterized by a first direction and a second direction orthogonal to the first direction, a length of the mark region along the first direction being greater than a length of the mark region along the second direction.

Abstract: A method for manufacturing solar strips. The method includes providing a photovoltaic material including a back side region, a front side surface, and a plurality of photovoltaic strip regions separated by a plurality of scribe regions. A first portion of the photovoltaic material is supported while a second portion of the photovoltaic material including at least one of the photovoltaic strips is left unsupported. The method includes applying a predetermined force along a portion of the photovoltaic strip that remains unsupported to cause the photovoltaic strip to be separated from the supported photovoltaic material.

Abstract: Watercraft automation and aquatic data utilization for aquatic efforts are utilized for fishing and network communication. In one aspect, an anchor point is obtained and a water craft position maintenance routine is actuated to control the watercraft to maintain association with the anchor point. In another aspect, prior aquatic effort data is obtained in association with an anchor point. In yet another, aspect, current aquatic effort data is generated in association with an anchor point. In still another aspect, current aquatic effort data and prior aquatic effort data are utilized for prediction generation. In yet another aspect, current aquatic effort data and prior aquatic effort data are utilized to obtain another anchor point for a watercraft.

Abstract: Watercraft automation and aquatic data utilization for aquatic efforts are utilized for fishing and network communication. In one aspect, an anchor point is obtained and a water craft position maintenance routine is actuated to control the watercraft to maintain association with the anchor point. In another aspect, prior aquatic effort data is obtained in association with an anchor point. In yet another, aspect, current aquatic effort data is generated in association with an anchor point. In still another aspect, current aquatic effort data and prior aquatic effort data are utilized for prediction generation. In yet another aspect, current aquatic effort data and prior aquatic effort data are utilized to obtain another anchor point for a watercraft.

Abstract: Watercraft automation and aquatic data utilization for aquatic efforts are utilized for fishing and network communication. In one aspect, an anchor point is obtained and a water craft position maintenance routine is actuated to control the watercraft to maintain association with the anchor point. In another aspect, prior aquatic effort data is obtained in association with an anchor point. In yet another, aspect, current aquatic effort data is generated in association with an anchor point. In still another aspect, current aquatic effort data and prior aquatic effort data are utilized for prediction generation. In yet another aspect, current aquatic effort data and prior aquatic effort data are utilized to obtain another anchor point for a watercraft.

Abstract: A semiconductor device is made by disposing a plurality of semiconductor die on a carrier and creating a gap between each of the semiconductor die. A first insulating material is deposited in the gap. A portion of the first insulating material is removed. A conductive layer is formed over the semiconductor die. A conductive lining is conformally formed on the remaining portion of the first insulating material to form conductive via within the gap. The conductive vias can be tapered or vertical. The conductive via is electrically connected to a contact pad on the semiconductor die. A second insulating material is deposited in the gap over the conductive lining. A portion of the conductive via may extend outside the first and second insulating materials. The semiconductor die are singulated through the gap. The semiconductor die can be stacked and interconnected through the conductive vias.

Abstract: A semiconductor device is made by disposing a plurality of semiconductor die on a carrier and creating a gap between each of the semiconductor die. A first insulating material is deposited in the gap. A portion of the first insulating material is removed. A conductive layer is formed over the semiconductor die. A conductive lining is conformally formed on the remaining portion of the first insulating material to form conductive via within the gap. The conductive vias can be tapered or vertical. The conductive via is electrically connected to a contact pad on the semiconductor die. A second insulating material is deposited in the gap over the conductive lining. A portion of the conductive via may extend outside the first and second insulating materials. The semiconductor die are singulated through the gap. The semiconductor die can be stacked and interconnected through the conductive vias.

Abstract: The present disclosure provides a method of fabricating a semiconductor device, the method including providing a substrate having a seal ring region and a circuit region, forming a first seal ring structure over the seal ring region, forming a second seal ring structure over the seal ring region and adjacent to the first seal ring structure, and forming a first passivation layer disposed over the first and second seal ring structures. A semiconductor device fabricated by such a method is also provided.

Abstract: Multiphoton absorption is generated, so as to form a part which is intended to be cut 9 due to a molten processed region 13 within a silicon wafer 11, and then an adhesive sheet 20 bonded to the silicon wafer 11 is expanded. This cuts the silicon wafer 11 along the part which is intended to be cut 9 with a high precision into semiconductor chips 25. Here, opposing cut sections 25a, 25a of neighboring semiconductor chips 25, 25 are separated from each other from their close contact state, whereby a die-bonding resin layer 23 is also cut along the part which is intended to be cut 9. Therefore, the silicon wafer 11 and die-bonding resin layer 23 can be cut much more efficiently than in the case where the silicon wafer 11 and die-bonding resin layer 23 are cut with a blade without cutting a base 21.

Abstract: Foreign matter formed over (or adhered to) a surface of a lead is reliably removed. A laser beam is applied to a residual resin (sealing body) which is formed in (or adhered to) a region surrounded by a sealing body (a first sealing body), a lead exposed (projected) from the sealing body, and a dam bar. The foreign matter formed over (or adhered to) the surface of the lead can be reliably removed by washing the surface of the lead after the removal of the residual resin. Thus, in a subsequent plating step, the reliability (wettability, adhesion with the lead) of a plating film to be formed over the surface of the lead can be improved.

Abstract: The present invention provides a chip part manufacturing method comprising a separating process capable of suppressing deformation of chip parts, and also provides chip parts. It comprises a step of forming a plurality of frame-like void portions (32) in one main surface of substrate (30) and insulating resin layer (20) having a spiral void portion (40) disposed in the region thereof, a step of forming metal layer (36) in frame-like void portion (32) and spiral void portion (40) and on insulating resin layer (20), a step of polishing metal layer (36) at least up to the upper surface of insulating resin layer and forming coil section (18) in spiral void portion (40), and a step of forming a metal layer for connecting chip parts to frame-like void portion (32), wherein the metal layer is melted and removed by using an etching agent to separate a plurality of chip parts connected to each other by a frame-like connection.

Abstract: A method for making a semiconductor on insulator (SeOI) type substrate that includes an integrated ground plane under the insulating layer wherein the substrate is intended to be used in making electronic components. This method includes implanting atoms or ions of a metal in at least one portion of a semiconducting receiver substrate, carrying out a heat treatment of the receiver substrate in order to obtain an integrated ground plane on or in at least one portion of that receiver substrate, transferring an active layer stemming from a semiconducting donor substrate onto the receiver substrate, with an insulating layer being inserted in between the donor and receiver substrates to obtain the substrate with an integrated ground plane.

Abstract: By performing plasma etching on the second surface of a semiconductor wafer on the first surface of which an insulating film is placed in dividing regions and on the second surface of which a mask for defining the dividing regions are placed, the second surface being located opposite from the first surface, the insulating film is exposed from an etching bottom portion by removing portions that correspond to the dividing regions. Subsequently, by continuously performing the plasma etching in the state in which the exposed insulating film is surface charged with electric charge due to ions in the plasma, corner portions put in contact with the insulating film are removed in the device-formation-regions. Consequently, individualized semiconductor chips having a high transverse rupture strength are manufactured.

Abstract: A laser processing method which can highly accurately cut objects to be processed having various laminate structures is provided. An object to be processed comprising a substrate and a laminate part disposed on the front face of the substrate is irradiated with laser light L while a light-converging point P is positioned at least within the substrate, so as to form a modified region due to multiphoton absorption at least within the substrate, and cause the modified region to form a starting point region for cutting. When the object is cut along the starting point region for cutting, the object 1 can be cut with a high accuracy.

Abstract: The present disclosure provides a method of fabricating a semiconductor device, the method including providing a substrate having a seal ring region and a circuit region, forming a first seal ring structure over the seal ring region, forming a second seal ring structure over the seal ring region and adjacent to the first seal ring structure, and forming a first passivation layer disposed over the first and second seal ring structures. A semiconductor device fabricated by such a method is also provided.

Abstract: A semiconductor device includes a semiconductor substrate having a main surface in which a semiconductor element region where a plurality of functional elements are formed is formed; a multilevel wiring layer disposed on the main surface of the semiconductor substrate; a first organic insulating material layer disposed on the multilevel wiring layer; a groove that penetrates the multilevel wiring layer on a scribe region that surrounds the semiconductor element region; and an organic insulating material that is spaced from the first organic insulating material layer and disposed in the groove.

Abstract: A substrate dividing method which can thin and divide a substrate while preventing chipping and cracking from occurring. This substrate dividing method comprises the steps of irradiating a semiconductor substrate 1 having a front face 3 formed with functional devices 19 with laser light while positioning a light-converging point within the substrate, so as to form a modified region including a molten processed region due to multiphoton absorption within the semiconductor substrate 1, and causing the modified region including the molten processed region to form a starting point region for cutting; and grinding a rear face 21 of the semiconductor substrate 1 after the step of forming the starting point region for cutting such that the semiconductor substrate 1 attains a predetermined thickness.

Abstract: A method for manufacturing an acceleration sensing unit includes: providing an element support substrate in which a plurality of element supporting members is arranged so as to form a plane, each of the element supporting members being coupled to the other element supporting member through a supporting part and having a fixed part and a movable part that is supported by the fixed part through a beam, the beam having a flexibility with which the movable part is displaced along an acceleration detection axis direction when an acceleration is applied to the movable part; providing an stress sensing element substrate in which a plurality of stress sensing elements is arranged so as to form a plane, each of the stress sensing elements being coupled to the other stress sensing element through an element supporting part and having a stress sensing part and fixed ends that are formed so as to have a single body with the stress sensing part at both ends of the stress sensing part; disposing the stress sensing element

Abstract: A substrate dividing method which can thin and divide a substrate while preventing chipping and cracking from occurring. This substrate dividing method comprises the steps of irradiating a semiconductor substrate 1 having a front face 3 formed with functional devices 19 with laser light while positioning a light-converging point within the substrate, so as to form a modified region including a molten processed region due to multiphoton absorption within the semiconductor substrate 1, and causing the modified region including the molten processed region to form a starting point region for cutting; and grinding a rear face 21 of the semiconductor substrate 1 after the step of forming the starting point region for cutting such that the semiconductor substrate 1 attains a predetermined thickness.

Abstract: A method to prevent contamination of the principal surface side in a process of grinding the back surface side of a semiconductor wafer. At an intersection of a scribe region of a semiconductor wafer whose back surface side is to be ground, a plurality of insulating layers is laminated over the principal surface in the same manner as an insulating layer constituting a wiring layer laminated over a device region. Moreover, in the same layer as an uppermost wiring disposed at the uppermost layer among a plurality of the wiring layers formed for a device region, a metal pattern is formed. Furthermore, a second insulating layer covering the uppermost wiring is also formed over the metal pattern so as to cover the same.

Abstract: The present invention relates to a wafer cleaning and a wafer bonding method using the same that can improve a yield of cleaning process and bonding property in bonding the cleaned wafer by cleaning the wafer using atmospheric pressure plasma and cleaning solution. The wafer cleaning method includes the steps of providing a process chamber with a wafer whose bonding surface faces upward, cleaning and surface-treating the bonding surface of the wafer by supplying atmospheric pressure plasma and a cleaning solution to the bonding surface of the wafer, and withdrawing out the wafer from the process chamber.

Abstract: A substrate dividing method which can thin and divide a substrate while preventing chipping and cracking from occurring. This substrate dividing method comprises the steps of irradiating a semiconductor substrate 1 having a front face 3 formed with functional devices 19 with laser light while positioning a light-converging point within the substrate, so as to form a modified region including a molten processed region due to multiphoton absorption within the semiconductor substrate 1, and causing the modified region including the molten processed region to form a starting point region for cutting; and grinding a rear face 21 of the semiconductor substrate 1 after the step of forming the starting point region for cutting such that the semiconductor substrate 1 attains a predetermined thickness.

Abstract: Multiphoton absorption is generated, so as to form a part which is intended to be cut 9 due to a molten processed region 13 within a silicon wafer 11, and then an adhesive sheet 20 bonded to the silicon wafer 11 is expanded. This cuts the silicon wafer 11 along the part which is intended to be cut 9 with a high precision into semiconductor chips 25. Here, opposing cut sections 25a, 25a of neighboring semiconductor chips 25, 25 are separated from each other from their close contact state, whereby a die-bonding resin layer 23 is also cut along the part which is intended to be cut 9. Therefore, the silicon wafer 11 and die-bonding resin layer 23 can be cut much more efficiently than in the case where the silicon wafer 11 and die-bonding resin layer 23 are cut with a blade without cutting a base 21.

Abstract: According to an embodiment of a method of manufacturing a power transistor module, the method includes mechanically fastening a first terminal, a second terminal and at least two different DC bias terminals to an electrically conductive flange; connecting the flange to a source of a power transistor device; electrically connecting the first terminal to a gate of the power transistor device; electrically connecting the second terminal to a drain of the power transistor device; mechanically fastening a bus bar to the flange which extends between and connects the DC bias terminals; and electrically connecting the bus bar to the drain via one or more RF grounded connections.

Abstract: An identification mark constituted of irregularities is formed on the surface of a wafer, which is sealed with a resin layer and a dicing tape may be adhered to the backside. Multiple infrared units irradiate infrared rays towards the surface of the wafer from the backside thereof, wherein they transmit through the wafer and are then reflected at the interface between the resin layer and the surface of the wafer, thus producing reflected rays. An image pickup device picks up an image of the interface including the identification mark based on reflected rays. Optical axes of the infrared units extend to cross the surface of the wafer in different directions; hence, the image pickup device receives only a part of reflected rays, which are reflected at the interface in a prescribed direction. A polarizer can be arranged in proximity to the infrared unit or the image pickup device.

Abstract: A method for wafer level chip scale package comprises providing a wafer with semiconductor chips formed thereon, forming a groove alongside each chip, providing a wafer size clip array with a plurality of clip contact areas each extending to a down set connecting bar, connecting the plurality of clip contact areas to a plurality of the electrodes disposed on a top surface of the chips with down set connecting bars disposed inside the grooves, encapsulating top of wafer in molding compound, thinning the bottom portion of the wafer and dicing the thin wafer into single chip packages. The chip has source and gate electrodes on a top surface connected to a first and second clip contact areas extending to a first a second down set connecting bars respectively, with the bottom surfaces of the down set connecting bars substantially coplanar to a drain electrode located at the chip bottom surface.

Abstract: Formulations and processes for forming wafer coat layers are disclosed. In one embodiment, an organic surface protectant is incorporated into a wafer coat formulation deposited onto a semiconductor wafer prior to the laser scribe operation. Upon removal of the wafer coat layer, the organic surface protectant remains on the bumps and thereby prevents oxidation of the bumps between die prep and chip and attach. In an alternative embodiment, an ultraviolet light absorber is added to the wafer coat formulation to enhance the wafer coat layer's energy absorption and thereby improve the laser's ability to ablate the wafer coat layer. In an alternative embodiment, a conformal wafer coat layer is deposited on the wafer and die bumps, thereby reducing wafer coat layer thickness variations that can impact the laser scribing ability.

Abstract: A process and an apparatus are described for the treatment of wafers, in particular for the thinning of wafers. A wafer with a carrier layer and an interlayer arranged between the carrier layer and the wafer is also described, in which the interlayer is a plasmapolymeric layer that adheres to the wafer and adheres more strongly to the carrier layer than to the wafer.