Abstract: A method of semiconductor fabrication includes positioning a substrate on a susceptor in a chamber and growing an epitaxial feature on the substrate. The growing includes providing UV radiation to a first region of a surface of the substrate and while providing the UV radiation, growing a first portion of the epitaxial feature on the first region of the surface while concurrently growing a second portion of the epitaxial feature on a second region of the surface of the substrate. The first portion of the epitaxial feature can be greater in thickness than the second portion of the epitaxial feature.

Abstract: A substrate support includes a base, a substrate support layer disposed on the base, the substrate support layer being formed of an insulating material, and an electrostatic internal electrode layer disposed in the substrate support layer, the electrostatic internal electrode layer including a body portion and a plurality of protruding portions, the body portion having a circular shape in a plan view, and the plurality of protruding portions radially protruding from the body portion.

Abstract: Disclosed is a substrate treating apparatus that performs a heat treatment to a substrate. The apparatus includes the following elements: a heat treating plate that heats the substrate; lift pins that deliver the substrate, a lift pin drive mechanism that causes the lift pins to move upwardly/downwardly; a casing that produces a heat treatment atmosphere; and a cooling base plate that suppresses transmission of heat from the heat treating plate. The lift pin drive mechanism is disposed below the cooling base plate.

Abstract: A support device for a substrate and a substrate cleaning apparatus, the support device including a support on which the substrate is loadable; a rotor that rotates the support; and an oscillator that oscillates the substrate in a direction perpendicular to a surface of the substrate, wherein the substrate oscillates according to a natural frequency of the substrate or a natural frequency of particles on the substrate.

Abstract: A radiator in a laser welding apparatus radiates a beam to a main region and an auxiliary region on a welding surface. The auxiliary region is positioned to be adjacent to the main region or to be apart from the main region. A welding direction is a direction in which a beam radiation region moves during laser welding. The auxiliary region includes at least an area positioned on a forward side of the main region in the welding direction. The radiator radiates the beam in a setting such that at least one peak occurs in each of the main region and the auxiliary region.

Abstract: A device for cleaning an object surface, including a substrate provided on the object surface, a plurality of electrodes provided on the substrate, a dielectric layer provided on the substrate to cover the electrodes, and a control device supplying an alternating-current (AC) power to the electrodes including supplying a first AC power having a predetermined first frequency and a predetermined first voltage to the electrodes during a first time period to vibrate a droplet on the surface of the object by a periodic change of an electrostatic force generated at the electrodes, the first frequency being set to the resonant frequency of the liquid droplet.

Abstract: Embodiments of a gas delivery apparatus for use in a radio frequency (RF) processing apparatus are provided herein. In some embodiments, a gas delivery apparatus for use in a radio frequency (RF) processing apparatus includes: a conductive gas line having a first end and a second end; a first flange coupled to the first end; a second flange coupled to the second end, wherein the conductive gas line extends through and between the first and second flanges; and a block of ferrite material surrounding the conductive gas line between the first and second flanges.

Abstract: A semiconductor device manufacturing method of forming a trench and a via in a porous low dielectric constant film formed on a substrate as an interlayer insulating film, includes: embedding a polymer having a urea bond in pores of the porous low dielectric constant film by supplying a raw material for polymerization to the porous low dielectric constant film; forming the via by etching the porous low dielectric constant film; subsequently, embedding a protective filling material made of an organic substance in the via; subsequently, forming the trench by etching the porous low dielectric constant film; subsequently, removing the protective filling material; and after the forming a trench, removing the polymer from the pores of the porous low dielectric constant film by heating the substrate to depolymerize the polymer, wherein the embedding a polymer having a urea bond in pores is performed before the forming a trench.

Abstract: An antenna according to an aspect includes: a dielectric window having a first surface and a second surface, the second surface having an annular recessed surface and a flat surface surrounded by the recessed surface; a slot plate; a dielectric plate; a heat transfer member made of metal and having an upper surface and a lower surface opposing each other; a cooling jacket; and a heater, in which the upper surface includes a plurality of first regions and a second region, the cooling jacket is mounted on the plurality of first regions, the second region is recessed further toward the lower surface side than the plurality of first regions, the heater is mounted on the second region, and each of the plurality of first regions is provided at a position at least partially overlapping with the flat surface when viewed in a direction parallel to a central axis.

Abstract: A treatment head for treating a surface area of a substrate includes a housing having a main surface configured to be arranged adjacent to and facing the surface area of the substrate to be treated. An exhaust opening in the main surface of the housing is connectable to an exhaust device via an exhaust gas path formed at least in part in the housing. A radiative heater is arranged in the housing to emit heat radiation through a radiation opening in the main surface. A plasma source is arranged in the housing to emit a plasma jet through a plasma exit opening in the main surface. An outlet opening in the main surface of the housing is connectable to a gas source via an gas path formed at least in part in the housing. The centers of the exhaust opening, the radiation opening, the plasma exit opening, and the outlet opening are arranged in the above order along a first direction of the main surface.

Abstract: Provided is a method of manufacturing a nanorod. The method comprising comprises the steps of: providing a growth substrate and a support substrate; epitaxially growing a nanomaterial layer onto one surface of the growth substrate; forming a sacrificial layer on one surface of the support substrate; bonding the nanomaterial layer with the sacrificial layer; separating the growth substrate from the nanomaterial layer; flattening the nanomaterial layer; forming a nanorod by etching the nanomaterial layer; and separating the nanorod by removing the sacrificial layer.

Abstract: Techniques herein include methods for selectively modifying chemical properties of organosilicates including periodic mesoporous organosilicates (PMOs) in situ for use in fabrication of semiconductor devices. With techniques herein, such materials are manipulated in their chemical properties after deposition and can accordingly be used as sacrificial patterning films and/or as patterning enabling materials. Using selective treatments such as annealing, curing, plasma exposure, and silylation, chemical properties such as etch resistance and hydrophobicity can be changed to enable a given patterning operation. A given film can be etch resistant for one patterning operation, and then changed to be etch removable for a subsequent patterning operation.

Abstract: A semiconductor device comprises: an n-type semiconductor substrate; a p-type anode region formed in the semiconductor substrate on its front surface side; an n-type field stop region formed in the semiconductor substrate on its rear surface side with protons as a donor; and an n-type cathode region formed in the semiconductor substrate to be closer to its rear surface than the field stop region is, wherein a concentration distribution of the donor in the field stop region in its depth direction has a first peak, and a second peak that is closer to the rear surface of the semiconductor substrate than the first peak is, and has a concentration lower than that of the first peak, and a carrier lifetime in at least a partial region between the anode region and the cathode region is longer than carrier lifetimes in the anode region.

Abstract: Semiconductor structures and methods of fabricating the same using interrupted deposition processes and multiple laser anneals are provided. The structure includes a high-k gate stack with a high-k bilayer or nanolaminate where a bottom portion of the bilayer is crystallized while a top portion of the bilayer is amorphous.

Abstract: Methods for fabricating a layered circuit structure are provided, which include, for instance: depositing a first material layer above a substrate, the first material layer having an oxidized upper surface; providing a second material layer over the oxidized upper surface of the first material layer; and inhibiting diffusion of one or more elements from the oxidized upper surface of the first material layer into either the first material layer or the second material layer during the providing of the second material layer over the oxidized upper surface of the first material layer. The inhibiting may include one or more of modifying a characteristic(s) of the first material layer, forming a protective layer over the oxidized upper surface of the first material layer, or altering at least one process parameter employed in providing the second material layer.

Abstract: In some embodiments, a reactive curing process may be performed by exposing a semiconductor substrate in a process chamber to an ambient containing hydrogen peroxide, with the pressure in the process chamber at about 300 Torr or less. In some embodiments, the residence time of hydrogen peroxide molecules in the process chamber is about five minutes or less. The curing process temperature may be set at about 500° C. or less. The curing process may be applied to cure flowable dielectric materials and may provide highly uniform curing results, such as across a batch of semiconductor substrates cured in a batch process chamber.

Abstract: There is provided a method for reducing the nonuniformity of forward voltage Vf of an N-type semiconductor wafer in which density of impurities included in an N-layer is nonuniformly distributed in a plane view of the semiconductor wafer. The method reduces the nonuniformity of forward voltage, by irradiating charged particles to the N-type semiconductor wafer, and generating defects in the N-layer to reduce the nonuniformity of forward voltage. In one aspect of the method, charged particles are irradiated so that a reaching positon in a depth direction or an irradiation density may differ according to the density of impurities in the N-layer in the plane view of the semiconductor wafer.

Abstract: A method of removing particles from a display panel is disclosed. In one aspect, the method includes charging the particles and applying an electric field to the charged particles to capture the charged particles. Organic particles and inorganic particles may be forcibly charged to capture the organic and inorganic particles using a metal bar so that the organic and inorganic particles may be substantially removed.

Abstract: An apparatus for recognizing an object may include a lens, a camera and a signal-processing unit. The lens may include two cross sections having different focal lengths. The camera may be configured to photograph the object having a first part through the lens. The first part may have a first shape. The signal-processing unit may be configured to recognize a height of the first part based on deviations of the first shape in an image obtained from the camera. Thus, the apparatus may only include the cylindrical lens interposed between the object and the camera except for the softwares for processing the signals. As a result, the apparatus may have a simple structure without a structure of a laser irradiation.

Abstract: A semiconductor device structure and a method of fabricating a semiconductor device structure are provided. A first device layer is formed over a substrate, where an alignment structure is patterned in the first device layer. A dielectric layer is provided over the first device layer. The dielectric layer is patterned to include an opening over the alignment structure. A second device layer is formed over the dielectric layer. The second device layer is patterned using a mask layer, where the mask layer includes a structure that is aligned relative to the alignment structure. The alignment structure is visible via the opening during the patterning of the second device layer.

Abstract: An apparatus for fabricating semiconductor devices includes a chamber having a bottom plane, a side wall and a lid. An irradiating unit is at an interior of the chamber. A substrate mounting unit is between the bottom plane of the chamber and the irradiating unit. The irradiating unit includes an irradiating tube and a hole penetrating the central region of the irradiating tube. The irradiating tube has a hollow disk shape, and a lower surface of the irradiating tube is opened to the substrate mounting unit.

Abstract: A semiconductor manufacturing equipment includes a buffer chamber, a load port, a first chamber, and a second chamber respectively connected with the buffer chamber at a different side. The semiconductor manufacturing equipment also has a third chamber in the buffer chamber, the third chamber configured for cooling a wafer, and a single blade robot in the buffer chamber. Moreover, the semiconductor manufacturing equipment has a controller including a program, wherein the program elevates a wafer transfer priority for the first chamber and the second chamber higher than a wafer transfer priority for the third chamber.

Abstract: A processing system is disclosed, having a multiple power transmission elements with an interior cavity that may be arranged around a plasma processing chamber. Each of the power transmission elements may propagates electromagnetic energy that may be used to generate plasma within the plasma process chamber. The power transmission elements may be designed to accommodate a range of power and frequency ranges that range from 500W to 3500W and 0.9 GHz to 9 GHz. In one embodiment, the power transmission elements may include a rectangular interior cavity that enables the generation of a standing wave with two or more modes. In another embodiment, the power transmission elements may have a cylindrical interior cavity that may be placed along the plasma processing chamber or have one end of the cylinder placed against the plasma processing chamber.

Abstract: A multi-mode thin film deposition apparatus including a reaction chamber, a carrying seat, a showerhead, an inert gas supplying source, a first gas inflow system and a second gas inflow system is provided. The carrying seat is disposed in the reaction chamber. The showerhead has a gas mixing room and gas holes disposed at a side of the gas mixing room. The gas mixing room is connected to the reaction chamber through the plurality of gas holes which faces the carrying seat. The first gas inflow system is connected to the reaction chamber and supplies a first process gas during a first thin film deposition process mode. The inert gas supplying source is connected to the gas mixing room for supplying an inert gas. The second gas inflow system is connected to the gas mixing room to supply a second process gas during a second thin film deposition process mode.

Abstract: To provide a plasma processing device, a plasma processing method and a method of manufacturing electronic devices capable of performing high-speed processing as well as using the plasma stably. In an inductively-coupled plasma torch unit, a coil, a first ceramic block and a second ceramic block are arranged in parallel, and a long chamber has an annular shape. Plasma generated in the chamber is ejected from an opening in the chamber toward a substrate. The substrate is processed by moving the long chamber and the substrate mounting table relatively in a direction perpendicular to a longitudinal direction of the opening. A discharge suppression gas is introduced into a space between the inductively-coupled plasma torch unit and the substrate inside the chamber through a discharge suppression gas supply hole, thereby generating long plasma stably.

Abstract: A processing chamber including a reaction chamber having a processing area, a processing gas inlet in communication with the processing area, a first excited species generation zone in communication with the processing gas inlet and a second exited species generation zone in communication with the processing gas inlet. A method of processing a substrate including the steps of loading a substrate within a processing area, activating a first excited species generation zone to provide a first excited species precursor to the processing area during a first pulse and, activating a second excited species generation zone to provide a second excited species precursor different from the first excited species precursor to the processing area during a second pulse.

Abstract: A method for repairing and lowering the dielectric constant of low-k dielectric layers used in semiconductor fabrication is provided. In one implementation, a method of repairing a damaged low-k dielectric layer comprising exposing the porous low-k dielectric layer to a vinyl silane containing compound and optionally exposing the porous low-k dielectric layer to an ultraviolet (UV) cure process.

Abstract: Disclosed are apparatus and methods for processing a substrate. The substrate having a feature with a layer thereon is exposed to an inductively coupled plasma which forms a substantially conformal layer.

Abstract: A method for processing a resist mask includes: (a) a step of preparing, in a processing chamber, a target object to be processed having a patterned resist mask provided thereon; and (b) a step of generating a plasma of the hydrogen-containing gas by supplying a hydrogen-containing gas and supplying a microwave into the processing chamber. The hydrogen-containing gas may be, e.g., H2 gas.

Abstract: In one example, the method includes forming a metal layer on a silicon-containing structure, after forming the metal layer, performing an ion implantation process to implant silicon atoms into at least one of the metal layer and the silicon-containing structure and performing a first millisecond anneal process so as to form a first metal silicide region in the silicon-containing structure.

Abstract: A laser annealing apparatus carries out an annealing treatment an amorphous silicon film on a TFT substrate. The apparatus includes: a mask having a plurality of apertures; a microlens substrate having a plurality of microlenses arranged on a surface thereof and configured to focus the plurality of laser beams Lb, that have passed through the respective apertures of the mask, onto the TFT substrate to apply a predetermined energy to the amorphous silicon film; a pair of guides each having a semi-cylindrical shape and disposed along both sides across the microlens substrate so that the axes of the guides are parallel to each other and that the tips of the guides protrude from the positions of tips of the microlenses toward the TFT substrate; and a film that is provided in a tensioned state between the pair of guides so as to be movable and that transmits a laser beam.

Abstract: A plasma processing apparatus includes: a processing container which defines a processing space; a microwave generator; a dielectric having an opposing surface which faces the processing space; a slot plate formed with a plurality of slots; and a heating member provided within the slot plate. The slot plate is provided on a surface of the dielectric at an opposite side to the opposing surface to radiate microwaves for plasma excitation to the processing space through the dielectric based on the microwaves generated by the microwave generator.

Abstract: Combinatorial plasma enhanced deposition techniques are described, including designating multiple regions of a substrate, providing a precursor to at least a first region of the multiple regions, and providing a plasma to the first region to deposit a first material on the first region formed using the first precursor, wherein the first material is different from a second material formed on a second region of the substrate.

Abstract: Method and apparatus for reducing metal oxide surfaces to modified metal surfaces are disclosed. By exposing a metal oxide surface to a remote plasma, the metal oxide surface on a substrate is reduced. A remote plasma apparatus can treat the metal oxide surface as well as cool, load/unload, and move the substrate within a single standalone apparatus. The remote plasma apparatus includes a processing chamber and a controller configured to provide a substrate having a metal seed layer in a processing chamber, move the substrate towards a substrate support in the processing chamber, form a remote plasma of a reducing gas species, expose a metal seed layer of the substrate to the remote plasma, and expose the substrate to a cooling gas. In some embodiments, the remote plasma apparatus is part of an electroplating apparatus.

Abstract: Systems and methods for plasma doping microfeature workpieces are disclosed herein. In one embodiment, a method of implanting boron ions into a region of a workpiece includes generating a plasma in a chamber, selectively applying a pulsed electrical potential to the workpiece with a duty cycle of between approximately 20 percent and approximately 50 percent, and implanting an ion specie into the region of the workpiece.

Abstract: In accordance with one aspect of this invention, a multi charged particle beam writing apparatus includes an aperture member, in which a plurality of openings are formed, configured to form multi-beams by making portions of the charged particle beam pass through the plurality of openings; a plurality of blankers configured to perform blanking-deflect regarding beams corresponding to the multi-beams; a writing processing control unit configured to control writing processing with a plurality of beams having passed through different openings among the plurality of openings being irradiated on the target object at a predetermined control grid interval; and a dose controlling unit configured to variably control a dose of a beam associated with deviation according to a deviation amount when an interval between the plurality of beams irradiated is deviated from the control grid interval.

Abstract: Methods of multiple patterning of low-k dielectric films are described. For example, a method includes forming and patterning a first mask layer above a low-k dielectric layer, the low-k dielectric layer disposed above a substrate. A second mask layer is formed and patterned above the first mask layer. A pattern of the second mask layer is transferred at least partially into the low-k dielectric layer by modifying first exposed portions of the low-k dielectric layer with a first plasma process and removing the modified portions of the low-k dielectric layer. Subsequently, a pattern of the first mask layer is transferred at least partially into the low-k dielectric layer by modifying second exposed portions of the low-k dielectric layer with a second plasma process and removing the modified portions of the low-k dielectric layer.

Abstract: A processing chamber including a reaction chamber having a processing area, a processing gas inlet in communication with the processing area, a first excited species generation zone in communication with the processing gas inlet and a second exited species generation zone in communication with the processing gas inlet. A method of processing a substrate including the steps of loading a substrate within a processing area, activating a first excited species generation zone to provide a first excited species precursor to the processing area during a first pulse and, activating a second excited species generation zone to provide a second excited species precursor different from the first excited species precursor to the processing area during a second pulse.

Abstract: A plasma processing system having a plasma processing chamber configured for processing a substrate is provided. The plasma processing system includes at least an upper electrode and a lower electrode for processing the substrate. The substrate is disposed on the lower electrode during plasma processing, where the upper electrode and the substrate forms a first gap. The plasma processing system also includes an upper electrode peripheral extension (UE-PE). The UE-PE is mechanically coupled to a periphery of the upper electrode, where the UE-PE is configured to be non-coplanar with the upper electrode. The plasma processing system further includes a cover ring. The cover ring is configured to concentrically surround the lower electrode, where the UE-PE and the cover ring forms a second gap.

Abstract: A drawing apparatus for performing drawing on a substrate with a charged particle beam, includes: a controller configured to control a dose of the charge particle beam at each of a plurality of positions of the charged particle beam on the substrate based on information of displacement of each of the plurality of positions from a target position corresponding thereto and a target dose of the charged particle beam at the target position corresponding to each of the plurality of positions.

Abstract: An ion implantation method includes generating CmHy+ ions (m is such an integer as 4?m?6, and y is such an integer as 1?y?2m+2) using an ion generating material expressed by CnHx (n is such an integer as 4?n?6, and x is such an integer as 1?x?2n+2), and implanting the ions into a wafer.

Abstract: A method for fabricating a variable resistance memory device includes forming an oxygen-deficient first metal oxide layer over a first electrode, forming an oxygen-rich second metal oxide layer over the first metal oxide layer, treating the first and second metal oxide layers with hydrogen-containing plasma, forming an oxygen-rich third metal oxide layer, and forming a second electrode over the third metal oxide layer.

Abstract: A semiconductor package, comprising: a semiconductor substrate; a mold layer on the semiconductor substrate; and a marking formed on a surface of the mold layer, the marking comprising dot markings substantially discontinuously arranged in vertical and horizontal directions of a display region. An effective area of the dot markings within a unit display region of the marking is smaller than about half a total area of the unit display region.

Abstract: A method for fabricating a photovoltaic device includes forming a patterned layer on a doped emitter portion of the photovoltaic device, the patterned layer including openings that expose areas of the doped emitter portion and growing an epitaxial layer over the patterned layer such that a crystalline phase grows in contact with the doped emitter portion and a non-crystalline phase grows in contact with the patterned layer. The non-crystalline phase is removed from the patterned layer. Conductive contacts are formed on the epitaxial layer in the openings to form a contact area for the photovoltaic device.

Abstract: A system is provided for thermal processing of a semiconductor substrate including a laser configured for emitting a laser beam towards the semiconductor substrate and a scanning means configured for scanning the laser beam along a first plurality of paths on the semiconductor substrate such that the paths are spaced apart from each other by predetermined distances. Further, a method for thermal processing of a semiconductor substrate is provided including scanning a laser beam along a first plurality of paths on the semiconductor substrate such that the paths are spaced apart from each other by predetermined distances.

Abstract: A semiconductor plasma processing apparatus includes a vacuum chamber in which semiconductor substrates are processed, a process gas source in fluid communication with the vacuum chamber for supplying a process gas into the vacuum chamber, and an RF energy source adapted to energize the process gas into the plasma state in the vacuum chamber. The apparatus can also include a chamber wall wherein the chamber wall includes a means for supplying a plasma compatible liquid to a plasma exposed surface thereof wherein the plasma compatible liquid flows over the plasma exposed surface thereby forming a flowing protective liquid layer thereon. A liquid supply delivers the plasma compatible liquid to the chamber wall.

Abstract: Novel processing methods for production of high-refractive index contrast and low loss optical waveguides are disclosed. In one embodiment, a “channel” waveguide is produced by first depositing a lower cladding material layer with a low refractive index on a base substrate, a refractory metal layer, and a top diffusion barrier layer. Then, a trench is formed with an open surface to the refractory metal layer. The open surface is subsequently oxidized to form an oxidized refractory metal region, and the top diffusion barrier layer and the non-oxidized refractory metal region are removed. Then, a low-refractive-index top cladding layer is deposited on this waveguide structure to encapsulate the oxidized refractory metal region. In another embodiment, a “ridge” waveguide is produced by using similar process steps with an added step of depositing a high-refractive-index material layer and an optional optically-transparent layer.

Abstract: Apparatuses and methods for processing substrates are disclosed. A processing apparatus includes a chamber for generating a plasma therein, an electrode associated with the chamber, and a signal generator coupled to the electrode. The signal generator applies a DC pulse to the electrode with sufficient amplitude and sufficient duty cycle of an on-time and an off-time to cause events within the chamber. A plasma is generated from a gas in the chamber responsive to the amplitude of the DC pulse. Energetic ions are generated by accelerating ions of the plasma toward a substrate in the chamber in response to the amplitude of the DC pulse during the on-time. Some of the energetic ions are neutralized to energetic neutrals in response to the DC pulse during the off-time. Some of the energetic neutrals impact the substrate with sufficient energy to cause a chemical reaction on the substrate.

Abstract: A method for repairing and lowering the dielectric constant of low-k dielectric layers used in semiconductor fabrication is provided. In one implementation, a method of repairing a damaged low-k dielectric layer comprising exposing the porous low-k dielectric layer to a vinyl silane containing compound and optionally exposing the porous low-k dielectric layer to an ultraviolet (UV) cure process.

Abstract: A drawing apparatus includes: plural charged particle optical systems arrayed at a pitch in a first direction, each configured to irradiate a substrate with charged particle beams; a stage configured to hold the substrate and be moved relative to the charged particle optical systems in a second direction orthogonal to the first direction; and a controller configured to determine charged particle beams for the drawing with respect to each charged particle optical system so as to satisfy a relation given by SW=Pc/?=Ps/(? where Ps is an array pitch of shot regions in the first direction, SW is a width, in the first direction, of each drawing region by each charged particle optical system, Pc be an array pitch of drawing regions in the first direction, and ? and ? are natural numbers.