Abstract: A semiconductor device production method includes: treating a wafer which contains a silicon substrate with dilute hydrofluoric acid in a bath; introducing water into the bath while discharging the dilute hydrofluoric acid from the bath; and introducing H2O2 and warm water warmer than the above-mentioned water into the bath after the discharge of dilute hydrofluoric acid from the bath in such a manner that the introduction of warm water is started simultaneously with the start of H2O2 supply or subsequently to the start of H2O2 supply.

Abstract: There is provided a plasma processing method performing a plasma etching process on an oxide film of a target substrate through one or more steps by using a processing gas including a CF-based gas and a COS gas. The plasma processing method includes: performing a plasma etching process on the oxide film of the target substrate according to a processing recipe; measuring a concentration of sulfur (S) remaining on the target substrate (residual S concentration) after the plasma etching process is performed according to the processing recipe; adjusting a ratio of a COS gas flow rate with respect to a CF-based gas flow rate (COS/CF ratio) so as to allow the residual S concentration to become equal to or smaller than a predetermined value; and performing an actual plasma etching process according to a modified processing recipe storing the adjusted COS/CF ratio.

Abstract: A method for fabricating a semiconductor device is disclosed. A resist pattern is formed on a surface of a semiconductor layer in which a first layer and a second layer are sequentially formed on a substrate. A gate recess is formed by removing a part or the entire second layer in an opening area of the resist pattern. The resist pattern is removed. A dry etching residue attached to a bottom surface and lateral surfaces of the gate recess is removed after the resist pattern is removed. An insulating film is formed on the bottom surface, the lateral surfaces, and the semiconductor layer after the dry etching residue is removed. A gate electrode is formed via the insulating film on an area where the gate recess is formed. A source electrode and a drain electrode are formed on the semiconductor layer.

Abstract: In one embodiment, high doped semiconductor channels are formed in a semiconductor region of an opposite conductivity type to increase the capacitance of the device.

Abstract: A fabrication process for a trench Schottky diode with differential oxide thickness within the trenches includes forming a first nitride layer on a substrate surface and subsequently forming a plurality of trenches in the substrate including, possibly, a termination trench. Following a sacrificial oxide layer formation and removal, sidewall and bottom surfaces of the trenches are oxidized. A second nitride layer is then applied to the substrate and etched such that the second nitride layer covers the oxide layer on the trench sidewalls but exposes the oxide layer on the trench bottom surfaces. The trench bottom surfaces are then re-oxidized and the remaining second nitride layer then removed from the sidewalls, resulting in an oxide layer of varying thickness being formed on the sidewall and bottom surfaces of each trench. The trenches are then filled with a P type polysilicon, the first nitride layer removed, and a Schottky barrier metal applied to the substrate surface.

Abstract: The invention includes methods in which one or more components of a carboxylic acid having an aqueous acidic dissociation constant of at least 1×10?6 are utilized during the etch of oxide (such as silicon dioxide or doped silicon dioxide). Two or more carboxylic acids can be utilized. Exemplary carboxylic acids include trichloroacetic acid, maleic acid, and citric acid.

Abstract: Disclosed is a semiconductor manufacturing process, in which a fluorine radical-containing plasma is used to etch a hard mask and a layer therebeneath; and a treatment is carried out using a gas reactive to fluorine radicals for reacting with residual fluorine radicals to form a fluorine-containing compound and remove it. Thus, precipitates formed by the reaction of fluorine radicals and titanium components existing in the hard mask to cause a process defect can be avoided.

Abstract: A method and system for removing volatile residues from a substrate are provided. In one embodiment, the volatile residues removal process is performed en-routed in the system while performing a halogen treatment process on the substrate. The volatile residues removal process is performed in the system other than the halogen treatment processing chamber and a FOUP. In one embodiment, a method for volatile residues from a substrate includes providing a processing system having a vacuum tight platform, processing a substrate in a processing chamber of the platform with a chemistry comprising halogen, and treating the processed substrate in the platform to release volatile residues from the treated substrate.

Abstract: The invention includes methods in which one or more components of a carboxylic acid having an aqueous acidic dissociation constant of at least 1×10?6 are utilized during the etch of oxide (such as silicon dioxide or doped silicon dioxide). Two or more carboxylic acids can be utilized. Exemplary carboxylic acids include trichloroacetic acid, maleic acid, and citric acid.

Abstract: A residue treatment system includes a treatment tank which treats residue with etching fluid, the residue being generated in a trench formed in an insulating film by dry etching; a measurement unit which measures a characteristic amount of the etching fluid; and a control unit which calculates treatment time for removing the residue on the basis of a value obtained by measuring the characteristic amount, the control unit calculating the treatment time by using correlation between an etching rate of the insulating film and the characteristic amount.

Abstract: A method for increasing the removal rate of a photoresist layer used as an ion implant mask. The method includes performing a pre-treatment of a substrate, such as a plasma process, before forming the photoresist layer. The method can be applied to the fabrication of semiconductor devices for increasing the removal rate of the photoresist layer.

Abstract: A composition for the production of semiconductors, comprising H2SiF6 and/or HBF4 in a total amount of 10-500 mg/kg, 1-17 % by weight of H2S04, 1-15% by weight of H202, optionally in combination with additives, in aqueous solution and a process of removing residual polymers using the composition.

Abstract: There is described a method for producing a packaged integrated circuit. The method comprises a first step of building an integrated circuit having a micro-structure suspended above a micro-cavity, and having a heating element on the micro-structure capable of heating itself and its immediate surroundings. A layer of protective material is then deposited on said micro-structure such that at least a top surface of the micro-structure and an opening of the micro-cavity is covered, wherein the protective material is in a solid state at room temperature and can protect the micro-structure during silicon wafer dicing procedures and subsequent packaging. The integrated circuit is packaged and an electric current is passed through the heating element such that a portion of the protective material is removed and an unobstructed volume is provided above and below the micro-structure.

Abstract: Ultra thin back-illuminated photodiode array fabrication methods providing backside contact by diffused regions extending through the array substrate. In accordance with the methods, a matrix is diffused into one surface of a substrate, and at a later stage of the substrate processing, the substrate is reduced in thickness and a similar matrix is diffused into the substrate from the other side, this second diffusion being aligned with the first and contacting the first within the substrate. These two contacting matrices provide good electrical contact to a conductive diffusion on the backside for a low resistance contact to the backside. Various embodiments are disclosed.

Abstract: The present invention relates to a composition for the removal of so-called “sidewall residues” from metal surfaces, in particular from aluminium or aluminium-containing surfaces, in particular from aluminium or aluminium-containing surfaces, during the production of semiconductor elements.

Abstract: A method of manufacturing an electronic device comprises forming a wiring material layer made of aluminum or an aluminum alloy on the surface of an insulating film on a substrate, patterning the wiring material layer by a reactive ion etching treatment with a resist pattern used as a mask so as to form a wiring, and treating the surface of the insulating film including the wiring with an aqueous solution for removing the etching residue, the aqueous solution containing a peroxosulfate, a fluorine-containing compound and an acid for adjusting the pH value and having a pH value of ?1 to 3.

Abstract: A method for forming a damascene structure by providing a single process solution for resist ashing while avoiding and repairing plasma etching damage as well as removing absorbed moisture in the dielectric layer, the method including providing a substrate comprising an uppermost photoresist layer and an opening extending through a thickness of an inter-metal dielectric (IMD) layer to expose an underlying metal region; and, carrying out at least one supercritical fluid treatment comprising supercritical CO2, a first co-solvent, and an additive selected from the group consisting of a metal corrosion inhibitor and a metal anti-oxidation agent to remove the uppermost photoresist layer, as well as including an optional dielectric insulating layer bond forming agent.

Abstract: A fabrication process for a trench Schottky diode with differential oxide thickness within the trenches includes forming a first nitride layer on a substrate surface and subsequently forming a plurality of trenches in the substrate including, possibly, a termination trench. Following a sacrificial oxide layer formation and removal, sidewall and bottom surfaces of the trenches are oxidized. A second nitride layer is then applied to the substrate and etched such that the second nitride layer covers the oxide layer on the trench sidewalls but exposes the oxide layer on the trench bottom surfaces. The trench bottom surfaces are then re-oxidized and the remaining second nitride layer then removed from the sidewalls, resulting in an oxide layer of varying thickness being formed on the sidewall and bottom surfaces of each trench. The trenches are then filled with a P type polysilicon, the first nitride layer removed, and a Schottky barrier metal applied to the substrate surface.

Abstract: A method for removing mottled etch in a semiconductor fabricating process, prevents mottled etch from being generated after etching, by performing ashing using an oxide plasma, prior to performing wet etching using a photoresist pattern. The method for removing the mottled etch includes the steps of forming a gate oxide film on a semiconductor substrate; forming a photoresist pattern on the substrate; performing ashing using an oxygen plasma; and removing the oxide film consequently by wet etching, the oxide film being opened by the pattern.

Abstract: A semiconductor structure and a method of fabrication there-for are provided. The semiconductor structure comprises a substrate, a dielectric layer disposed over the substrate, a hydrophilic material layer disposed over the dielectric layer, and a hardmask layer disposed over the hydrophilic material layer. It is noted that, the edge of the semiconductor structure may be polished after the hydrophilic material layer is formed over the dielectric layer and before the hardmask layer is formed over the hydrophilic material layer.

Abstract: The present invention includes a process for selectively etching a low-k dielectric material formed on a substrate using a plasma of a gas mixture in a plasma etch chamber. The gas mixture comprises a fluorine-rich fluorocarbon or hydrofluorocarbon gas, a nitrogen-containing gas, and one or more additive gases, such as a hydrogen-rich hydrofluorocarbon gas, an inert gas and/or a carbon-oxygen gas. The process provides a low-k dielectric to a photoresist mask etching selectivity ratio greater than about 5:1, a low-k dielectric to a barrier/liner layer etching selectivity ratio greater about 10:1, and a low-k dielectric etch rate higher than about 4000 ?/min.

Abstract: The present invention provides an interconnect that can be employed in an integrated circuit. The interconnect includes a metal line located over a substrate, a dielectric layer located over the metal line, and an interconnect located in the dielectric layer, including a landed portion located over the metal line and an unlanded portion located along at least a portion of a lateral edge of the metal line. The unlanded portion is at least partially filled with a polymer, and the landed portion is substantially filled with a conductive material. A method for manufacturing the interconnect is also provided.

Abstract: A metal layer is formed over a metal oxide, where the metal oxide is formed over a semiconductor substrate. A predetermined critical dimension of the metal layer is determined. A first etch is performed to etch the metal layer down to the metal oxide and form footings at the sidewalls of the metal layer. A second etch to remove the footings to target a predetermined critical dimension, wherein the second etch is selective to the metal oxide. In one embodiment, a conductive layer is formed over the metal layer. The bulk of the conductive layer may be etched leaving a portion in contact with the metal layer. Next, the portion left in contact with the metal layer may be etched using chemistry selective to the metal layer.

Abstract: A low-k dielectric film is deposited on the wafer. A metal layer is then deposited over the low-k dielectric film. A resist pattern is formed over the metal layer. The resist pattern is then transferred to the underlying metal layer to form a metal pattern. The resist pattern is stripped off. A through hole is plasma etched into the low-k dielectric film by using the metal pattern as a hard mask. The plasma etching causes residues to deposit within the through hole. A first wet treatment is then performed to soften the residues. A plasma dry treatment is carried out to crack the residues. A second wet treatment is performed to completely remove the residues.

Abstract: A liquid crystal display device includes a substrate, an organic insulating film formed on the substrate, an alignment film having a first etch rate formed on the organic insulating film, and a silicon nitride layer having a second etch rate formed between the alignment film and the organic insulating film, wherein the first etch rate is different from the second etch rate.

Abstract: A method of manufacturing an electronic device comprises forming a wiring material layer made of aluminum or an aluminum alloy on the surface of an insulating film on a substrate, patterning the wiring material layer by a reactive ion etching treatment with a resist pattern used as a mask so as to form a wiring, and treating the surface of the insulating film including the wiring with an aqueous solution for removing the etching residue, the aqueous solution containing a peroxosulfate, a fluorine-containing compound and an acid for adjusting the pH value and having a pH value of ?1 to 3.

Abstract: Disclosed is apparatus for treating samples, and a method of using the apparatus. The apparatus includes processing apparatus (a) for treating the samples (e.g., plasma etching apparatus), (b) for removing residual corrosive compounds formed by the sample treatment, (c) for wet-processing of the samples and (d) for dry-processing the samples. A plurality of wet-processing treatments of a sample can be performed. The wet-processing apparatus can include a plurality of wet-processing stations. The samples can either be passed in series through the plurality of wet-processing stations, or can be passed in parallel through the wet-processing stations.

Abstract: A fabrication process for a Schottky barrier structure includes forming a nitride layer directly on a surface of an epitaxial (“epi”) layer and subsequently forming a plurality of trenches in the epi layer. The interior walls of the trenches are then deposited with a final oxide layer without forming a sacrificial oxide layer to avoid formation of a beak bird at the tops of the interior trench walls. A termination trench is etched in the same process step for forming the plurality of trenches in the active area.

Abstract: A method for forming a contact hole of a semiconductor device, wherein a polymer residual on a bottom surface of the contact hole is treated with plasma of mixture gas containing oxygen to convert the polymer residual into a pure silicon oxide film free of carbon and fluorine for easy removal in a subsequent washing process is disclosed. The method comprises (a) sequentially forming a capping layer and a planarized interlayer insulating film on a semiconductor substrate having a predetermined lower structure; (b) selectively etching the interlayer insulating film to expose a predetermined region of the capping layer; (c) removing the exposed capping layer; (d) subjecting the resulting structure to a plasma treatment using a mixture gas containing oxygen; and (e) performing a cleaning process.

Abstract: A step for forming a wiring on a semiconductor substrate, a step for forming a first silicon oxide film on the semiconductor substrate having the wiring, and a step for forming an interlayer insulating film composed of a material bearing a low specific inductive capacity on the first silicon oxide film are sequentially executed to form a multilayered wiring. The interlayer insulating film is formed to have a smaller thickness relative to a step of the first silicon oxide film, so as not to extend beyond the step of the first silicon oxide film.

Abstract: A method of forming a floating gate of a memory cell is provided. A substrate having at least a trench is provided. Next, a tunnel oxide layer is formed on a surface of the trench. Next, a conductive layer is filled in the trench. Next, two-step etching process is carried out to form a first floating gate and a second floating gate having a top corner with sharp edge over the sidewalls of the trench.

Abstract: A conductive pattern having a surface including silicon is formed on a substrate of a semiconductor device and a conduction region having a surface including silicon is formed in the substrate. A radio frequency etching process is performed ex-situ to remove impurities from a resultant structure and to improve surface characteristics of the conduction region. Residues generated during the radio frequency etching process are removed from the conductive pattern and the conduction region by a cleaning process. A metal film is formed on the conductive pattern and the conduction region. A silicide film is formed on the conductive pattern and the conduction region by reacting metal of the metal film and silicon in the conductive pattern and the conduction region. With a radio frequency sputtering process and a wet cleaning process, a metal silicide film having a uniform phase may be stably formed.

Abstract: According to the present invention, of the resist film applied to the entire surface of the silicon substrate, the part on the electrode pattern is removed and an opening shaped like a dish in which the diameter of the upper part is larger than that of the lower part is formed, wherein the diameter of the lower part is smaller than the outer diameter of the electrode pattern. The electrode pattern exposed at the bottom of the opening is removed by the etching process. Next, the silicon substrate is tilted and a laser beam is irradiated toward the silicon substrate exposed at the bottom of the opening with water running over the surface of the resist film in air, and a hole is formed.

Abstract: In one aspect, the invention includes a method of treating a surface of a substrate. A mixture which comprises at least a frozen first material and liquid second material is provided on the surface and moved relative to the substrate. In another aspect, the invention encompasses a method of treating a plurality of substrates. A treating member is provided proximate a first substrate, and an initial layer of frozen material is formed over a surface of the treating member. A surface of the first substrate is treated by moving at least one of the treating member and the first substrate relative to the other of the treating member and the first substrate. After the surface of the first substrate is treated, the initial layer of frozen material is removed from over the surface of the treating member.

Abstract: A method of enabling the removal of fluorine containing residue from a semiconductor substrate comprising applying a gas and/or vapor to which the residue is reactive to the residue while the temperature of the substrate is at an elevated level with respect to ambient temperature and the residue is exposed to ultraviolet radiation, for a time period which is sufficient to effect at least one of volatilizing the residue or rendering the residue hydrophilic enough to be removable with deionized water.

Abstract: In a method of manufacturing a semiconductor device, an insulating film is formed on a semiconductor substrate, and a wiring line groove is formed in the insulating film. Then, a conductive film is formed to fill the wiring line groove and to cover the insulating film. The conductive film is removed using a CMP polishing method until the insulating film is exposed, to complete a wiring line. Subsequently, a front side of the semiconductor substrate is rinsed on which the wiring line is formed, and then a back side of the semiconductor substrate is rinsed while supplying to the front side of the semiconductor substrate, a protection solution for forming a protection film in an exposed surface of the wiring line.

Abstract: In a method of manufacturing a contact element, provision is made of a laminated body which has an insulating film, an electrically conductive layer stacked on the insulating film, and bump holes opened. A treatment is carried out so as to remove organic materials and the like from an interior of the bump holes and/or a surface of the insulating film before bumps are formed on the bump holes. The treatment may be a plasma treatment or an X-ray irradiation.

Abstract: A process for removal of a photoresist mask used to etch openings in low k carbon-doped silicon oxide dielectric material of an integrated circuit structure, and for removing etch residues remaining from either the etching of the openings or removal of the resist mask, while inhibiting damage to the low k dielectric material comprises. The structure is exposed to a reducing plasma to remove a portion of the photoresist mask, and to remove a portion of the residues remaining from formation of the openings in the layer of low k dielectric material. The structure is then exposed to an oxidizing plasma to remove any remaining etch residues from the openings in the layer of low k dielectric material or removal of the resist mask.

Abstract: Cleaning methods are disclosed for removing sidewall polymers from interconnect vias or trenches, wherein a wafer is exposed to a plasma comprising hydrogen and an inert gas in a plasma cleaning chamber following etch-stop etching.

Abstract: A method for stripping photoresist and/or removing post etch residues from an exposed low k dielectric layer of a semiconductor wafer in the presence or absence of copper. The method comprises creating an oxygen free plasma by subjecting an oxygen free gas to an energy source to generate the plasma having electrically neutral and charged particles. The charged particles are then selectively removed from the plasma. The electrically neutral particles react with the photoresist and/or post etch residues to form volatile gases which are then removed from the wafer by a gas stream. The oxygen free, plasma gas composition for stripping photoresist and/or post etch residues comprises a hydrogen bearing gas and a fluorine bearing wherein the fluorine bearing gas is less than about 10 percent by volume of the total gas composition.

Abstract: The formation and/or growth of dendrites emanating from Cu or Cu alloy lines into a bordering open dielectric field are prevented or substantially reduced by chemically removing a portion of the surface from the dielectric field and from between the lines after CMP by immersing the wafer in a bath containing a chemical agent. Embodiments include removing up to 60 Å of silicon oxide by immersing the wafer in an acidic solution, such as a solution of hydrofluoric acid and water.

Abstract: A method of forming a contact in an integrated circuit including forming a dielectric layer over a silicon substrate, etching a contact hole through the dielectric layer, exposing the etched contact hole to a plasma formed from a preclean gas comprising nitrogen trifluoride and helium and, thereafter, depositing a titanium layer within the contact hole by a plasma CVD process, where the plasma CVD process heats the substrate to a temperature less than or equal to 650° C.

Abstract: The present invention relates to a process for removing post-etch residues or polymers from the surface of semiconductor devices which comprises treating the semiconductor device with an aqueous ammonia or ammonium hydroxide solution, optionally containing ozone for a time sufficient to effectively remove said post-etch residues or polymers from the surface of the semiconductor device and rinsing the semiconductor device with ozonized water, i.e. water enriched with ozone, in which water is preferably deionized (ozone-DIW).

Abstract: In a water rinsing process performed after the surface of a substrate has been cleaned using a cleaning solution, a first spinning process, in which water is supplied to the surface of the substrate while the substrate is rotated at a first rotation speed, and a second spinning process, in which the substrate is rotated at a second rotation speed that is higher than the first rotation speed, are repeatedly performed alternately.

Abstract: A method for forming high quality multiple thickness oxide layers having different thicknesses by eliminating descum induced defects. The method includes forming an oxide layer, masking the oxide layer with a photoresist layer, and developing the photoresist layer to expose at least one region of the oxide layer. The substrate is then heated and descummed to remove any residue resulting from developing the photoresist. Alternatively, the photoresist layer may be cured prior to heating and descumming the substrate. The oxide layer is then etched, and the remaining photoresist is stripped before another layer of oxide is grown on the substrate.

Abstract: An improved method of forming a semiconductor device is described. The method comprises forming a dielectric layer on a substrate, forming a photoresist layer on the dielectric layer, then patterning the photoresist layer to define a region to be etched. After forming an etched region within the dielectric layer, the photoresist layer is removed and the etched region is cleaned. The etched region is cleaned by applying a buffered oxide etch dip, followed by an amine based dip.

Abstract: A method of cleaning a low-k material etched opening, comprising the following steps. A semiconductor structure having an exposed device therein is provided. An etch stop layer is formed over the semiconductor structure and the exposed device. A layer of low-k material is formed over the etch stop layer semiconductor structure and device. A patterned layer of photoresist is formed over the low-k material layer. The patterned photoresist layer is used as a mask to etch low-k material layer is etched to form an opening exposing at least a portion of the etch stop layer over the device. The patterned photoresist layer is removed by a low temperature ashing process at a temperature from about 23 to 27° C., and more preferably about 25° C. (room temperature). The exposed portion of the etch stop layer over the device is removed to expose the underlying device by a low pressure, low bias etching process at a pressure from about 8 to 12 milli-Torr and a bias power from about 25 to 35 W.

Abstract: A method for structuring at least one layer to be structured. First, a mask is applied to the layer and the layer is structured using the mask. After the structuring step, the mask is then removed, while leaving behind redepositions of the material of the layer. The redepositions of the material of the layer are removed by mechanical polishing or chemical-mechanical polishing.

Abstract: The invention relates to the field of manufacturing semiconductor devices, particularly processes directed to resist removal. In the method of the invention, the wafer temperature is maintained below approximately 210° C. to 220° C. to prevent residue formation, by controlling the temperature of a platen or paddle adjancent a wafer to be less than about 210° C. throughout plasma stripping of a resist layer disposed on the wafer. Moreover, to achieve a suitable yield and throughput at these temperatures, the flow rate of an additive to gases supplied to a plasma chamber to create an O2 plasma is controlled to thereby control and improve a resist striprate at these temperatures.

Abstract: A method of manufacturing a template having through-holes for attracting and supporting electrically conductive balls by vacuum suction is disclosed. The through-holes are formed by etching and the side walls of the through-holes are smoothed by irradiation, with laser beams, of the side walls of the through-holes. A template and metallic bumps can be formed using this method. Alternatively, the template can be formed in a two-layered structure.