Data Formatting To Improve Error Detection Correction Capability Patents (Class 714/701)
  • Patent number: 11955990
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer-storage media, for improving communication throughput despite periodic blockages. In some implementations, a method includes receiving, by a receiver and from a transmitter, code blocks transmitted according to a first set of communication parameters that includes one or more first interleaver parameters used to interleave information in the code blocks prior to transmission. Corrupted portions of at least some of the received code blocks are identified. A blockage duration and a blockage interval of a blockage of communication channel between the transmitter and the receiver are determined based on the corrupted portions of the received code blocks. A second set of communication parameters that includes one or more second interleaver parameters are determined based on the blockage duration and blockage interval.
    Type: Grant
    Filed: February 21, 2023
    Date of Patent: April 9, 2024
    Assignee: Hughes Network Systems, LLC
    Inventor: Victor Liau
  • Patent number: 11955992
    Abstract: Provided is a rate matching method and device for a Polar code. The method includes: concatenating K information bits and (N?K) frozen bits to generate a bit sequence of N bits, and encoding the bit sequence of N bits by means of a Polar code encoder with a generator matrix of size N×N to generate an initial bit sequence {S0, S1, . . . , SN?1} of N bits, where K and N are both positive integers and K is less than or equal to N; dividing a circular buffer into q parts, selecting bits from the initial bit sequence {S0, S1, . . . , SN?1} in a non-repeated manner, and writing the bits into the q parts of the circular buffer according to a predefined rule, where q=1, 2, 3 or 4; and sequentially selecting a bit sequence of a specified length from a predefined starting position in a bit sequence in the circular buffer and taking the bit sequence of the specified length as a bit sequence to be transmitted.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: April 9, 2024
    Assignee: ZTE Corporation
    Inventors: Mengzhu Chen, Jin Xu, Jun Xu
  • Patent number: 11922060
    Abstract: Apparatus and methods are disclosed, including enabling communication between a memory controller and multiple memory devices of a storage system using a storage-system interface, the multiple memory devices each comprising a device controller and a group of non-volatile memory cells, and compressing data using at least one of the device controllers prior to transfer over the storage-system interface to improve an effective internal data transmission speed of the storage system.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: March 5, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Sebastien Andre Jean
  • Patent number: 11916573
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer-storage media, for improving communication throughput despite periodic blockages. In some implementations, a method includes receiving, by a receiver and from a transmitter, code blocks transmitted according to a first set of communication parameters that includes one or more first interleaver parameters used to interleave information in the code blocks prior to transmission. Corrupted portions of at least some of the received code blocks are identified. A blockage duration and a blockage interval of a blockage of communication channel between the transmitter and the receiver are determined based on the corrupted portions of the received code blocks. A second set of communication parameters that includes one or more second interleaver parameters are determined based on the blockage duration and blockage interval.
    Type: Grant
    Filed: February 21, 2023
    Date of Patent: February 27, 2024
    Assignee: Hughes Network Systems, LLC
    Inventor: Victor Liau
  • Patent number: 11916674
    Abstract: Embodiments herein disclose conditioning traffic through multiple data paths of a Software-Defined Wide Area Network (SD-WAN). Some embodiments include monitoring a path through an SD-WAN to reach a destination node, determining a quality score for packets to the destination node on the path, determining a link utilization for the path, sending a data packet sequence to the destination node on the path, generating a forward error correction (FEC) packet for the data packet sequence, and sending the FEC packet to the destination node on the path in response to the quality score being less than a quality threshold and the link utilization being less than a high utilization threshold.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: February 27, 2024
    Assignee: Versa Networks, Inc.
    Inventors: Kapil Bajaj, Apurva Mehta
  • Patent number: 11906831
    Abstract: An electro-optical device includes a first substrate, a second substrate bonded to the first substrate, a liquid crystal layer provided between the first substrate and the second substrate, a third substrate provided on an opposite side of the first substrate from the liquid crystal layer, and a frame configured to house the first substrate, the second substrate, and the third substrate. The frame includes a facing surface facing, via an adhesive layer, a first surface on an opposite side of the third substrate from the liquid crystal layer. The third substrate is larger than the first substrate. The frame and only the third substrate among the first substrate, the second substrate, and the third substrate are bonded to each other.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: February 20, 2024
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Suguru Uchiyama, Kazunari Sakamoto, Yasuhiro Takeuchi
  • Patent number: 11888770
    Abstract: This disclosure provides systems, methods, and apparatuses for wireless communication. An example apparatus selects a first resource unit (RU) of a plurality of RUs for transmitting a physical (PHY) layer convergence protocol (PLCP) protocol data unit (PPDU) over a wireless medium. The first RU may include a set of contiguous tones occupying a first frequency bandwidth. The plurality of RUs may collectively span a second frequency bandwidth greater than the first frequency bandwidth. The apparatus maps the set of contiguous tones of the first RU to a set of non-contiguous tones distributed across the second frequency bandwidth using a tone mapping vector and a tone mapping offset associated with the first RU. The apparatus transmits the PPDU over the set of non-contiguous tones distributed across the second frequency bandwidth.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: January 30, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Lin Yang, Bin Tian
  • Patent number: 11838048
    Abstract: A regen node is described. The regen node includes a coherent receiver, a control module and a coherent transmitter. The coherent receiver has circuitry to convert a first optical signal received from an upstream node in an optical layer of an optical network to a first digital data stream in a digital layer having a first FEC frame and a data traffic. The control module extracts a first fault signal from the first FEC frame; generates a second fault signal based at least in part on the first fault signal; and encodes the second fault signal within a second FEC frame with the data traffic into a second digital data stream on the digital layer. The coherent transmitter has circuitry to convert the second digital data stream into a second optical signal on the optical layer and to transmit the second optical signal to a downstream node.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: December 5, 2023
    Assignee: Infinera Corporation
    Inventors: Rajan Rao, Ramakrishna Pratapa, Ramnarayan Srinivasan, Ashok Kunjidhapatham, Radhakrishna Valiveti
  • Patent number: 11804926
    Abstract: An apparatus includes an encoder configured to encode source data and generate a codeword composed of a plurality of bits, and an interleaver configured to perform, on the codeword, block-based interleaving including a plurality of sub-blocks, wherein the interleaver is configured to generate a first reference input index of a first reference sub-block from among the sub-blocks, generate, based on the first reference input index, a first input index of a first sub-block from among the sub-blocks, the first sub-block being arranged to be adjacent to the first reference sub-block in a first direction, and store, in an internal memory, bits corresponding to the first reference sub-block and the first sub-block, according to the first reference input index and the first input index, respectively.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: October 31, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yeonjoon Choi, Sehyoung Kim
  • Patent number: 11695432
    Abstract: There is provided an apparatus including an acquisition unit that acquires an information block generated from transmission data for a user and subjected to error correction coding, and an interleaving unit that interleaves a bit sequence of the information block using an interleaver unique to the user. The interleaving unit interleaves the bit sequence by interleaving each of two or more partial sequences obtained from the bit sequence.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: July 4, 2023
    Assignee: SONY GROUP CORPORATION
    Inventors: Ryota Kimura, Yifu Tang
  • Patent number: 11659581
    Abstract: Embodiments of the present invention provide a method and device for multi-AP beamforming (e.g., nulling) and spatial reuse to mitigate interference and improve the performance of MAP wireless networks. According to one embodiment, multiple APs agree to collaborate in multi-AP beamforming, transmissions of received PDDUs are measured to determine interference information, the APS generate interference maps, and the APs perform joint and Multi-AP beamforming in a first and second BSS to avoid/mitigate interference of the MAP wireless network. An RTS and CTS frame exchange sequence can be performed prior to Multi-AP beamforming between BSSs using a flag/indicator in the RTS frame to indicate coordinated transmission, or an UL trigger frame can be used to indicate a coordinated UL transmission.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: May 23, 2023
    Assignee: Mediatek Singapore PTE. LTD.
    Inventors: James June-Ming Wang, Yongho Seok, James Chih-Shi Yee, Jianhan Liu, Thomas Edward Pare, Jr.
  • Patent number: 11622101
    Abstract: A transmission processing apparatus includes a generation unit configured to generate data to be transmitted, based on an image captured by an imaging apparatus, a transmission and reception processing unit configured to receive data transmitted from a second transmission processing apparatus which is in cascade connection to the transmission processing apparatus and to transmit the received data, and a determination unit configured to determine, depending on a type of the data transmitted from the second transmission processing apparatus, whether to transmit the data generated by the generation unit in an order corresponding to the cascade connection or transmit the data generated by the generation unit in parallel with the data transmitted from the second transmission processing apparatus.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: April 4, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventor: Akihiko Yushiya
  • Patent number: 11582073
    Abstract: A system comprising a processing circuitry configured to: obtain a first ordered sequence of symbols associated with a corresponding second ordered sequence of transmitted symbols and including one or more errors, the errors being discrepancies between given symbols of the first ordered sequence and corresponding symbols of the second ordered sequence; determine, for each symbol of the first ordered sequence of symbols, an estimated transmitted symbol, utilizing a Decision Feedback Equalizer (DFE); and determine if the estimated transmitted symbol of a given symbol of the first ordered sequence of symbols, satisfies a saturation threshold condition; and determine an error hypothesis identifying one or more of the errors by comparing the estimated transmitted symbol of at least one symbol of the first ordered sequence of symbols with one or more pairs of thresholds.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: February 14, 2023
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventor: Amir Dabbagh
  • Patent number: 11575469
    Abstract: Multi-bit feedback protocol systems and methods are described herein. A method can include correcting, by a sink, an error in a data packet using a multi-bit feedback protocol, the data packet being transmitted over a wireless link to a sink by a source; determining that the multi-bit feedback protocol has failed; and reverting back to an automatic repeat request protocol when the multi-bit feedback protocol has failed.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: February 7, 2023
    Assignee: Aira Technologies, Inc.
    Inventors: Anand Chandrasekher, RaviKiran Gopalan, Sandeep Kesireddy, Arman Rahimzamani
  • Patent number: 11553025
    Abstract: A method or system configured for receiving a first single data stream representing a first multimedia file, the first single data stream including an interleaved sequence of data elements of a plurality of media, and/or transmitting a second single data stream representing a second multimedia file, the second single data stream including an interleaved sequence of data elements of said plurality of media, where the second multimedia file differs from said first multimedia file by at least one data element of a selected medium extracted from said first multimedia file, and/or by at least one data element of a selected medium added to the first multimedia file, and/or by at least one data element of a selected medium added to the first multimedia file being a converted version of the at least one data element of a selected medium extracted from the first multimedia file.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: January 10, 2023
    Assignee: GLIDE TALK LTD.
    Inventors: Liron Hertz, Roi Ginat
  • Patent number: 11522609
    Abstract: A communication device includes an interleaving unit that determines an interleaving length of transmit data to be transmitted through free-space optical communication, and interleaves the transmit data based on the determined interleaving length, and a shaping unit that shapes the interleaved transmit data so as to make the interleaving length detectable on a receiving side of the free-space optical communication.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: December 6, 2022
    Assignee: SONY GROUP CORPORATION
    Inventor: Shinji Ohta
  • Patent number: 11520563
    Abstract: Disclosed are an apparatus and method for transforming a matrix, and a data processing system. The apparatus may include: a first shift unit, configured to receive matrix data and perform first cyclic shift on the matrix data to generate first data; a cache unit, configured to write each row of data into the cache unit in the first data thereto in an order different from the order of respective data in the row of data to store the first data as second data; and a second shift unit, configured to read the second data from the cache unit and perform second cyclic shift on the second data to generate transformed matrix data.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: December 6, 2022
    Inventor: Xiaozhang Gong
  • Patent number: 11513894
    Abstract: Various implementations described herein relate to systems and methods for decoding data stored in a non-volatile storage device, including determining error candidates and determining whether at least one first error candidate from the error candidates is found based on two of the component codes agreeing on a same error candidate. In addition, whether at least one second error candidate is found based on two of the component codes agreeing on a same error candidate is determined in response to implementing a suggested correction at one of the error candidates. Errors in the data are corrected based on at least one of whether the at least one first error candidate is found or whether the at least one second error candidate is found.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: November 29, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Avi Steiner, Amir Nassie, Anat Rot, Ofir Kanter, Hanan Weingarten
  • Patent number: 11487628
    Abstract: Systems for rapidly transferring and, as needed, recovering large data sets and methods for making and using the same. In various embodiments, the system advantageously can allow data to be transferred in larger sizes, wherein data may be easily recovered from multiple regions and wherein latency is no longer an issue, among other things.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: November 1, 2022
    Assignee: R-Stor Inc.
    Inventors: John Edward Gerard Matze, Anthony P. Gaughan, Damian Kowalewski
  • Patent number: 11451245
    Abstract: Aspects of the disclosure relate to wireless communication devices configured to encode information blocks to produce code blocks and interleave the code blocks utilizing an interleaver including a plurality of rows and a plurality of columns. In some examples, the interleaver includes a right isosceles triangle-shaped matrix of rows and columns. In other examples, the interleaver includes a rectangle-shaped matrix of rows and columns.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: September 20, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Jian Li, Changlong Xu, Jing Jiang, Hao Xu, Jilei Hou
  • Patent number: 11431441
    Abstract: Systems, methods, and instrumentalities are disclosed for priority-based channel coding for control information. A wireless transmit/receive unit (WTRU) may sort control information associated with a first control information type into a first control information group and the control information associated with a second control information type into a second control information group, for example, based on respective priorities associated with the first and second control information types. The WTRU may group one or more bits of the first control information group into a first bit level control information group and a second bit level control information group based on priority. The WTRU may selectively apply a cyclic redundancy check (CRC) to the first control information group, the second control information group, the first bit level control information group, and/or the second bit level control information group.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: August 30, 2022
    Assignee: IDAC Holdings, Inc.
    Inventors: Kyle Jung-Lin Pan, Fengjun Xi, Chunxuan Ye
  • Patent number: 11412263
    Abstract: Arithmetic coders such as CABAC have high complexity. Some video coding systems limit the ratio of bins coded by the arithmetic coder to bits of encoded data. In order to do so, extra padding or stuffing data is added to the bitstream. Embodiments include ways order to reduce the overhead of such padding, embodiments include ways of processing a video bitstream without including the padding data. For example a video encoder or decoder may code a syntax element of the video bitstream for a unit of video data that indicates a number of padding bits and code the unit of video data without coding (encoding or decoding) the padding bits in the video bitstream.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: August 9, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Muhammed Zeyd Coban, Adarsh Krishnan Ramasubramonian, Vadim Seregin, Marta Karczewicz
  • Patent number: 11404136
    Abstract: Symbols interleaved among a set of codewords can provide an error correction/detection capability to a dual in-line memory module (DIMM) with memory chips having a comparatively larger bus width. Data corresponding to a set of multibit symbols and received from one or more memory devices can be interleaved/distributed with other bits of at least one codeword.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: August 2, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Paolo Amato, Marco Sforzin, Stephen S. Pawlowski
  • Patent number: 11374697
    Abstract: A feedback method, an apparatus, and a system, which relate to the field of communications technologies. The method includes: a terminal device receiving configuration information sent by a network device, where the configuration information is used to indicate K time sequence relationships, the K time sequence relationships are respectively used for HARQ feedback on K downlink frequency domain resources, and K is a positive integer greater than or equal to 2; and the terminal device sending HARQ feedback information to the network device, where a quantity of downlink control channel monitoring occasions corresponding to the HARQ feedback information is determined based on the K time sequence relationships. According to the foregoing solution, the network device and the terminal device have a unified understanding on the HARQ feedback information. In this way, system robustness is improved.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: June 28, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yibin Zhuo, Jinlin Peng
  • Patent number: 11368164
    Abstract: An interleaver for combining at least two incoming signals into an analog output signal includes at least a first signal path and a second signal path. Each signal path has: an input terminal, a first gain stage for multiplying a signal coming from the input terminal with a first gain (a) to obtain a first signal, a mixer and a second gain stage for multiplying a signal coming from the input terminal with a second gain (b) before or after mixing it with a clock signal to obtain a second signal, an adder for adding the first and second signal to obtain an output signal of the signal path wherein the first and second gain are different from zero. The interleaver comprises an adder for adding the output signals from the signal paths.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: June 21, 2022
    Assignees: UNIVERSITEIT GENT, IMEC VZW
    Inventors: Guy Torfs, Hannes Ramon, Xin Yin
  • Patent number: 11347407
    Abstract: Drive health information is collected for each one of the data storage drives in one or more RAID groups of data storage drives, and is used to calculate a faultiness level of each data storage drive in the RAID group(s). A suitable RAID level for configuration of at least one RAID group may be generated based on the faultiness levels of the data storage drives contained in the RAID group. A faultiness-balanced distribution of the data storage drives across multiple RAID groups may be generated based on the faultiness levels of individual data storage drives. The data storage drives may be automatically redistributed across the multiple RAID groups according to the faultiness-balanced distribution of the data storage drives.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: May 31, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Nickolay Dalmatov, Mikhail Danilov
  • Patent number: 11303304
    Abstract: A receiver is arranged for receiving a signal comprising an interleaved symbol stream. The receiver comprises a convolutional deinterleaver comprising a plurality of delay portions each of which is arranged to delay symbols from the symbol stream from an input to an output by a different amount, the delay portions being arranged in a sequence. An input selector is configured to input the symbols from the symbol stream to the delay portions so that successive symbols are input in accordance with the sequence of the delay portions. An output selector configured to read the symbols from the delay portions by successively selecting the symbols from the outputs of the delay portions in accordance with the sequence of the delay portions to form a deinterleaved symbol stream.
    Type: Grant
    Filed: November 23, 2018
    Date of Patent: April 12, 2022
    Assignee: SATURN LICENSING LLC
    Inventor: Matthew Paul Athol Taylor
  • Patent number: 11290620
    Abstract: A system includes a processor and a memory. The memory stores instructions executable by the processor to receive first and second media units with respective first and second time stamps that are assigned based on a first clock cycle time and a data transmission rate, and to assign an adjusted time stamp to the second media unit based on the first clock cycle time, a second clock cycle time, the first time stamp, and the data transmission rate.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: March 29, 2022
    Assignee: Sling Media Pvt. Ltd.
    Inventor: Amit Kumar
  • Patent number: 11277151
    Abstract: Aspects of the present disclosure relate to low density parity check (LDPC) coding utilizing LDPC base graphs. Two or more LDPC base graphs may be maintained that are associated with different ranges of overlapping information block lengths. A particular LDPC base graph may be selected for an information block based on the information block length of the information block. Additional metrics that may be considered when selecting the LDPC base graph may include the code rate utilized to encode the information block and/or the lift size applied to each LDPC base graph to produce the information block length of the information block.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: March 15, 2022
    Assignee: Qualcomm Incorporated
    Inventors: Joseph Binamira Soriaga, Gabi Sarkis, Shrinivas Kudekar, Thomas Richardson, Vincent Loncke
  • Patent number: 11249844
    Abstract: A memory system includes: an error correction code generation circuit suitable for generating an error correction code including one or more symbols for write data including a plurality of symbols, to output a codeword including the write data and the error correction code; a first data mapping circuit suitable for mapping the symbols of the codeword to a dataword; and a memory suitable for storing the dataword.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: February 15, 2022
    Assignee: SK hynix Inc.
    Inventors: Young-Ook Song, Hyun-Seok Kim
  • Patent number: 11249837
    Abstract: A flit-based packetization approach is used for transmitting information between electronic components. A protocol stack can generate transaction layer packets from information received from a transmitting device, assemble the transaction layer packets into one or more flits, and protect the flits with a flit-level cyclic redundancy check (CRC) scheme and a flit-level forward error correction or parallel-forward error correction (FEC) scheme. Flit-level FEC schemes can provide improved latencies and efficiencies over per-lane FEC schemes. To improve retry probability, flits can contain information indicating whether immediately preceding flits are null flits. Receivers can avoid sending a retry request for a corrupted flit if a seceding flit indicates the corrupted flit is a null fit. Parity flits can be used to protect groups of flits and correct single-flit errors.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: February 15, 2022
    Assignee: Intel Corporation
    Inventor: Debendra Das Sharma
  • Patent number: 11212753
    Abstract: A method is disclosed for a wireless communication node configured for operation in accordance with a listen-before-talk (LBT) procedure. The method comprises—for an upcoming transmission—performing channel sensing to determine an interference level experienced by the wireless communication node, determining a maximum transmission power level for the upcoming transmission responsive to the determined interference level, and selecting at least one of a coding rate and a modulation to be used for the upcoming transmission responsive to the determined maximum transmission power level. According to some embodiments, the method further comprises preparing a plurality of transmission packet variants before performing the channel sensing, wherein each transmission packet variant is associated with a respective transmission power level.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: December 28, 2021
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (publ)
    Inventor: Leif Wilhelmsson
  • Patent number: 11184031
    Abstract: The interleaver 104 interleaves first to Nth code words. The OFDM modulation circuit 105 converts the interleaved first to Nth code words into OFDM signals. The transmission RF circuit 106 transmits the OFDM signals. The number of data symbols included in the first code word is less than the number of data symbols included in the second code word. The interleaver 104 writes the first code word to the Nth code word in ascending order and starts reading from the second code word.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: November 23, 2021
    Assignee: Panasonic Intellectual Property Corporation Of America
    Inventors: Hiroyuki Motozuka, Takenori Sakamoto
  • Patent number: 11153132
    Abstract: A device including an equalizer that includes a first input configured to receive an input signal, a second input configured to receive a reference signal, and a third input configured to receive an adjustment signal. The equalizer also includes a first output configured to transmit a corrected signal, wherein the corrected signal is generated based on data outputs controlled via the input signal, the reference signal, and a clock signal, wherein the data outputs are modified based on the first adjustment signal, wherein corrected signal offsets inter-symbol interference on the input signal based on a data bit received at the first input prior to reception of the input signal.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: October 19, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Jennifer E. Taylor, Raghukiran Sreeramaneni
  • Patent number: 11139918
    Abstract: Various embodiments provide an interleaving method, to improve error correction performance of a polar code. In these embodiments, a first bit sequence is obtained. The first bit sequence includes L number of bits, and L is a positive integer. The L number of bits are then written into an interleaving matrix according to a preset write rule. The interleaving matrix includes C rows and R number of columns. C and R are positive integers. The L number of bits can be read from the interleaving matrix according to a preset read rule to obtain a second bit sequence. The second bit sequence includes L number of bits; and sending the second bit sequence.
    Type: Grant
    Filed: March 8, 2020
    Date of Patent: October 5, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yue Zhou, Guijie Wang, Rong Li, Yinggang Du
  • Patent number: 11063666
    Abstract: A communication device includes an interleaving unit that determines an interleaving length of transmit data to be transmitted through free-space optical communication, and interleaves the transmit data based on the determined interleaving length, and a shaping unit that shapes the interleaved transmit data so as to make the interleaving length detectable on a receiving side of the free-space optical communication.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: July 13, 2021
    Assignee: SONY CORPORATION
    Inventor: Shinji Ohta
  • Patent number: 11063693
    Abstract: A loss correction encoding device having an improved capability of loss correction using LDPC-CC includes a rearranging unit that rearranges information data contained in n information packets according to the constraint length Kmax and the encoding rate (q?1)/q of a check polynomial of the loss correction code used in a loss correction encoding unit. Specifically, the rearranging unit rearranges the information data in such a way that continuous Kmax×(q?1) pieces of information data after rearrangement are contained in different information packets. The rearranging unit distributes the information data to information blocks from n information packets, where n satisfies the formula Kmax×(q?1)?n.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: July 13, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Yutaka Murakami, Shutai Okamura
  • Patent number: 11062743
    Abstract: A system and method for providing a configurable timing control of a memory system is provided. One system has a first interface to receive a DIMM clock and configuration information, a second interface to a first data bus, and a third interface to a second data bus. The system further has flip-flops, a multiplexer coupled to the flip-flops, a first control block for controlling to hold an input data within the flip-flops, and a second control block for controlling a timing of an output data from the flip-flops via the multiplexer with a programmable delay. The input data is received via the second interface. The programmable delay is received via the first interface. The output data is sent out with the timing delay via the third interface.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: July 13, 2021
    Assignee: Rambus, Inc.
    Inventors: Michael L. Takefman, Maher Amer, Claus Reitlingshoefer, Riccardo Badalone
  • Patent number: 11036709
    Abstract: In a general aspect, a method includes inserting a record in a partitioned fact table of a star schema data mart. Inserting the record can include determining a first hash value from a first dimension value of the record and determining a first set of candidate partitions from the first hash value. The method can further include determining a second hash value from a second dimension value of the record and determining a second set of candidate partitions from the first hash value. The method can further include comparing the first set of candidate partitions with the second set of candidate partitions to determine a common partition and inserting the record into the common partition.
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: June 15, 2021
    Assignee: SAP SE
    Inventor: Christian Bensberg
  • Patent number: 11012591
    Abstract: A method implemented on a computing device including at least one processor and a storage for synchronizing video transmission with physical layer. The method includes determining a first time point corresponding to a frame header of a video frame, determining a second time point corresponding to a frame header of a physical layer frame based at least in part on the first time point, and starting transmitting the video frame at the second time point.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: May 18, 2021
    Assignee: SZ DJI TECHNOLOGY CO., LTD.
    Inventor: Xiaodong Wang
  • Patent number: 11005818
    Abstract: Some embodiments described herein relate managing communications between an origin and a destination using end-user and/or administrator configurable virtual private network(s) (VPN(s)). A first VPN that defines a first data path between an origin and a destination can be defined at a first time. A second VPN that defines a second, different data path between the origin and the destination can defined at a second time. Each packet sent across the first VPN and each packet sent across the second VPN can follow the same data path for that VPN, such each packet can be sent across the first VPN or the second VPN in the order it was received, and the transition between the first VPN and the second VPN can be “seamless,” and communications between the origin and the destination are not disrupted between the first time period and the second time period.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: May 11, 2021
    Assignee: NetAbstraction, Inc.
    Inventor: Ira A. Hunt, IV
  • Patent number: 10997175
    Abstract: A method for performing row qualification in database table retrieval and join operations. This method, referred to as bulk qualification, evaluates conditions on multiple rows in a database table at the same time, providing more efficient utilization of memory bandwidth and CPU throughput.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: May 4, 2021
    Assignee: Teradata US, Inc.
    Inventors: Bhashyam Ramesh, Tirupathi Prabhu Bellapukonda, Mohan Kumar KJ, Vamshi Krishna Vangapalli
  • Patent number: 10985914
    Abstract: A key generation device includes a generation circuit, a concealment processing unit, and a cryptography processing unit. The generation circuit generates a value dependent on hardware. When acquiring a concealed cryptographic key, the concealment processing unit generates first data by performing a mask process to the concealed cryptographic key by using the value generated by the generation circuit, generates second data by decoding the first data by a first error correction decoding method, and generates a cryptographic key by decoding the second data by a second error correction decoding method. When acquiring the concealed cryptographic key and a plain text or an encrypted text, the cryptography processing unit acquires the cryptographic key corresponding to the concealed cryptographic key from the concealment processing unit, and encrypts the plain text or decrypts the encrypted text by using the cryptographic key.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: April 20, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Yasuo Noguchi, Takeshi Shimoyama
  • Patent number: 10890540
    Abstract: A method including selecting a shaped feature from a set of shaped features, each shaped feature of the set of shaped features having a set of points on a perimeter of the shape of the shaped feature, creating a plurality of shape context descriptors for the selected shaped feature, wherein each shape context descriptor provides an indication of a location in a shape context descriptor framework of a first focus point of the set of points in relation to a second point of the set of points, and identifying a shaped feature from the set of shaped features having a same or similar shape as the selected shaped feature based on data from the plurality of shape context descriptors.
    Type: Grant
    Filed: March 2, 2018
    Date of Patent: January 12, 2021
    Assignee: ASML Netherlands B.V.
    Inventors: Adrianus Cornelis Matheus Koopman, Scott Anderson Middlebrooks, Willem Marie Julia Marcel Coene
  • Patent number: 10848224
    Abstract: A method and an apparatus for reporting channel state information (CSI) by a user equipment in a wireless communication system. According to the present invention, the UE receives configuration information related to reporting of the CSI from a base station, wherein the configuration information may include a threshold value related to a specific condition for receiving the CSI and the CSI may comprise a first part and a second part. A method and an apparatus may be provided in which the UE receives a first reference signal for channel measurement from the base station, measures a channel based on the first reference signal, and reports the CSI of the measured channel to the base station and some or all of the second part of the CSI is omitted.
    Type: Grant
    Filed: October 1, 2018
    Date of Patent: November 24, 2020
    Assignee: LG Electronics Inc.
    Inventors: Haewook Park, Kijun Kim, Jiwon Kang
  • Patent number: 10831596
    Abstract: A first tier of error correcting code operations on a data block may be performed. The first tier of error correcting code operations on the data block may be determined to be associated with an unsuccessful correction of an error of the data block. Responsive to determining that the first tier of error correcting code operations on the data block are associated with the unsuccessful correction of the error of the data block, a remix operation on the data block to change a logical to physical association of the data block from a first logical association to a second logical association may be performed.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: November 10, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Samuel E. Bradshaw
  • Patent number: 10790855
    Abstract: Field error correction coding is particularly suitable for applications in non-volatile flash memories. We describe a method for error correction encoding of data to be stored in a memory device, a corresponding method for decoding a codeword matrix resulting from the encoding method, a coding device, and a computer program for performing the methods on the coding device, using a new construction for high-rate generalized concatenated (GC) codes. The codes, which are well suited for error correction in flash memories for high reliability data storage, are constructed from inner nested binary Bose-Chaudhuri-Hocquenghem (BCH) codes and outer codes, preferably Reed-Solomon (RS) codes. For the inner codes extended BCH codes are used, where only single parity-check codes are applied in the first level of the GC code. This enables high-rate codes.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: September 29, 2020
    Assignee: HYPERSTONE GMBH
    Inventors: Juergen Freudenberger, Jens Spinner, Christoph Baumhof
  • Patent number: 10778253
    Abstract: An embodiment method includes: performing balancing processing on a data stream that includes a plurality of sub-data stream segments, and performing segment de-interleaving on a data stream obtained after the balancing processing. The method further includes separately performing forward error correction (FEC) decoding on each sub-data stream segment in a data stream obtained after the segment de-interleaving. The method further includes performing, according to a balancing termination state of each sub-data stream segment obtained after previous balancing processing, balancing processing on each sub-data stream segment obtained after the FEC decoding, and performing FEC decoding on the data stream obtained after balancing processing is performed on each sub-data stream segment. When it is determined that a preset iteration termination condition is met, the method includes outputting the data stream obtained after the FEC decoding.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: September 15, 2020
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Zhiyu Xiao, Ling Liu, Liangchuan Li
  • Patent number: 10769012
    Abstract: The present invention relates to a memory with error correction function, comprising a data array, an ECC array, a flag bit array, an ECC encoding module, an ECC decoding module, a flag bit generation module and a flag bit detection module; wherein: the flag bit generation module is configured, when data is being written, to generate a flag bit and an encode enable signal, the flag bit being stored in the flag bit array, and the encode enable signal being used to control the operation of the ECC encoding module; the ECC encoding module is configured to encode the data to be written according to the ECC algorithm preset therein so as to generate parity bits; the ECC array is configured to store the generated parity bits; the flag bit detection module is configured, when data is being read, to detect the flag bit and control the operation of the ECC decoding module; and the ECC decoding module is configured to detect and correct erroneous data using the parity bits from the ECC array and the data from the data
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: September 8, 2020
    Assignee: XI'AN UNIIC SEMICONDUCTORS CO., LTD.
    Inventor: Alessandro Minzoni
  • Patent number: 10749732
    Abstract: The present invention is directed to data communication. In certain embodiments, the present invention provides switching mechanism for choosing between redundant communication links. Data received from a first set of communication links are processed to have alignment markers removed, and first figure of merit value is determined based on the data without alignment markers. Similarly, a second figure of merit value is determined for the data received from the second set of communication links. A switch selects between the first set of communication links and the second set of communication links based on their respective figure of merit values. Alignment markers are inserted into the data transmitted through the selected set of data links. There are other embodiments as well.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: August 18, 2020
    Assignee: INPHI CORPORATION
    Inventors: Arash Farhoodfar, Jitendra Swarnkar, Michael Duckering, Andre Sczapanek, Scott Feller, Shaun Lytollis