Abstract: A bus system for a process system, having a first bus subscriber which transmits bus messages and having at least one first bus subscriber which receives bus messages, wherein the transmitting first bus subscriber and the receiving first bus subscriber are connected to one another via a first data bus, wherein the transmitting first bus subscriber is designed such that it transmits control commands to the receiving first bus subscriber, wherein the receiving first bus subscriber is designed such that it executes the control commands of the transmitting first bus subscriber and achieves the object of providing a bus system that is designed to be fail-safe in a special way.

Abstract: Systems, devices, and methods for generating a unique fingerprint are described herein. For example, an example integrated circuit (IC) chip includes a physically unclonable function (PUF) and an auxiliary circuit. The PUF is a hybrid Boolean network. Additionally, the auxiliary circuit is configured to receive a transient response enable signal.

Abstract: A method and a system for transmitting enforceable instructions in a vehicle control (VC) system includes receiving, by a cyclic redundancy check (CRC) calculator, at least one enforceable instruction from vehicle systems. The CRC calculator calculates at least one enforceable instruction CRC based at least partly on the at least one enforceable instruction and transmits the at least one enforceable instruction CRC to a back office server of the VC system and/or an on-board system of a vehicle. Methods for cyclic redundancy check (CRC) hazard mitigation in a vehicle control (VC) system and verifying enforceable instruction data on-board a vehicle are also disclosed.

Abstract: A controller includes a port via which a control command is output to an industrial equipment at every control cycle, a clock configured to generate a control clock based on which the control cycle is generated, and a time counter configured to count a time counter value at every cycle that is equal to the control cycle.

Abstract: A method includes, in one non-limiting embodiment, sending a request from a mass memory storage device to a host device, the request being one to allocate memory in the host device; writing data from the mass memory storage device to allocated memory of the host device; and subsequently reading the data from the allocated memory to the mass memory storage device. The memory may be embodied as flash memory, and the data may be related to a file system stored in the flash memory. The method enables the mass memory storage device to extend its internal volatile RAM to include RAM of the host device, enabling the internal RAM to be powered off while preserving data and context stored in the internal RAM.

Abstract: Various implementations described herein relate to systems and methods for detecting soft errors, including but not limited to, errors introduced after reading a codeword from a non-volatile memory, and before providing data to a host. Embodiments can include decoding the codeword from the non-volatile memory to obtain at least input data, and determining validity of the input data using a first signature after processing the input data through a data path. If it is determined that the input data is valid using the first signature, the input data is sent to a host.

Abstract: A method for monitoring an ABS control procedure in an electrically controllable brake system in a vehicle includes reading in input signals, wherein based on the input signals it is possible to derive currently prevailing control variables for the ABS control procedure and ABS control parameters that relate to a brake slip-controlled actuation of an ABS control valve of the brake system. The method further includes checking whether it follows that an activation of any ABS control valve that is allocated to a wheel of the vehicle is requested, and whether it follows that an ABS brake slip incident is present at at least a first wheel of the vehicle, and/or whether, based on the ABS control parameters, it follows that further ABS control valves, which are allocated at least to one second wheel of the vehicle, implement correctly a brake slip-controlled activation.

Abstract: The present disclosure provides a photodynamic energy electronic label, a working method thereof, a managing method and a managing apparatus thereof. The photodynamic energy electronic label includes a photodynamic energy converter configured to convert light energy into electric energy, and a triggering circuit connected with the photodynamic energy converter and configured to send out a triggering signal to enable the photodynamic energy electronic label to be in a working state when an output of the photodynamic energy converter reaches a set condition.

Abstract: Discrete logic safety systems for smart process control devices are disclosed. A discrete logic safety system includes a heartbeat monitor to be operatively coupled to a processor of the process control device to monitor a first condition of the processor, a sensor monitor to be operatively coupled to a sensor of the process control device to monitor a second condition of the sensor, and first discrete logic operatively couple to the heartbeat monitor and the sensor monitor to generate a failure indication associated with the process control device based on the first condition or the second condition.

Abstract: A system, method, and computer program product are provided for redirecting internet relay chat (IRC) traffic identified utilizing a port-independent algorithm and controlling IRC based malware. In use, IRC traffic communicated via a network is identified utilizing a port-independent algorithm. Furthermore, the IRC traffic is redirected to a honeypot.

Abstract: For the operation of at least one non-safety-critical application process and at least one safety-critical application process, the invention proposes a data processing and transmission system with a data transmission network, at least one non-safety-related network element linked to the non-safety-critical application process and connected to the network, and with at least one safety-related network element linked to the safety-critical application process, as well as with at least one master unit connected to the network, and a server unit connected to the network separately from the master unit, wherein the safety-related server unit controls the at least one safety-critical application process, specifically by processing safety-relevant data necessary for controlling the safety-critical application process and by organizing the transmission of the safety-relevant data over the network by means of at least one of the network elements and/or the master unit.

Abstract: Disclosed are a security management method in a virtualized environment, virtual server management system, and management server capable of improving security in the virtualized environment. A management server (101) stores virtual server management information for associating virtual servers (111), virtualization mechanism units (113), and virtual disks (117) in a storage unit, makes an inquiry to the virtualization mechanisms as to the operating states of whether the virtual servers are active or paused, and if a detection is made as a result of the inquiry that a state is paused, the virtual disk assigned to the paused virtual server is identified on the basis of the virtual server management information, and a virus scan is started for the identified virtual disk.

Abstract: A target computing environment is secured by a hardware trust anchor that provides a trust state of the target computing environment based upon a security audit of the target computing environment. And diagnosing the target computing environment can be diagnosed by the hardware trust anchor according to the security diagnostic information.

Abstract: Device and method for controlling caches, comprising a decoder configured to decode additional information of datasets retrievable from a memory, wherein the decoded additional information is configured to control whether particular ones of the datasets are to be stored in a cache.

Abstract: An accumulative repeat encoder can facilitate encoding data written to memory, such that parity data can be generated in accordance with a low-density parity-check (LDPC) code. The original data and associated parity data can be stored in memory. During a read operation, a decoder component can utilize the parity data based on the LDPC code to facilitate decoding the data being read from memory. The decoder component can be iterative and can provide one or more decoding results based on certain probability calculations as to the values of the read data. The decoder component can analyze a decoding result and reference a parity-check matrix structured in accordance with the LDPC code to determine the accuracy of the decoding result. If the decoding result attains a desired accuracy, the decoding result can be representation of the original data and can be provided as an output.

Abstract: The invention is directed to a system for securing an integrated circuit chip used in an electronic device by utilizing a circuit or other entity to produce physically unclonable functions (PUF) to generate a security word, such as an RSA public or private key. A PUF, according to its name and configuration, performs functions that are substantially difficult to be duplicated or cloned. This allows the invention to provide a unique and extremely secure system for authentication. In operation, the stored parameters can be used to more efficiently and quickly authenticate the device without the need to run the burdensome security key generation processes without compromising the level of security in the device. Such a system can be used to substantially eliminate the time to produce security keys when a user needs to authenticate the device at power up or other access point.

Abstract: A system-on-chip (SoC) application-specific integrated circuit (ASIC) includes a processor, a finite state machine (FSM), and a security mechanism. The processor exposes debugging ports. The FSM permits permit instructions to be externally input to the debugging ports and data to be externally output from the debugging ports. The security mechanism prevents access to at least a subset of the debugging ports unless a security code externally input via a security interface of the security mechanism matches a predetermined internally stored security code. Additionally or alternatively, the security mechanism prevents at least a subset of the instructions from being processed unless a security code externally input via a security code instruction asserted on the debugging ports matches the predetermined internally stored security code.

Abstract: A method is described for transferring data from an unsecured computer to a secured computer. The method includes transmitting the data and then receiving the data. Next, it is determined if errors were introduced when the data was transmitted by the unsecured computer or received by the secured computer. If an error was introduced when the data was transmitted or received, the data is retransmitted.

Abstract: An optical disc signal processing circuit that includes a read data input unit configured to write read data into a buffer memory, the read data being subjected to a scramble process; an error correction processing unit configured to apply an error correction process to the read data read from the buffer memory, the error correction process being a process of performing error correction with an error correction code, and to write into the buffer memory the read data subjected to the error correction process; an external device interface unit configured to read from the buffer memory the read data subjected to the error correction process and apply a descramble process thereto; and a memory copy processing unit configured to read from the buffer memory the read data and apply the descramble process thereto, and to write into the buffer memory the read data subjected to the descramble process.

Abstract: Disclosed is a signal processor including a serial-to-parallel converter inputting serial digital video signals for n channels and converting the serial digital video signals for respective channels into parallel digital video signals. The signal processor further includes a frame-synchronization scrambler scrambling predetermined bits of the parallel digital video signals and storing the initial values in the auxiliary data section as auxiliary data; and a self-synchronization scrambler scrambling the parallel digital data for respective channels; and a multiplexer multiplexing the parallel digital data for respective channels.

Abstract: The invention relates to a method for an operator to have remote control over the use of reception equipment in a digital data broadcasting network. This method comprises the following steps: a—defining a set of tests that can be remotely activated in said reception equipment and the results of which can be used to identify at least one particular use of at least one part of the reception equipment, b—defining a set of actions that can be executed in said reception equipment designed to control operation of said equipment, c—associating at least one action defined in step b), with each test defined in step a), d—remotely activating by the operator at least one test among the tests defined in step a).