Abstract: A sensor device (20) comprises a sensor package (22) having a cavity (24) formed therein, a sensor die (26) mounted on a bottom surface (28) of the cavity (24) and a protective coating (30) formed over the sensor die in the cavity. The protective coating (30) is formed from a material, preferably a polymer material, which is arranged to have a graduated cross-linking density such that the material at the top of the cavity (24) has a high density of cross-linking and the material at the bottom of the cavity (24), which material is in contact with the sensor die, has a low density of cross-linking.

Abstract: A etcher (10) has an inner chamber (22) that is in communication with a collection chamber (17). A cover (33) is made from a substrate (11) and an outer housing (34). The cover (33) is attached to the etcher (10) so that the substrate (11) is suspended over the inner chamber (22). A recirculating system (29) is used to pass an etchant through a filter, into the inner chamber (22), across the substrate (11), into the collection chamber (17), and into a reservoir.

Abstract: A package assembly (31) has a leadframe (10) including a locating flange (30), an optical transmitter (22) such as a laser diode mounted to the leadframe, and a package (32) enclosing both the optical transmitter and a portion of the leadframe so that the locating flange of the leadframe is disposed outside of the package. The locating flange is used as a reference datum to align the optical transmitter's relative height and lateral position during manufacture. Also, the locating flange is used as a reference datum in mating the package assembly to other, standard optical components when mounting to other components in an optical end product.

Abstract: An ohmic contact including a gallium arsenide substrate having an epitaxially grown crystalline layer of indium arsenide on the substrate. The crystalline material and the substrate define an interface, layers are n-doped with silicon close to the interface.

Abstract: A semiconductor device (10) is formed to have multiple external connection pads (17, 18) for an active element (12). The multiple external connection pads (17, 18) are electrically connected together with a electrical link (19). After testing, the electrical link (19) is removed to disconnect the multiple external connection pads (17, 18) from each other.

Abstract: A field effect transistor structure which can serve as a low noise amplifier. The field effect transistor has a major surface and source and drain regions extending from the major surface into a body of semiconductor material. A channel region is formed in a portion of the body of semiconductor material separating the source and drain regions. The channel region has a first boundary perpendicular to the major and contiguous with the source region, a second boundary parallel to the first boundary and contiguous with the drain region, a third boundary perpendicular to the first boundary, and a fourth boundary parallel to the channel region. A first portion of the channel region is enclosed by a first border parallel to the first boundary of the channel region, a second border parallel to the second boundary of the channel region, a third boundary of the channel region, and the fourth boundary of the channel region.

Abstract: A gate quality oxide-compound semiconductor structure (10) is formed by the steps of providing a III-V compound semiconductor wafer structure (13) with an atomically ordered and chemically clean semiconductor surface in an ultra high vacuum (UHV) system (20), directing a molecular beam (26) of gallium oxide onto the surface of the wafer structure to initiate the oxide deposition, and providing a second beam (28) of atomic oxygen to form a Ga.sub.2 O.sub.3 layer (14) with low defect density on the surface of the wafer structure. The second beam of atomic oxygen is supplied upon completion of the first 1-2 monolayers of Ga.sub.2 O.sub.3. The molecular beam of gallium oxide is provided by thermal evaporation from a crystalline Ga.sub.2 O.sub.3 or gallate source, and the atomic beam of oxygen is provided by either RF or microwave plasma discharge, thermal dissociation, or a neutral electron stimulated desorption atom source.

Abstract: A vertical FET is fabricated by etching through a contact layer into a drift layer on a compound semiconductor substrate to form a plurality of mesas, each mesa having an upper surface and each adjacent pair of mesas defining therebetween a trench with sidewalls and a bottom. A conductive layer is conformally deposited over the plurality of mesas and the trenches and anisotropically etched to form contacts on the sidewalls of the trenches and depositing source contacts on the upper surfaces of the mesas and a drain contact on a reverse side of the substrate.

Abstract: An electronic assembly (20) having an insulated metal heat sink (10) and a method of manufacturing the electronic assembly (20). The electronic assembly (20) has a heat dissipater (11), a dielectric material (12), and a conductive layer (13). A semiconductor chip (21) is attached to the insulated metal heat sink (10). Heat generated by the semiconductor chip (21) is conducted to the conduction surface (14) of the heat dissipater (11). In one embodiment a convection surface (16) of the heat dissipater (11) is present and the heat is transferred from the convection surface (16) of the heat dissipater (11) to a fluid by convection. The fluid is directed by a manifold (64).

Abstract: A semiconductor component includes an asymmetric transistor having two lightly doped drain regions (1300, 1701), a channel region (1702), a source region (1916) located within the channel region (1702), a drain region located outside the channel region (1702), a dielectric structure (1404) located over at least one of the two lightly doped drain regions (1300, 1701), two gate electrodes (1902, 1903) located at opposite sides of the dielectric structure (1404), a drain electrode (1901) overlying the drain region (1915), and a source electrode (1904) overlying the source region (1916). The semiconductor component also includes another transistor having an emitter electrode (122) located between a base electrode (121) and a collector electrode (123) where the base electrode (121) is formed over a dielectric structure (1405).

Abstract: A chemical mechanical planarization tool that reduces a volume of polishing chemistry used in a wafer polishing process includes a rinse bar (87) for removing polishing chemistry and particulates from a polishing media and a slurry measurement system (84) for regulating a pump (83) of a slurry delivery system. A volume of the slurry delivery system is reduced to less than 100 milliliters. Approximately a minimum volume of polishing chemistry for polishing a single wafer is dispensed during each wafer polishing process of a wafer lot. During each wafer polishing process the slurry delivery system is purged to prevent settling, agglomeration, and hardening of the polishing chemistry. The rinse bar (87) sprays a surface of the polishing media to remove spent polishing chemistry and particulates prior to polishing another semiconductor wafer.

Abstract: A piezoresistive pressure sensor (30) has four resistive diffused regions (32) coupled into a bridge configuration (33) with four junctions (36) and four inside corners (40). Each of the diffused regions has a first end connected to one of the four junctions and a second end connected to a different one of the four junctions. There are four contact diffusion terminals (34) disposed in contact with the bridge configuration, and each of the diffusion terminals is disposed at one of the four junctions such that the diffused regions are electrically connected essentially only by the contact diffusion terminals and an overlap (44, 46) is provided between each of the diffusion terminals and the inside corners to accommodate mask misalignment during manufacture. Thus, no tap is required to electrically connect the contact diffusion terminals to the resistive diffused regions of the bridge, which results in increased sensor sensitivity.

Abstract: A differential pressure sensor (10) has a sensor die (30) eutectically attached to a mounting flag (14). The mounting flag has a similar coefficient of thermal expansion to the sensor die. The eutectic attachment provides a hermetic seal between the mounting flag and the sensor die. Pressure is applied to sensor die port (20). A molded housing (12) is molded around the sensor die-mounting flag assembly. Port (22) in the molded housing is filled with a silicone gel (52). A second pressure source is transferred by way of the silicone gel to the sensor die. Any media entering port (20) contacts the first surface of the sensor die to assert pressure against a piezoresistive transducer circuit (32) to generate the electrical signals representative of the applied pressure but are isolated from the sensitive interconnects by the hermetic seal.

Abstract: A high temperature metallization system for use with a semiconductor device (23). The semiconductor device (23) has a multi-layer metallization system (36). An adhesion layer (37) of the metallization system (36) is formed on a semiconductor substrate (20). A barrier layer (38) that contains a nickel alloy is formed on the adhesion layer (37). A protective layer (39) is formed on the barrier layer (38). The barrier layer (38) inhibits solder components from diffusing toward the semiconductor substrate (20) during high temperature processing.

Abstract: A semiconductor device (10) is formed to have multiple external connection pads (17, 18) for an active element (12). The multiple external connection pads (17, 18) are electrically connected together with a electrical link (19). After testing, the electrical link (19) is removed to disconnect the multiple external connection pads (17, 18) from each other.

Abstract: An AC-to-DC-converter (100) for driving a dynamic load (160), such as a motor, has a rectifier bridge (110), a coil (120), and a switch (130) to boost an output capacitor (150) by a coil current I(t). The current (I(t)) has periodical minimum values. The converter (100) is controlled by a monitor (170) and a modulator (180). The monitor (170) monitors the converter output (signal 102) during a predetermined monitoring interval (t.sub.M1, t.sub.M2) which is inside a minimum-to-minimum interval of the current (I(t)) and classifies changes (voltage .DELTA.V.sub.OUT) and/or current .DELTA.I.sub.OUT) into a first case (A) where the change exceeds a predetermined threshold (.DELTA.V.sub.TH) and a second case (B) where the change does not exceed the threshold. In order to shape the current (I(t)), in the first case (A), the modulator (180) immediately alters the current (I(t)), and in the second case (B), the modulator (180) alters the current (I(t)) when the current has its next minimum.

Abstract: An apparatus for testing sensors in a media includes a chamber portion (240) for holding the sensors, tanks (320, 340) for supplying the media to the chamber portion (240) and coupled in parallel to the chamber portion (240), a pressure generator (310) coupled to the tanks (320, 340), and a heat exchanger (323, 324) adjacent to the tanks (320, 340). The media is simultaneously heated to different temperatures and pressurized to different pressures in the tanks (320, 340). Then, the media is delivered from the tanks (320, 340) to the chamber portion (240), and the sensors detect the media at the different temperatures and pressures.

Abstract: Chemical mechanical planarization (CMP) of semiconductor wafers presents a harsh abrasive and chemical environment for equipment used in a polishing process. Prior art translation mechanisms are prone to failure due to corrosion and require maintenance that exposes the polishing process to contamination from lubricants. A translation mechanism (31) requiring no lubrication is designed to have maintenance at intervals greater than a CMP tool. The translation mechanism (31) includes a housing (32) and a moveable mount (33). The housing (32) and the moveable mount (33) are made of hardened stainless steel which is impervious to the CMP environment. Bearing shafts (39) buffer a threaded shaft (36) from side loading on the moveable mount (33). Polymer bearings (51) connected to moveable mount (33) provide a low friction contact surface to bearing shafts (39). A polymer translation nut (41) connects to the moveable mount (33) and is threaded onto the threaded shaft (36).

Abstract: A voltage boosting circuit which derives an output voltage than is substantially twice the magnitude of a supply voltage applied thereto. The voltage boosting circuit consists of complementary acting boost circuits each having a pair of switches (42A, 52A; 42B, 52B) connected between an input of the voltage boosting circuit, at which is applied the supply voltage, and an output at which the output voltage is produced. Boost capacitors (48A, 48B) are connected between the respective switches of the complementary boost circuits and the switches of the these circuits are opened and closed out of phase with respect to each other in response to clocking signals being applied thereto such that a boosted output voltage is produced during each half cycle of the clocking signals.

Abstract: An electronic component includes a support substrate (101), a fixed electrode (113) overlying the support substrate (101), a movable electrode (123, 423) overlying the support substrate and the first electrode (113) wherein the first and second electrodes (113, 123, and 423) form a capacitor with a sensing area, an anchor (122, 422) coupled to the support substrate (101), and beams (125, 425) coupling different attachment points (129) of the second electrode (123, 423) to the anchor (122, 422) wherein the different attachment points (129) form a simply connected polygon and wherein a portion of the sensing area is located within the simply connected polygon.