Abstract: A complementary field-effect transistor (FET) amplifier with means for controlling peak cross-over current. A substantially constant current is established in the drain-source conduction paths of a pair of reference transistors by degenerative feedback from the conduction paths to the respective gate electrodes thereof; wherein the reference transistors have similar characteristics to the respective amplifier transistors. The resulting sum of the gate-to-source voltages of the reference transistors is used to apply a bias voltage between the gate electrodes of the transistors in the FET amplifier so that the sum of the gate-to-source voltages of the amplifier transistors is equal to the sum of the respective gate-to-source voltages of the reference transistors during the cross-over current condition. Cross-over current is thereby limited to a predetermined value proportional to the substantially constant current established through the reference transistors.

Abstract: A temperature-sensitive voltage divider for monolithic i.c.'s using singly and doubly diffused resistors avoids the problems with tracking their resistance characteristics owing to diffusion process variations. This is done by using the pinch resistor in conjunction with the base-emitter circuit of a bipolar transistor arranged in common-collector amplifier configuration. The impedance transformation properties of the transistor ease the problems of scaling otherwise encountered in many potential divider arrangements of supply and doubly diffused resistors. The utility of the voltage divider is illustrated in the shunt regulation of the operating voltage of an AM radio receiver.

Abstract: First and second direct-coupled cascade connections of like numbers of transistors of the same conductivity type are connected in push-pull. The output stages have common-emitter and common-collector-amplifier transistors, respectively, while earlier stages have common-collector and common-emitter-amplifier transistors, respectively, the common-emitter-amplifier transistor working into a constant current generator collector load.

Abstract: In this relaxation oscillator first and second electrically controlled constant current generators are used to provide proportionately related first and second currents to first and second terminals, respectively, between which the timing capacitor is connected. Set-reset, or R-S, flip-flop means is set and reset by the voltage at the first and second terminals, respectively, departing in a first sense from the voltage at a reference voltage bus by a predetermined amount. First switching means responds to the R-S flip-flop reset condition to complete a connection of the first terminal to the reference voltage bus and responds to the R-S flip-flop set condition to interrupt that connection. Second switching means responds to the R-S flip-flop set condition to complete a connection of the second terminal to the reference voltage bus and responds to the R-S flip-flop reset condition to interrupt that connection.

Abstract: A signal to be quantized is translated to a charge Q and the latter is multiplied by a fraction f to produce a fractional charge packet fQ. Then, another fractional charge packet is produced by multiplying the remainder Q(1-f) of the charge packet by f. This last step is repeated for succeeding remainder charge packets a sufficient number of times until a total of n-1 fractional charge packets have been produced, where n is the number of quantization levels desired. The successive fractional charge packets are compared with threshold levels of different amplitudes to determine the number of incremental charge packets, each of the same size, to be added to one another to form a quantized charge packet.

Abstract: A tuning system includes a resistive element coupled between two terminals and a movable contact which is moved along the resistive element to determine the tuning position. A switching arrangement selectively couples predetermined voltages to the terminals as a function of the position of the movable contact so that a tuning voltage for tuning all the channels in the low VHF, high VHF and UHF bands is generated at the movable contact as it is continuously and consecutively moved along the resistive element.

Abstract: Within a negative impedance network of the type which includes a current mirror amplifier having transistors in master and slave paths, a bias current is applied at the commonly connected control electrodes of the master and slave path transistors in inverse proportion to the voltage applied across the slave path and thereby a negative impedance characteristic is derived through the slave path.

Abstract: A channel number display arrangement for a television receiver includes a multiplexer for alternately coupling binary signals representing the tens and units digits of the channel number of a selected channel to a single decoder and driver arrangement. To reduce visible effects of switching transients, the switching operation of the multiplexer is synchronized with respect to the receiver's deflection signals so that switching transients occur during horizontal retrace intervals in which the receiver's electron beams are normally blanked. In addition, keyed AGC circuitry, normally activated during the horizontal retrace intervals, is inhibited during the switching operation so that it is not erroneously set up in response to switching transients.

Abstract: A phase locked loop tuning system for a television receiver includes a reference oscillator, a reference divider for dividing the frequency of the output signal of the reference oscillator, a voltage controlled local oscillator, a prescaler for dividing the frequency of the output signal of the local oscillator by a predetermined factor, a programmable divider for dividing the frequency of the output signal of the prescaler by a factor determined by the presently selected channel, a phase comparator for generating a series of pulses representing the phase and frequency relationships between the output signal of the reference divider and the output signal of the programmable divider and a low pass filter for deriving a control voltage for the local oscillator in response to the pulses generated by the phase comparator.

Abstract: Transistor memory cells which may be operated in both the erasable "read only" and the "random access" modes. Each cell includes a plurality of MOS transistors interconnected to permit random access storage and at least two MNOS transistors. The latter may be set, one to one threshold level and the other to a second threshold level to represent read only storage of a logic 1, and the threshold levels may be reversed to represent read only storage of a logic 0. The MOS transistors may be randomly accessed both for read and write independently of what the MNOS transistors are storing.

Abstract: Each half of a differential-input amplifier stage has an input terminal connected to the emitter electrode of a transistor. Resistances are provided for sensing the flow of current through the principal conduction path of each transistor. Output signal current for the stage is taken from the collector of at least one of the transistors and applied to the input of a following one of a cascade connection of amplifier stages. Voltage comparator means sense the drop in potential across one of the resistances caused by reduction of current in one half of the diffferential-input amplifier to increase the current available to the other half. This increases the output signal current available to charge or to discharge capacitance in the stage(s) cascaded after the diffferential-input amplifier, increasing the slew rate of the cascade.

Abstract: A dynamic current supply is connected between the emitter electrode of an output transistor and a point of reference potential, to progressively increase the magnitude of the flow of current therebetween, as the output signal at the emitter electrode approaches the point of reference potential. The dynamic current supply includes a current mirror, the output of which is in the path of and controls the flow of current. An MOS transistor, the conductivity of which is a function of the difference in potential between the operating voltage supplied to the output transistor and the output signal, supplies the input or control current to the current mirror.