Abstract: An improved synchronization system for use with simulcast transmission systems is described. The invention provides a method and means for keeping the information signals for adjacent transmitters in the system in synchronization. This invention utilizes a centrally located master transmitter and control unit and a plurality of secondary transmitters disposed in an annular fashion around the master transmitter. In operation, the innermost annular band is synchronized to the master transmitter, while the remainder of the system is disabled. The next adjacent annular band is then synchronized to the innermost annular ring. The process is repeated until every annular band in the system is synchronized.
Abstract: A system for assembling a hard crystal blank onto a base which includes connecting pins, using an apparatus providing self-locating and self-fixturing features, is described. The apparatus comprises a hard crystal blank supporting structure which provides vertical, horizontal and transverse locating features. The vertical, horizontal and transverse locating features are contiguous to the crystal supporting structure and locate the hard crystal blank to the crystal supporting structure. The hard crystal blank once located may be secured to the crystal supporting structure with a suitable adhesive. Connecting features for securing the crystal supporting structure to the base are provided. Once the crystal supporting structure has been secured to the base, the vertical, horizontal and transverse locating features are separated from the crystal supporting structure. The hard crystal blank and crystal supporting structure so assembled are precisely aligned to the base.
Type:
Grant
Filed:
June 23, 1986
Date of Patent:
November 17, 1987
Assignee:
Motorola, Inc.
Inventors:
Charles W. Mooney, Robert E. Phipps, William J. Kuznicki
Abstract: A mismatch detector is provided for determining whether or not a particular load impedance is matched or mismatched to the characteristic impedance of a transmission line. The detector is capable of determining if a particular load impedance has a value outside of an impedance threshold circle having a center at a location other than at the center of the Smith Chart. This flexibility enables the detector to be more selective in determining improper load conditions.
Abstract: A paging simulcast station remote control system encoder is described. The paging system encoder generates signals in accordance with a predetermined signalling scheme comprising a series of tones and timed pauses and generated in response to control signals supplied either manually and or by a paging terminal. The paging system encoder provides control signals which instruct a paging transmitter to transmit a subsequent paging signal or to inhibit transmission until instructed to do otherwise. The paging encoder can generate signals to individually control as many as 30 individual simulcast transmission remote stations through an existing paging RF link.
Type:
Grant
Filed:
August 5, 1983
Date of Patent:
October 20, 1987
Assignee:
Motorola, Inc.
Inventors:
Stephen H. Dunkerton, Gary D. Erickson, Gary R. Reynolds
Abstract: A paging system providing an LPC encoded speech output having an adaptive bit rate. The LPC bit rate is adaptively modified based on paging system airtime loading. Synthesizer circuitry in the paging receivers, together with a system signalling scheme is used to update the paging receivers as to the LPC bit rate, allows the paging receiver to decode the adaptive bit rate signal.
Abstract: An alerting device, such as a radio pager, which produces an audible alerting signal, in response to a unique identifier received and decoded by said device, incorporates circuitry for periodically reminding the user that a lagging signal has been received. In this context, a short alerting signal or call reminder alert occurs periodically upon cessation of the originating alert and/or message. This method of operation continues until the user manually discontinues it.
Abstract: A solder paste dispensing assembly provides for the controlled application of a predetermined solder paste pattern to a surface. The surface can be on a printed circuit board, prior to or after the board is mounted onto an assembled product or it can be a portion of the product itself. The surface can be a planar or non-planar surface.
Abstract: A control or front panel assembly which is suitable for inclusion in associated apparatus. The panel assembly includes a switching arrangement with individual switch actuators easily detachable and removable during final assembly prior to mounting an escutcheon plate to the front panel face. In this manner, a single piece part need only be inventoried, modifiable during final assembly, to effect the desired model variations for the associated apparatus.
Type:
Grant
Filed:
September 2, 1986
Date of Patent:
September 8, 1987
Assignee:
Motorola, Inc.
Inventors:
Vinh-Dinh D. Trinh, Ronald P. Scholtes, Terence E. Sumner
Abstract: A logic circuit is provided in a multifunction selective call receiver operating in a time sequential zone batched message communication system to prevent repeated alerts of the same message. A single lockout timer is reset by the first detection of a message function signal, and further alerts for that function are disabled for a time interval which may be extended by additional message function detects corresponding to other functions.
Abstract: An electrical battery is provided which includes a current sensing resistor situated in series with a plurality of battery cells located within a housing. The respective ends of the plurality of cells are coupled to positive and negative contacts on an external surface of the battery. The respective ends of the current sensing resistor are coupled to first and second sensing contacts on the external surface of the battery. A battery structure is thus provided which is capable of supplying electrical energy while permitting sensing of the magnitude of electrical current drawn from the battery.
Abstract: A switched capacitor filter system is provided which is programmed to filter a predetermined sequence of tone signals. The filter system is de-rung after each selected tone signal is detected by increasing the clock frequency of the switched capacitor from the programmed value corresponding to a tone signal up to a center frequency substantially greater than that of the tone signals. Energy stored in the filter system is thus quickly dissipated. Rapid sequences of sequential tone signals are thus filtered without the problems associated with ringing of the filter.
Abstract: In a method of electrically altering the characteristics of a semiconductor device, a lateral polysilicon zener diode's zener knee voltage may be shifted either to a higher or lower voltage. An electrical potential may be applied in the forward direction to shift the zener knee to a higher voltage level. An electrical potential may be applied in the reverse bias direction to shift the zener knee to a lower voltage. In the limit, the zener may be changed into a forward diode of reverse polarity with respect to the original zener. The electrical potential used should be of appropriate magnitude to melt the polysilicon without damage to the zener's terminals. This induces migration of the impurities causing a rediffusion of impurities thereby altering the characteristics of the diode. This method may be used to program a PROM by either converting the zener to a diode or not to program each binary bit.
Abstract: An adaptive impedance mismatch detector system is provided for determining whether or not a particular load impedance is matched or mismatched to the characteristic impedance of a transmission line. The detector system is capable of determining if a particular load impedance has a value outside of an impedance threshold circle having a center at a location other than at the center of the Smith Chart. The system changes the radius and/or center of the threshold circle in response to changes in circuit operating conditions or parameters. This flexibility enables the detector to be more selective in determining improper load conditions.
Abstract: An integrated circuit which has serially connected clock drivers for generating sequential clock signals further includes test circuitry for testing for the occurence of the clock signals. The test circuitry includes a current source for each of the sequential clock signals each of which is enabled upon receiving its associated clock signal. Consequently, the current sources are sequentially enabled until a clock signal fails to occur at which time no more clock signals occur so that no more current sources are enabled. The current sources are connected to a probe pad which is accessible external to the integrated circuit. Test apparatus for detecting the enabled current sources can be connected to the integrated circuit at the probe pad.
Abstract: A modified duobinary filter in which an analogue data signal is translated to an intermediate frequency, filtered by a surface acoustic wave filter having a modified duobinary response, and retranslated in the opposite direction to the first frequency translation.
Abstract: A driver circuit which provides an output voltage which is slew rate limited substantially independent of the value of any load which may be coupled thereto is provided. A pair of transistors of opposite conductivity type operate in push-pull fashion to drive the output voltage in response to a control signal. Capacitors are utilized to perform slew rate limiting. Additionally, each of the transistors is selectively dynamically biased to insure a substantially linear slew rate.
Abstract: A bi-directional bus isolation circuit couples the logic state present on a primary bus to a polysilicon secondary bus or the logic state present on the secondary bus to the primary bus in response to a select signal. A first NOR gate has one input coupled to the primary bus and a second input for receiving the select signal. A first output transistor couples the secondary bus to ground in response to the first NOR gate providing a logic high output. A second NOR gate has a first input coupled to the secondary bus, and a second input for receiving the select signal. A second output transistor couples the primary bus to ground in response to the second NOR gate providing a logic high output.
Abstract: A charge pump which can operate at low supply voltages is provided. The charge pump recirculates charge in response to an alternating clock signal which alternates the charge across a plurality of charge storage devices. Charge recirculation is used to compensate for threshold voltage drops associated with diodes or diode-configured transistors used to implement the charge pump. As a result, voltage amplification can occur in the charge pump even for small power supply values.