Patents Represented by Attorney, Agent or Law Firm Antonelli, Terry, Stout & Krauss, LLP
  • Patent number: 7315144
    Abstract: A motor is driven with variable frequency AC power converted from DC power, and an AC output power from the motor is converted to DC. In the conversion, an electromotive force regenerated by the motor is consumed by a plurality of resistors. When the consumption of the electromotive force is impeded in any of systems including any of the plurality of resistors, the electromotive force is consumed by the systems including the remaining resistors. Even if a system including any of the plurality of resistors fails, the electromotive force can by consumed by the other systems including the remaining resistors, thus providing a reliable rheostatic brake.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: January 1, 2008
    Assignees: Hitachi, Ltd., Hitachi Construction Machinery Co., Ltd.
    Inventors: Kazuhiro Imaie, Takashi Yagyu, Keizo Shimada, Yasuhiro Kiyofuji, Naoshi Sugawara
  • Patent number: 6987924
    Abstract: A recorder/reproducer for recording and reproducing signals such as video and audio signals has first and second recording media. When an input signal is recorded on the first recording medium, it is once recorded on the second recording medium, and a certain time later it is transferred to the first recording medium, thus recorded thereon. During this certain time, other signal processings are made, such as recording/reproduction of other signals and discrimination of commercials from the program itself. In addition, when a signal is reproduced from the first recording medium, the signal is once recorded on the second recording medium, and a certain time later reproduced and supplied, and thus similarly other processings can be made during this certain time.
    Type: Grant
    Filed: April 23, 1999
    Date of Patent: January 17, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Kouji Fujita, Hideo Nishijima, Motoyoshi Sasaki
  • Patent number: 6887600
    Abstract: The present invention relates to a process for operating a regenerative fuel cell (RFC). The process involves circulating a first electrolyte (electrolyte 1) through the negative chamber of the cell and a second electrolyte (electrolyte 2) through the positive chamber of the cell. Electrolyte (1) contains sulfide during the discharge cycle of the cell. Electrolyte (2) contains bromine during the discharge cycle of the cell. Decreases in ph in the electrolyte are compensated by circulating a fraction of other electrolyte (1) or (2) through the positive chamber of an auxiliary cell. A fraction of electrolyte (2), which has been made free of bromine, is circulated in the negative chamber of the auxiliary cell.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: May 3, 2005
    Assignee: Regenesys Technologies Limited
    Inventors: Patrick John Morrissey, Norman John Ward
  • Patent number: 6862290
    Abstract: A line switching system of a dynamic band variation unit (10) having a function of connecting a dynamic data terminal device (30A) to an opposing data terminal device (30B) through a number of trunk lines such as a dedicated line (21) or ISDN lines (22-24), wherein the quantity of data to be sent out to a trunk line is varied after the quantity of data to be stored to the dynamic band variation unit is adjusted by varying the communication speed of the data transmitted from the dynamic data terminal unit, when varying the data communication quantity of the data terminal device by increasing or decreasing the number of trunk lines.
    Type: Grant
    Filed: May 6, 1999
    Date of Patent: March 1, 2005
    Assignee: Hitachi Telecom Technologies, Ltd.
    Inventors: Ikuo Aso, Sakae Watanabe, Isao Wada, Kazumasa Azuma
  • Patent number: 6859194
    Abstract: To provide a liquid crystal display apparatus including: a substrate; another substrate arranged opposite the substrate; a liquid crystal layer sandwiched between the two substrates, and a plurality of pixels forming a display section, in which each of the pixels is provided with a first and a second pixel electrodes corresponding to the pixel, and a common electrode corresponding to the first and second pixel electrodes.
    Type: Grant
    Filed: August 27, 2001
    Date of Patent: February 22, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuya Aoyama, Shinichi Komura, Yuka Utsumi
  • Patent number: 6842953
    Abstract: Method of producing a composite nonwoven for receiving and storing liquids or the like, comprising a carded nonwoven, which is treated in order to consolidate it, and a pulp layer, such as a wood pulp fiber layer, applied to the consolidated carded nonwoven and brought into secure contact with same, characterized in that the carded nonwoven is consolidated dry before being coated with the super-absorbent material, then the layer formed from the pulp fibers is applied to this pre-consolidated carded nonwoven and everything is interconnected.
    Type: Grant
    Filed: August 13, 2002
    Date of Patent: January 18, 2005
    Assignees: Fleissner GmbH & Co. Maschinenfabrik, Orlandi SpA
    Inventor: Vittorio Orlandi
  • Patent number: 6711276
    Abstract: A watermark information embedding method, and apparatus, capable of suppressing the quality degradation of contents and increasing the survivability of embedded information. When embedding watermark information in moving picture data formed of a plurality of still picture frames arranged in time series, a motion vector representing a property specific to moving picture is detected for each of image blocks generated by dividing a target frame. According to a motion quantity, a pixel change factor specifying rule is selected for each block. Out of pixels permitted to be changed in luminance depending upon the state of an image in each block representing a property specific to still picture, as many pixels as a number specified by the selected rule are selected. Luminance change processing for forming watermark information is conducted on the selected pixels.
    Type: Grant
    Filed: December 3, 1999
    Date of Patent: March 23, 2004
    Assignees: Hitachi, Ltd., Sony Corporation, Pioneer Electric Corporation
    Inventors: Hiroshi Yoshiura, Isao Echizen, Takao Arai, Hiroyuki Kimura, Toshifumi Takeuchi, Yoshiaki Moriyama, Kazumi Sugaya, Akira Ogino
  • Patent number: 6611899
    Abstract: A memory control apparatus is interposed between a central processing unit and a memory device to store data includes a plurality of cache memories to temporarily store data which is transferred between the central processing unit and the memory device and a cache memory control unit having a selector for selecting a cache memory to store data which is transferred from the memory device. The memory control apparatus assigns cache memories to store clean data and dirty data, which is updated data corresponding to the clean data, in accordance with a data identifier, whether a slot number is odd or even, or a usable amount of memory in the cache memories. The memory control apparatus selects a cache memory to store the data so as to almost equalized usage in the plurality of cache memories, thereby controlling the allocation of the cache memories.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: August 26, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Misako Takahashi, Yoshihiro Asaka, Shigeru Kishiro, Akira Yamamoto
  • Patent number: 6457153
    Abstract: In the event that during write to a storage device such as a DVD, data does not fill up a unit of generation of an error correction code (ECC), an increase in the data transfer amount caused by reading a shortage of data from a storage medium can be prevented. Controlling is carried out such that write data is not immediately written to the storage medium but write operation is deferred until an amount of data of ECC generation unit is complete in a buffer memory. As a result, the ECC can be generated and written to the storage medium by using only the write data without resort to read of the shortage of data from the storage medium.
    Type: Grant
    Filed: May 22, 2001
    Date of Patent: September 24, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Yasutomo Yamamoto, Akira Yamamoto
  • Patent number: 6171641
    Abstract: A vacuum processing apparatus for performing various processes on a wafer in a vacuum chamber, and a film deposition method and a film deposition apparatus using this vacuum processing apparatus. The vacuum processing apparatus, the film deposition method and the film deposition apparatus using the vacuum processing apparatus according to this invention are characterized in that temperature control of the wafer is performed in a film deposition process, and particularly characterized in that after the emissivity calibration using a combination of a temperature calibration stage and a shutter is performed, the substrate is transferred to stages in a vacuum film deposition process chamber, and a film is deposited on the substrate by controlling the substrate temperature to a specified temperature.
    Type: Grant
    Filed: June 15, 1994
    Date of Patent: January 9, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Akira Okamoto, Shigeru Kobayashi, Hideaki Shimamura, Susumu Tsuzuku, Eisuke Nishitani, Satosi Kisimoto, Yuji Yoneoka
  • Patent number: 6158268
    Abstract: A measuring sensor for measuring a fluid includes a longitudinally extending housing having first and second ends and having an inlet opening at the first end for the fluid to be measured, and a sensor chip provided in the housing. The sensor chip has a sensor element provided towards the inlet opening and at least one electrically conducting contact provided towards the second end of the housing. The electrically conducting contact is connected to the exterior by a metal jacket lead having an outer metal tube, at least one internal conductor, and a mineral material for electrically insulating the at least one conductor, the outer metal tubing connected in a fluid-tight manner to the second end of the housing.
    Type: Grant
    Filed: December 9, 1999
    Date of Patent: December 12, 2000
    Assignee: Heraeus Electro-Nite International N.V.
    Inventors: Edelbert Hafele, Walter Seeger
  • Patent number: 6104454
    Abstract: A backlight device having a light source, a waveguide provided close to the light source, this waveguide being a wedge-shaped waveguide so constructed that the incident light from the light source can be greatly changed in its direction and made to exit therefrom, a polarizing beam splitter provided on the light-exiting side of the wedge-shaped waveguide, and a light converter disposed on the light-exiting side of the polarizing beam splitter. This backlight device is used for liquid crystal displays.
    Type: Grant
    Filed: November 20, 1996
    Date of Patent: August 15, 2000
    Assignee: Hitachi, Ltd
    Inventors: Ikuo Hiyama, Katsuyuki Funahata, Katsumi Kondo
  • Patent number: 6023182
    Abstract: A pulse generating circuit includes a first pulse generating circuit for generating a first output pulse, and a second pulse generating circuit for outputting a second output pulse. Each pulse generating circuit comprises a stack of two n-channel transistors and a reset circuit. The reset circuit includes two p-channel transistors and two inverters and is provided for automatically resetting the pulse generating circuits. The second pulse generating circuit includes a delay element for introducing an additional gate delay in the generation of the second output pulse. The additional gate delay introduces an asymmetry in the output pulses which offsets or cancels a previously introduced asymmetry of an input clock signal to generate an output clock signal having a constant period. Clock gating circuitry is provided for selectively enabling and disabling at least one of said pulse generator circuits.
    Type: Grant
    Filed: December 31, 1997
    Date of Patent: February 8, 2000
    Assignee: Intel Corporation
    Inventors: Mark S. Milshtein, Thomas D. Fletcher, Terry Chappell
  • Patent number: 5987039
    Abstract: A multiplexing system for ISDN circuits. Multiplexers in the system include data terminals, voice interfaces having voice trunks, high speed digital circuits and ISDN circuits, together with a control channel interface which connects trunking circuits by controlling calls on the control channel. When an outgoing voice call originates, data information from data terminals voice is multiplexed with compressed information from a voice interface and transmitted to trunking circuits. When calls originate, the control channel controls calls and connects them with trunking circuits. When using ISDN circuits, after setting up a communication channel for the circuits, a CPU controls calls to multiplex ISDN circuits on the control channel. By this structure decreasing the multiplexing ratio due to voice multiplexing call control on ISDN circuits can be eliminated when linking multiplexers with communication channels having high speed digital circuits and ISDN circuits.
    Type: Grant
    Filed: November 27, 1996
    Date of Patent: November 16, 1999
    Assignee: Hitachi Telecom Technologies, Ltd.
    Inventors: Yasuo Wada, Toshikatsu Watanabe
  • Patent number: 5978830
    Abstract: Multiple parallel-job scheduling method and apparatus are provided which can improve the utilization of all processors in a system when a plurality of parallel jobs are executed concurrently. A plurality of processors constituting a computer system and each having the equal function are logically categorized into serial processors for executing a serial computing part or a parallel computing part of a parallel job and a parallel processor group consisting of multiple processors for executing the parallel computing part of the parallel job in parallel. In order that the parallel processors are shared by a plurality of parallel jobs, a synchronization range indicator is provided which can control by program whether the parallel processors are available in correspondence to the respective serial processors.
    Type: Grant
    Filed: February 24, 1998
    Date of Patent: November 2, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Akihiro Nakaya, Takashi Nishikado, Hiroyuki Kumazaki, Naonobu Sukegawa, Kei Nakajima, Masakazu Fukagawa
  • Patent number: 5974394
    Abstract: A method in which idle time retrieval is not lumped together but divided multistageously so that a burden on a host person for retrieving idle time for subjects of participation is lightened. The subjects of participation are divided into some groups so that idle time is retrieved group by group on the basis of a given retrieval condition. The retrieval is continued unless the retrieval is completed for all the groups.
    Type: Grant
    Filed: September 16, 1997
    Date of Patent: October 26, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Yoshinori Nakayama, Tadashi Miyazaki
  • Patent number: 5751934
    Abstract: A non-blocking fault tolerant gamma network for a multi-processor system is disclosed, including: N dual links respectively connected to n source nodes, and for transmitting data input; a first stage made up with n 2.times.3 switching devices for outputting data transmitted from the N dual links; a second stage made up with n 3.times.4 switching devices for outputting data output from the first stage; a third stage to n-1 stage made up with (n-2).times.N 4.times.4 switching devices for receiving data output from the second stage at the third stage and outputting the data to n-1 stage; an n stage made up with n 4.times.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: May 12, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jong-Seok Han, Woo-Jong Hahn, Suk-Han Yoon
  • Patent number: 5724067
    Abstract: A system (10) for proportionately spacing a plurality of characters is disclosed. The system includes a memory for storing a character font defining a group of characters which may be individually selected. Each selectable character contains at least one matrix of pixels with each matrix containing a plurality of rows of pixels with each row having pixels extending in a direction of reading of the pixels from the memory. Visible pixels in the at least one matrix of each selectable character define a visible shape which is stored in the memory as a first binary value. Background pixels in the at least one matrix of each selectable character, which are a remainder of a total number of pixels in the at least one matrix of each selectable character, are stored in the memory as a second binary value.
    Type: Grant
    Filed: August 8, 1995
    Date of Patent: March 3, 1998
    Assignee: Gilbarco, Inc.
    Inventors: Hans B. Atchley, John J. Ronchetti, Sr.
  • Patent number: 5724311
    Abstract: Within the scope of operations of long-term regular monitoring of an underground area, a seismic emission-reception device is installed in a fixed position on the production site, so as to have time stable operating conditions of identical emission-reception locations, identical quality of coupling with the formations, etc. The device includes a plurality of seismic sources (S1 . . . Sn) in fixed places at the surface or buried beneath the surface, on either side of a production well (1), and at least one array of receivers (R) set in a fixed position at the surface or in at least one well. Explosive sources, hydraulic overpressure sources, electromechanical sources, etc, can be used and connected to a plant (3) providing energy using an explosive gaseous mixture, which may be a constituent taken from the monitored area, fluid under pressure transmitting hydraulic shocks or vibrations, etc, by means of buried pipes or cables (2).
    Type: Grant
    Filed: August 26, 1996
    Date of Patent: March 3, 1998
    Assignees: Institut Francais du Petrole, Gaz De France
    Inventors: Jean Laurent, Frederic Huguet
  • Patent number: RE39756
    Abstract: This invention relates to a vacuum processing apparatus having vacuum processing chambers the insides of which must be dry cleaned, and to a method of operating such an apparatus. When the vacuum processing chambers are dry-cleaned, dummy substrates are transferred into the vacuum processing chamber by substrates conveyor means from dummy substrate storage means which is disposed in the air atmosphere together with storage means for storing substrates to be processed, and the inside of the vacuum processing chamber is dry-cleaned by generating a plasma. The dummy substrate is returned to the dummy substrate storage means after dry cleaning is completed. Accordingly, any specific mechanism for only the cleaning purpose is not necessary and the construction of the apparatus can be made simple.
    Type: Grant
    Filed: February 1, 2002
    Date of Patent: August 7, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Shigekazu Kato, Kouji Nishihata, Tsunehiko Tsubone, Atsushi Itou