Abstract: An arrangement of a ship's propulsion unit includes a motor unit with a motor housing arranged in the water. A motor and related controls are provided in the motor housing. A propeller is arranged at an end of a motor shaft. The motor unit includes an electrical motor, wherein an entire circumferential surface of the electrical motor is cooled through a casing structure of the motor directly to the water surrounding the motor unit.

Abstract: A ferroelectric storage device includes a ferroelectric capacitor C1, a bit line BL, a first switching element 103 selectively connecting the ferroelectric capacitor C1 and the bit line BL, a first transistor 203 connected to the bit line BL and to a reference potential, a reference ferroelectric capacitor CR1, a reference bit line Lref, a reference switching element 105 selectively connecting the reference ferroelectric capacitor CR1 and the reference bit line Lref, a second transistor 201 connected to the reference bit line Lref and to the reference potential, potential control circuits 110 and 200 controlling a potential of the bit line BL and a potential of the reference bit line Lref, and a timing control circuit 210 controlling a detection timing for detecting data on the bit line.

Abstract: A barrier layer structure includes a first dielectric layer forming on a conductive layer and having a via being formed in the first dielectric layer, wherein the via in the first dielectric layer is connected to the conductive layer. A first metal layer is steppedly covered on the first dielectric layer. A layer of metallized materials is steppedly covered on the first metal layer, but the layer of metallized materials does not cover the first metal layer above the via bottom connected to the conductive layer in the dielectric layer. A second metal layer is steppedly covered on the layer of metallized materials, and the second metal layer is covered the first metal layer above the via bottom connected to the conductive layer in the dielectric layer. The barrier layer structure will have lower resistivity in the bottom via of the first dielectric layer and it is capable of preventing copper atoms from diffusing into the dielectric layer.

Abstract: A semiconductor device capable of setting a large number of operation modes with a single external terminal, while ensuring a stable operation mode regardless of fluctuations in the power supply voltage. The semiconductor device includes an internal circuit having a plurality of modes, an external terminal, an external resistor connected to the external terminal, and a current detection circuit for generating a setting signal based on the current flowing through the external resistor. The internal circuit includes a mode setting circuit which sets one of the operation modes of the internal circuit in response to the setting signal.

Abstract: A burn-in test, including first to sixth steps where voltages are applied for the same lengths of time in each step, is applied to a semiconductor memory having alternately arranged bit line pairs with twist structure where the bit lines cross each other and bit line pairs with non-twist structure where the bit lines are parallel to each other. Since lengths of time in which a stress is applied for all bit lines can be equally set, no deviation occurs in lengths of time where stress is applied between the bit lines. Characteristics of memory cells can be prevented from excessively deteriorating from the burn-in test. Further, the number of bit lines not having stress applied can be minimized in the first to sixth steps. Accordingly, the ratio of the bit lines having stress applied can be increased, which reduces the burn-in test time. Thus, test cost can be reduced.

Abstract: A solid state image sensing apparatus having: an image pickup device including; a semiconductor substrate of a first conductivity type, a well of a second conductivity type formed in the semiconductor substrate, charge accumulation regions of the first conductivity type formed in the well, and an overflow drain terminal electrically connected to the semiconductor substrate for controlling a potential barrier formed by the well; an amplifier for amplifying an output from the image pickup device; a sensitivity setter for setting a photographic sensitivity; and an output level controller for changing a saturation amount of charge accumulated in the charge accumulation region by changing the bias voltage applied to the overflow drain terminal in accordance with a set sensitivity.

Abstract: The present invention provides a sensor signal detection device which allows the improvement of reliability. This sensor signal detection device comprises an internal power supply voltage generation circuit, a buffer amplifier for receiving signals from a sensor, a first pull-up element and pull-down element which are connected to an input terminal of the buffer amplifier via a first pair of switches, a gain amplifier for receiving output signals of the buffer amplifier, a second pull-up element and pull-down element which are connected to an input terminal of the gain amplifier via a second pair of switches, and a failure inspection circuit for inspecting buffer amplifier and gain amplifier by controlling the connection of the two pairs of switches in a predetermined sequence, and measuring the voltage at a predetermined location when power is started up.

Abstract: A semiconductor memory device includes a memory core circuit having memory cells for storing data, a circuit configured to refresh the memory core circuit at a refresh interval, a temperature detecting unit configured to detect temperature, and a control circuit configured to shorten the refresh interval immediately in response to detection of a predetermined temperature rise by the temperature detecting unit and to elongate the refresh interval after refreshing every one of the memory cells at least once in response to detection of a temperature drop by the temperature detecting unit.

Abstract: A solid state image pickup device has: an n-type semiconductor substrate; a p-type layer formed in the n-type substrate; a first n-type region formed in the p-type layer and constituting a photodiode therewith; a first gate structure including a charge storage region and a control gate, formed on the semiconductor substrate adjacent to the first region; a second n-type region formed adjacent to the first gate structure on opposite side to the first region, constituting a non-volatile memory element with the first region and the first gate structure; and a control circuit for applying write and read voltages to the control gate, for tunneling and writing charges, and for reading stored information. A solid state image pickup device is provided which can execute a novel pixel signal read operation.

Abstract: A system for determining at least one parameter of at least one member rotating with respect to a fixed structure, the system including, for each rotating member, an assembly having a transponder, a coder, a position sensor, and a device for detecting the parameter or parameters issuing from the transponder. The system also includes a synchronisation unit connected to each sensor and to each detection device. The synchronisation unit including a device for determining an activation position of the detection device of an assembly when the transponder of the assembly is in the transmission/reception cone of the communication mechanism of the detection device, and an activation device that is able, by comparing the position of the coder with the activation position, to activate the detection device of the assembly in order to measure the parameter or parameters.

Abstract: In order to give all memory blocks the same structure, a redundancy word line and a redundancy bit line are formed in each memory block. A redundancy column selection line is wired in common to the memory blocks. Column redundancy circuits are formed to correspond to respective memory groups each of which consists of a prescribed number of memory blocks, and become effective according to enable signals. A column redundancy selection circuit activates an enable signal according to a block address signal when all row hit signals are deactivated. When one of the row hit signals is activated, the column redundancy selection circuit activates the enable signal corresponding to the activated row hit signal. Since the column redundancy circuit for an arbitrary memory group can be made effective according to the row hit signals, failure relief efficiency can be increased without deteriorating the electric characteristic during an access operation.

Abstract: A main liquid chamber and a secondary liquid chamber are formed on both sides of an engine side mounting member to interpose the engine side mounting member. A rubber is vulcanized and molded integrally with the engine side mounting member. A car body side mounting member is injection molded of resin material in a state where the rubber, a pipe for molding a communication hole and the caulk fittings for caulking and fixing a lid member for closing an opening portion leading to one of the main liquid chamber and the secondary liquid chamber and provided in the car body side mounting member are disposed within an injection mold.

Abstract: A forging apparatus has an upper die unit connected to an actuator for displacement in unison therewith, and a lower die unit confronting the upper die unit and mounted in a body assembly fixed to a foundation. An outer ring is guided axially by a plurality of guide pins for axial displacement on and along an outer circumferential surface of the lower die unit. The forging apparatus also has first ejector pins for removing a forged workpiece upwardly and second ejector pins for holding the workpiece when the upper die unit is displaced upwardly.

Abstract: The present invention provides novel microorganisms, Brevibacterium lactofermentum CJJA21 (Accession No. KCCM-10222), which is resistant to sodium azide, and Brevibacterium lactofermentum CJJA22 (Accession No. KCCM-10223), which is resistant to ?-aminobutyric acid. These microorganisms are capable of producing L-glutamine in a higher yield than the known strains. The present invention further provides processes for producing L-glutamine using the microorganisms of the invention.

Abstract: It is an object of the present invention to provide a control circuit and a control method for a current mode control type DC—DC converter capable of preventing a subharmonic oscillation even if an on-duty is not less than 50% and capable of preventing a switching frequency from fluctuating depending on an input voltage. When a high-level output signal Vo1 is inputted to a reset input terminal R of a flip-flop FF, a transistor FET1 is turned off. A phase comparator FC outputs a comparison result signal CONT in accordance with a phase difference between a delay signal FP and a reference signal FR. A delay circuit DLY outputs a high-level delay signal FP after the passage of a delay time DT adjusted in accordance with the comparison result signal CONT from the turn-off of the transistor FET1. The transistor FET1 is turned on in accordance with an input of the high-level delay signal FP.

Abstract: Second memory cells of a second memory block each have an area 2a times (a is a positive integer) that of each first memory cell of a first memory block. Sizing the first and second memory cells in a predetermined ratio can make easily identical the dimensions of the first memory block and the second memory block. Consequently, it is possible to easily align peripheral circuits to lie around the plurality of first and second memory blocks, such as decoders. This also facilitates the wiring of signal lines to be connected to the peripheral circuits. This makes it possible to improve the layout design efficiency for a semiconductor integrated circuit. Thus, a plurality of types of memory blocks can be formed on a semiconductor integrated circuit efficiently. The semiconductor integrated circuit can be prevented from increasing in chip size depending on the layout design, owing to its simplified layout.

Abstract: A power transmission system for a hybrid vehicle includes a motor/generator and a torque converter. The motor/generator and the torque converter are disposed in series between a crankshaft of an engine and a main shaft of a transmission. A side plate of the torque converter and a rotor disc of the motor/generator are connected via a drive plate having heat shielding properties and heat releasing properties.

Abstract: A control system for an internal combustion engine, which is capable of reducing exhaust emissions during and after the start of the engine. A control system is capable of changing the valve-closing timing of intake valves relative to the valve-opening timing thereof as desired using a variable intake valve actuation assembly. The control system includes an ECU. The ECU sets a target auxiliary intake cam phase to a start value that sets the valve-closing timing of the intake valves to retarded-closing timing, during starting of the engine, and to a catalyst warmup value that sets the same to timing closer to timing in the Otto cycle operation, during catalyst warmup control after the start of the engine.