Patents Represented by Law Firm Benman Collins & Sawyer
  • Patent number: 5955874
    Abstract: A reference voltage circuit is disclosed that is independent of the voltage supply as well as substantially insensitive to process and temperature variations. The reference voltage circuit includes an intrinsic transistor circuit which includes a plurality of intrinsic transistors of equal size. The intrinsic transistor circuit is coupled to a current mirror circuit, and a plurality of threshold transistors. In so doing, a reference voltage circuit is provided that is substantially independent of process and temperature variations. In addition, by grounding the source connections of the plurality of threshold transistors, the reference voltage circuit output voltage also is substantially independent of supply voltage variations.
    Type: Grant
    Filed: June 23, 1994
    Date of Patent: September 21, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Qimeng Zhou, Pau-Ling Chen
  • Patent number: 5834950
    Abstract: A phase detector is disclosed that eliminates frequency ripple in a phase-locked loop circuit. The detector includes first and second circuits for providing UP and DOWN signals respectively. It also includes a delay element for setting the duration of the DOWN signal so as to eliminate phase jitter and static phase offset.
    Type: Grant
    Filed: March 17, 1994
    Date of Patent: November 10, 1998
    Assignee: 3Com Corporation
    Inventors: Ramon S. Co, Richard L. Traber
  • Patent number: 5771367
    Abstract: An improved storage controller and method for storing and recovering data. The storage controller includes a first cluster for directing data from a host computer to a storage device and a second cluster for directing data from a host computer to a storage device. A first cache memory is connected to the first cluster and a second cache memory is connected to the second cluster. A first nonvolatile memory is connected to the second cluster and a second nonvolatile memory is connected to the first cluster. The first and second cache memories and the first and second nonvolatile stores are thus "cross-coupled" to the first and second clusters to provide improved data recovery capability. Data is directed to the first cache and backed up to the first nonvolatile memory in a first operational mode. In the event of failure of the first nonvolatile memory, data is recovered from the first cache memory.
    Type: Grant
    Filed: October 30, 1995
    Date of Patent: June 23, 1998
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Lawrence Carter Blount, Gail Andrea Spear, Vern John Legvold
  • Patent number: 5761453
    Abstract: A method and system provides for increasing the throughput of serial data in a computer system when a data packet is of unknown length. The method and system includes initializing a first count register to count a length field of the data packet, the length field including a value indication of the length of the data packet. The method and system further includes storing a count for a minimum data portion in a second count register and receiving the data packet from a serial device of the computer system. The method and system further provides for transferring the length value to the RAM of the computer system and loading the count for the minimum data portion into the first count register to provide primary chaining of the first count register to the second count register. The method and system finally provides for comparing a minimum data packet length to the length value in the RAM to determine whether to utilize secondary chaining of the first count register with the second count register.
    Type: Grant
    Filed: December 7, 1995
    Date of Patent: June 2, 1998
    Assignee: Apple Computer, Inc.
    Inventors: Eric C. Anderson, Scott F. Fullam, Patricia A. Scardino
  • Patent number: 5748525
    Abstract: A cell array circuit for a programmable logic device is provided with split read and write lines in the memory cell. The circuit eliminates the need for pass gates in the speed path. The circuit includes steering logic, a row line driver circuit and a row decoder circuit to facilitate the different modes of operation of the cell array circuit.
    Type: Grant
    Filed: May 6, 1996
    Date of Patent: May 5, 1998
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jack T. Wong, Fabiano Fontana, Susan Nguyen
  • Patent number: 5745379
    Abstract: An optimization method is disclosed that enhances the interactivity of multimedia information. The optimization method includes separating a multimedia information into primary and secondary layers and enhancing that information in the primary layers such that the perceived psychographic information quality is improved. This method has the advantage of providing compression and/or transmission algorithms to maximize enhancement of the multimedia information.
    Type: Grant
    Filed: August 20, 1996
    Date of Patent: April 28, 1998
    Assignee: Multimedia Systems Corporation
    Inventor: Scott W. Lewis
  • Patent number: 5723801
    Abstract: A drum shell and method of making same. A first layer of carbon fiber material is rolled into a cylindrical shape. Next, a layer of foam is wrapped over the cylinder of carbon fiber material. Finally, a second layer of carbon fiber material is rolled over the foam layer. In a more specific implementation, several sheets of carbon fiber soaked in an epoxy resin are rolled on a cylindrical mold to provide the first and second rolls thereof. After the application of the second set of sheets, the shell is vacuum dried and cut to desired lengths to complete the construction.
    Type: Grant
    Filed: June 16, 1994
    Date of Patent: March 3, 1998
    Inventor: Paul Hewitt
  • Patent number: 5696932
    Abstract: Methods and systems are disclosed which utilize Little's law to improve cache management in a computer based storage system in which the cache is a partitioned or non partitioned write-back cache. In a first aspect, a method and system for managing a write-back cache in a computer based system to accommodate for deferred write operations is disclosed. The method .and system comprises determining an average cast out delay for a cache entry. In a second aspect the method and system comprises utilizing the average castout delay for estimating the number of dirty cache entries which will be needed by the cache if the write operations rate and the average cast out delay does not change significantly. In a third aspect, a method and system for managing a partitioned and prioritized cache in a computer based system to provide sensitivity to a local maximum is disclosed.
    Type: Grant
    Filed: May 16, 1995
    Date of Patent: December 9, 1997
    Assignee: International Business Machines Corporation
    Inventor: Kevin Frank Smith
  • Patent number: 5693972
    Abstract: A process for protecting the stacked gate edge of a semiconductor device is disclosed. The process provides for providing a spacer formation before the self aligned source (SAS) etch is accomplished. By providing the spacer formation prior to the SAS etch, tunnel oxide integrity is much improved and the source junction implant profile is much more uniform because the silicon around the source region is not gouged away.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: December 2, 1997
    Assignee: Advanced Micro Devices, Inc.
    Inventor: David K. Y. Liu
  • Patent number: 5692089
    Abstract: A multiple fiber positioner (MFP) provides a micromachined structure that includes multiple V-grooves in silicon created via anisotropic etching for positioning optical fibers in splices and connectors. The MFP has a permanently bonded cover to provide a one-piece, stand-alone component. This MFP component is used to create new fiber optic splices and connectors.
    Type: Grant
    Filed: April 11, 1996
    Date of Patent: November 25, 1997
    Assignee: Fotron, Inc.
    Inventor: Gregory J. Sellers
  • Patent number: 5691920
    Abstract: A method and system for determining the efficiency of operation of a dispatch unit in a processing system, the processing system including at least one performance monitor counter (PMC) and at least one monitor mode control register (MMCR) to configure the operations of the at least one PMC, includes counting a number of instructions dispatched by the dispatch unit during a predetermined sampling period, counting a number of times a predetermined number of instructions are dispatched by the dispatch unit per cycle during the predetermined sampling period, and determining the efficiency of the dispatch unit according to the counted number of instructions and the counted number of times the predetermined number of instructions are dispatched by the dispatch unit.
    Type: Grant
    Filed: October 2, 1995
    Date of Patent: November 25, 1997
    Assignee: International Business Machines Corporation
    Inventors: Frank Eliot Levine, Charles Philip Roth, Edward Hugh Welbon
  • Patent number: 5689334
    Abstract: Contaminants are detected optically at concentrations below 1 part-per-million (ppm) and extending to a level approaching 1 part-per-trillion (ppt) by using intracavity laser spectroscopy (ILS) techniques. A solid-state laser with an ion-doped crystal medium contained in an optical resonator cavity (the ILS laser) is employed as a detector. A gas sample containing gaseous contaminant species is placed inside the optical resonator cavity and on one side of the ion-doped crystal. The output signal from the ILS laser is detected and analyzed to identify the gaseous species. The concentration of the gaseous species can be determined as well.
    Type: Grant
    Filed: September 1, 1995
    Date of Patent: November 18, 1997
    Assignee: Innovative Lasers Corporation
    Inventors: George H. Atkinson, Yehoshua Kalisky, Jiamin Zhang, Max F. Hineman, Esmail Mehdizadeh, Markus Wolperdinger
  • Patent number: 5689677
    Abstract: A circuit for modifying an instruction stream comprises a first logic circuit capable of issuing instructions and a second logic circuit means responding to the instructions. The circuit also includes a dynamic memory circuit which is responsive to the first logic and a dynamic memory means. The first logic circuit is capable of causing a refresh of the dynamic memory means by inserting a refresh instruction into a sequence of instructions.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: November 18, 1997
    Inventor: David C. MacMillan
  • Patent number: 5689374
    Abstract: An optical element having an optical axis, and comprising a plurality of definable adjacent zones of optical material, each zone having a definable refractive index different from the refractive index of an adjacent zone and an Abbe number, the zones of optical materials being arranged parallel to each other to define a profile of refractive indices which is symmetric about a plane of symmetry along the optical axis of the element and parallel to the zones. In one embodiment the optical element is a spectrally invariant lens.
    Type: Grant
    Filed: March 8, 1995
    Date of Patent: November 18, 1997
    Assignee: LightPath Technologies, Inc.
    Inventors: Xiaojie Xu, Michael E. Savard
  • Patent number: 5689472
    Abstract: Apparatus, method, and system aspects for providing efficient accesses to memory in a computer system, the computer system including a controller, are described. Included in the aspects are a random access memory array having a plurality of rows and columns and coupled to the controller, and a column selection mechanism coupled to the memory array and the controller with the column selection mechanism being divided into predetermined portions for providing column selection signals to access chosen portions of a row in the memory array. Further included as the column selection mechanism is a multiplexer. In one embodiment, the multiplexer is divided into halves and provides separate selection signals for accessing upper word halves and lower word halves of the random access memory.
    Type: Grant
    Filed: October 31, 1996
    Date of Patent: November 18, 1997
    Assignee: Silicon Magic Corporation
    Inventors: Greg L. Tanaka, Sean H. Kuo
  • Patent number: 5686761
    Abstract: The present invention is directed to improving the throughput of the process for fabricating multilayer interconnects. Tungsten plugs, formed in contact/via openings etched in an interlayer dielectric, have been widely used in industry to form interconnection between different metal layers. An adhesion layer comprising a Ti/TiN stack is typically employed to support the adhesion of the tungsten plug in the contact/via openings. The present invention is directed to a process involving the formation of a Ti/TiN landing pad at the base of contact/via openings prior to the deposition of the interlayer dielectric. The process of the present invention enables the removal of the Ti under-layer and the reduction of the TiN thickness in the Ti/TiN stack. The throughput of the process for fabricating multilayer interconnects is thus greatly improved while the integrity of the devices are maintained.
    Type: Grant
    Filed: February 29, 1996
    Date of Patent: November 11, 1997
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Richard J. Huang, Christy M.-C. Woo
  • Patent number: 5684366
    Abstract: A lamp protection device includes a circuit to prevent a lamp from being switched on at full line voltage and which provides for the gradual heating of the filament to reduce the expansion rate of the filament. The circuit is connected to a switched alternating current power source and to an incandescent bulb. The circuit includes two silicon controlled rectifiers which are connected in reverse parallel configuration. One of the silicon controlled rectifiers being connected to a capacitor to prevent the full sinusoidal AC current from reaching the lamp until a time delay has expired after the lamp is turned on. A reference switch is connected to the other silicon controlled rectifier to permit the bulb to be turned on only when the AC voltage crosses zero.
    Type: Grant
    Filed: August 3, 1995
    Date of Patent: November 4, 1997
    Assignee: W.W. Magee, Ltd.
    Inventors: Alexei Bogdan, Emil Sagal
  • Patent number: 5684513
    Abstract: An electronic luminescence keyboard system in a portable device which includes a plurality of keypads and an illuminated panel which displays information responsive to the pressing of at least one of the plurality of keypads is disclosed. The improvement comprises a conductor element for conducting a portion of the light from the illuminated panel and illuminator element coupled to the conductor element for illuminating the plurality of keypads with the portion of the light from the illuminated panel. Through the use of a portion of the light from the display panel is utilized to illuminate the keyboard thereby allowing for observation of the keypads on the keyboard when the surrounding area is dimly lit. The ELK system has no effect on the power consumption on the portable device. In an embodiment the ELK system provides for backlighting the keyboard. In a second embodiment the ELK system provides light to a top portion of the keypads.
    Type: Grant
    Filed: July 17, 1995
    Date of Patent: November 4, 1997
    Inventor: Mark Randall Decker
  • Patent number: 5680348
    Abstract: A system and method for providing a constant electric field that is insensitive to fluctuations in the power supply to a FLASH EPROM during erasure. The system comprises a plurality of sector source drivers and a power supply insensitive constant current source. Each sector has at least one binary storage element. Each storage element has a source. The sector source drivers couple the at least one source of a sector to be erased to the power supply insensitive constant current source. The power supply insensitive constant current source provides an electric field across the tunneling oxide which is constant and insensitive to fluctuations in the power supply. This improves the wear characteristics and lifetime of the binary storage elements. In addition, this system remedies problems associated with short channel effects, electron trapping, and the use of various voltage sources.
    Type: Grant
    Filed: December 1, 1995
    Date of Patent: October 21, 1997
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael Chung, James Yu
  • Patent number: D386219
    Type: Grant
    Filed: June 17, 1996
    Date of Patent: November 11, 1997
    Inventor: Johnny Sharp