Patents Represented by Attorney, Agent or Law Firm Blakely, Sokoloff, Talyor & Zafman
  • Patent number: 7310387
    Abstract: A quadrature transceiving system for compensating a direct current (CD) offset, a gain imbalance and a phase imbalance between an I-channel signal and a Q-channel in a quadrature transmitting system is disclosed. The quadrature transceiving system includes a transmitter for detecting a DC offset, a gain imbalance and a phase imbalance by using an average of a data aided signals included in a RF transmitting signal and compensating one of the I-channel and the Q-channel based on the detected imbalances and DC offset; and a receiver for detecting a DC offset, a gain imbalance and a phase imbalance by varying loop filter gain and compensating one of the I-channel and the Q-channel based on the detected imbalances and DC offset.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: December 18, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: PanSoo Kim, Ho-Jin Lee
  • Patent number: 7301940
    Abstract: A system and method for communicating via a packet telephony distribution system is defined that includes a dual-use/analog phone or phone adapter. Any communication device incorporating the adapter can dynamically receive incoming calls and transmit outgoing calls over analog phone lines and over derived phone lines such as VoIP (Voice Over IP). When receiving or transmitting calls, the adapter and an associated gateway perform operations that enable simultaneous communication over the analog phone lines or derived phone lines from any combination of communication devices. In cooperation with the communication devices, the gateway further dynamically controls the incoming and outgoing calls over the analog phone lines and derived phone lines.
    Type: Grant
    Filed: July 18, 2002
    Date of Patent: November 27, 2007
    Assignee: 2Wire, Inc.
    Inventor: Jeffrey G. Bernstein
  • Patent number: 7274875
    Abstract: An optical channel power equalizer for equalizing the per-channel power levels of a multi-channel optical signal is provided. The channel power equalizer includes an optical spectrum measurement unit that extracts a portion of the amplified optical signal and measures the per-channel power levels of the extracted optical signal; a controller that compares the measured power levels with a predetermined reference value, and determines to output the degrees of attenuation per channel based on differences between the measured per-channel power levels and the reference value; and a per-channel optical attenuation unit that attenuates the per-channel power levels of a plurality of input optical signals based on the degrees of attenuation and outputs the attenuated optical signals as the plurality of channels.
    Type: Grant
    Filed: November 25, 2003
    Date of Patent: September 25, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Ji Wook Youn, Hyun Jae Lee, Yool Kwon
  • Patent number: 6643702
    Abstract: A method comprising initializing an eligibility bit map and determining whether at least one eligible route has required resources available is disclosed.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: November 4, 2003
    Assignee: Omneon Video Networks
    Inventor: Pauline Sai-Fun Yeung
  • Patent number: 6272152
    Abstract: A method and a system for authenticating an electronic financial transaction conducted between a user owning a terminal and a third party via two-way transmissions between the terminal and a cable distribution hub which includes a validation server.
    Type: Grant
    Filed: April 8, 1999
    Date of Patent: August 7, 2001
    Assignee: TVN Entertainment Corporation
    Inventors: Stuart Z. Levin, Leo I. Bluestein
  • Patent number: 6091618
    Abstract: A method and circuitry for programming a memory cell to one of at least three amounts of charge. The amount of charge placed in the memory cell is increased by increasing the voltage level of a programming pulse applied to the memory cell.
    Type: Grant
    Filed: August 13, 1997
    Date of Patent: July 18, 2000
    Assignee: Intel Corporation
    Inventors: Albert Fazio, Gregory E. Atwood, James Q. Mi
  • Patent number: 5935249
    Abstract: A secure, trusted network management function embedded within a network interface device is provided. The network interface device connects a host computer to a network and contains a host bus interface, a network interface, and control logic. The network interface device incorporates a secure language processor, non-volatile memory, and a carrier sense circuit. The secure language processor executes a secure language program, and the non-volatile memory stores identification keys for remote devices and objects of value for network applications. If an application program is to be executed or accessed by the host computer, the secure language processor verifies that the object of value allows such execution or access. If a remote network device attempts to control the functionality of the network interface device, the secure language processor verifies that the remote network device has the authority to issue such a command.
    Type: Grant
    Filed: February 26, 1997
    Date of Patent: August 10, 1999
    Assignee: Sun Microsystems, Inc.
    Inventors: Hal L. Stern, Gregory M. Papadopoulos
  • Patent number: 5894438
    Abstract: The present invention provides a method for programming and erasing a plurality of flash memory cells simultaneously while the power consumptions for those operations are significantly reduced, and the method for programming a memory cell of a flash memory device, wherein the memory cell is formed on a P-well surrounded by an N-well of a semiconductor substrate, including the steps of: applying a negative voltage to a control gate of the memory cell; applying a positive voltage to a drain of the memory cell; applying a positive voltage to the P-well, wherein the voltage is the same as or lower than the voltage applied to the drain; applying a power supply voltage to the N-well; and leaving a source of the memory cell uncoupled, wherein the steps are performed either in sequence or at random.
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: April 13, 1999
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Tae Hum Yang, Young Dong Joo, Joo Young Kim, Jong Bae Jeong, Jong Seuk Lee
  • Patent number: D524602
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: July 11, 2006
    Assignee: Click Clack Limited, a New Zealand Company
    Inventor: Giovanni Arduini
  • Patent number: D524877
    Type: Grant
    Filed: October 6, 2005
    Date of Patent: July 11, 2006
    Assignee: Imperial Toy LLC
    Inventors: Susan M. Kort, Robert J. Ivanic, Joseph Wong Wai Ching