Patents Represented by Attorney, Agent or Law Firm Bradley A. Forrest
  • Patent number: 4847749
    Abstract: A recovery mechanism restarts jobs following correction of a system failure and automatically marks the jobs for interruption at a logical boundary. The logical boundary is above logical file updating functions such that logical files are in a known state when jobs reach the boundary. When a system failure is detected which has not yet resulted in lost data, an image of working memory, including hardware status is saved on nonvolatile storage. After the failure has been resolved, the system is initially loaded with operating programs (IPL) and working memory is reloaded from the nonvolatile storage. All jobs which were reloaded are marked for interrupt at a machine instruction boundary, and processing is started. After all jobs have reached the boundary, or a predetermined time has elapsed, processing is stopped and the system is re-IPLed. There are few system index recoveries to be performed, since most jobs reached a point where logical files were synchronized with corresponding data.
    Type: Grant
    Filed: June 13, 1986
    Date of Patent: July 11, 1989
    Assignee: International Business Machines Corporation
    Inventors: Robert W. Collins, William S. Davidson, Steven M. Dickes, James S. Effle, Carle J. Larson, Russell J. Weinschenk, Peter M. Wottreng
  • Patent number: 4841232
    Abstract: In an integrated circuit chip utilizing CMOS technology, an embedded data bus is driven by embedded three state drivers, and the bus is in turn connected to provide a drive signal to embedded receivers and similar logic devices. An embedded threshold detector is provided to detect the occurrence of any invalid data signal (i.e. a non-"0" or a non-"1" signal level) on the data bus. The threshold detector's output signal is connected to off chip terminal means, to thereby enable off chip monitoring of the bus signal. The threshold detector's output signal is also ANDed with the bus signal, to thereby prevent the application of a potentially destructive invalid bus signal to the receivers and the like. Terminator circuit means provides a known invalid signal state on the bus when the bus is in its high impedance state due to all of the three state drivers being disabled.
    Type: Grant
    Filed: April 29, 1988
    Date of Patent: June 20, 1989
    Assignee: International Business Machines Corporation
    Inventors: Patricia K. Graham, Robert R. Williams
  • Patent number: 4819156
    Abstract: A quick recovery of logical files which provide alternate views of databases is provided. Unchanged logical file pages are journaled before being changed. Transactions affecting databases covered by the logical files are also journaled. To recover a logical file, the journaled unchanged pages of the logical file that correspond to the changed pages are inserted back into the logical file, and the transactions that were journaled are processed to provide the changes to the logical file and to the database. This brings the logical file and the underlying database up to date, and in synchronization with each other.
    Type: Grant
    Filed: June 13, 1986
    Date of Patent: April 4, 1989
    Assignee: International Business Machines Corporation
    Inventors: Dennis S. DeLorme, Mark L. Holm, Wilson D. Lee, Peter B. Passe, Gary R. Ricard, George D. Timms, Jr., Larry W. Youngren
  • Patent number: 4810322
    Abstract: An anode for a reactive ion etching (RIE) system has a plurality of holes formed therethrough. The holes produce a plasma glow about each hole which results in an increase in the etch rate of wafers to be etched on a cathode opposite the holes. The holes are arranged in the anode to provide a uniform etch rate on one wafer or a batch of wafers to be etched. By varying the pressure in the system, the presence of plasma glow and hence the etch rate uniformity is controlled.
    Type: Grant
    Filed: November 3, 1986
    Date of Patent: March 7, 1989
    Assignee: International Business Machines Corporation
    Inventors: George M. Gut, Steven E. Monahan
  • Patent number: 4794560
    Abstract: A thermally written magnetic data storage medium retains desired domains of magnetization having field orientations representative of the data. A first magnetic layer retains one or more domains of desired magnetic field orientations. A second magnetic layer provides a biasing field for obtaining a predetermined magnetic field orientation in the first magnetic layer as a function of the temperature of the second magnetic layer. Disposed between the first and second layers is a thermal isolation layer which provides a thermal barrier for controlling the temperature of the second magnetic layer means. When the medium is heated for a short time, the fringe field from the first layer causes one direction of magnetic orientation to occur in a domain in the first layer. Upon cooling of the domain, the domain magnetization becomes stable with an orientation conforming to the orientation of the fringe field. The thermal isolation layer prevents significant heating of the second layer.
    Type: Grant
    Filed: September 30, 1985
    Date of Patent: December 27, 1988
    Assignee: International Business Machines Corporation
    Inventors: Alan E. Bell, Gary C. Bjorklund, Barry H. Schechtman
  • Patent number: 4785452
    Abstract: A variable number of parity bits or error correction code per word is used to increase error detection for words having the extra parity bits in a control store. Since some words do not utilize all the architected space available for words, extra parity bits are generated at development time for such words and stored with the words. A decoder identifies the location and number of parity bits. Parity checking against the extra parity bits is then performed on different groups of bits in the word. This provides an inexpensive means of increasing error detection with minimal hardware cost.
    Type: Grant
    Filed: April 25, 1986
    Date of Patent: November 15, 1988
    Assignee: International Business Machines Corporation
    Inventors: Bruce R. Petz, Richard P. Rieger, Andrew D. Walls
  • Patent number: 4782300
    Abstract: A differential transceiver transmission line integrity detector detects both open and short circuits in the transmission lines. The two transmission lines are terminated at both ends by selected impedances. A driver coupled to each of the transmission lines drives the lines with data signals. Signal levels on the lines are detected and compared with expected levels to generate line integrity indications. Both open and short conditions are detected and indicated by the line integrity indications.
    Type: Grant
    Filed: March 3, 1986
    Date of Patent: November 1, 1988
    Assignee: International Business Machines Corporation
    Inventors: Anthony R. Bonaccio, Brent A. Carlson, Lloyd S. Heim, Kenneth A. Moe, Steven A. Schmitt
  • Patent number: 4774657
    Abstract: A key estimator estimates the number of keys over a key range defined by key endpoints in an index to a data space. The number of keys in the key range required to be processed for a particular operation is estimated as a function of the number of pages referenced during a range level limited search. Two keys defining range endpoint keys are searched down to their lowest level in the tree. The level limit is then calculated as a function of desired granularity or accuracy of the estimate. The entire range of keys in the desired key range is then searched down to the level limit and the number of pages referenced during the search is counted and multiplied by an average key density per page to calculate the number of keys in the range.
    Type: Grant
    Filed: June 6, 1986
    Date of Patent: September 27, 1988
    Assignee: International Business Machines Corporation
    Inventors: Mark J. Anderson, Richard L. Cole, William S. Davidson, Wilson D. Lee, Peter B. Passe, Gary R. Ricard, Larry W. Youngren
  • Patent number: 4774712
    Abstract: A memory device for storing data and providing address and data line error detection is disclosed. A memory holds two copies of data, each copy of data having opposite parity dependent on its address. An address sequencer provides addresses to the memory. The addresses are modified to select the copy of data in the memory having a predetermined first parity. A parity checker checks the parity of data provided by the memory and provides an error indication if the parity is incorrect, said error indication being indicative of address and data line errors and memory cell errors. When an error is indicated by an error latch, the error causes a retry of the memory in the location where the desired data is stored with parity opposite the first parity.
    Type: Grant
    Filed: October 1, 1986
    Date of Patent: September 27, 1988
    Assignee: International Business Machines Corporation
    Inventor: Steven D. Lewis
  • Patent number: 4761785
    Abstract: A storage management mechanism distributes parity blocks corresponding to multiple data blocks substantially equally among a set of storage devices. N storage units in a set are divided into a multiple of equally sized address blocks, each containing a plurality of records. Blocks from each storage unit having the same address ranges form a stripe of blocks. Each stripe has a block on one storage device containing parity for the remaining blocks of the stripe. Further stripes also have parity blocks, which are distributed on different storage units. Parity updating activity associated with every change to a data record is therefore distributed over the different storage units, enhancing access characteristics of the set of storage devices. The parity updating activity also includes the use of an independent version number stored with each data record and corresponding version numbers stored with the parity record.
    Type: Grant
    Filed: June 12, 1986
    Date of Patent: August 2, 1988
    Assignee: International Business Machines Corporation
    Inventors: Brian E. Clark, Francis D. Lawlor, Werner E. Schmidt-Stumpf, Terrence J. Stewart, George D. Timms, Jr.
  • Patent number: 4755932
    Abstract: An interpreter is provided which enables a user of a computer to add additional function to existing programming applications independent of the applications. The interpreter interfaces between an advanced function, such as voice synthesis, and an application, such as an office calendar and mail system. The user defines the part of the application on which to apply the voice synthesis in a high level computer language. This definition can include transformation of touch tone pulses to commands for the application as would generally be entered by keyboard. The definition then applies the function as directed by the user, such as to read the mail, or read the calendar, either by means of speaker coupled to the computer or over telephone lines to a remote user.
    Type: Grant
    Filed: October 15, 1985
    Date of Patent: July 5, 1988
    Assignee: International Business Machines Corporation
    Inventor: Richard A. Diedrich
  • Patent number: 4734900
    Abstract: Width restoring to eliminate unintended width variations in pulse width modulated data in combination with a phase lock loop allows pulse width modulated data in high density optical recordings. The width restoration is accomplished by detecting the timing relationship of the leading and trailing edges of pulses relative to expected timing for the leading and trailing edges. Expected time is derived from a phase locked loop or the original write signal. The detected timing is compared to the expected timing and the timing of the leading and trailing edge signals is corrected. Either analog or digital width correction techniques are used. Width restoration may be used while reading data or while writing the data.
    Type: Grant
    Filed: April 25, 1986
    Date of Patent: March 29, 1988
    Assignee: International Business Machines Corporation
    Inventor: Neil R. Davie
  • Patent number: 4730251
    Abstract: An automatic address assignment system has a plurality of I/O devices coupled to a bus. Each device contains a unique machine-readable identifier which is used to select the device for address assignment. The identifier is a binary bit string. Each bit position in the bit string is selected by the host in a serial manner with the host specifying which binary value is being solicited. All devices whose identifier digit matches the solicited value respond positively and remain in contention for address assignment. The other devices will not respond and drop out of contention for address assignment until the sequence is restarted from the first bit. After the bit sequence is completed, the address for that device is bused to the device, and the sequence is restarted from the first bit until all devices have been assigned an address.
    Type: Grant
    Filed: October 28, 1985
    Date of Patent: March 8, 1988
    Assignee: International Business Machines Corporation
    Inventors: David E. Aakre, Douglas J. Abrahamson, Neil C. Berglund, Vincent A. Bettermann, Lloyd S. Heim, Kenneth A. Moe
  • Patent number: 4683505
    Abstract: A disk pack assembly for use in a disk drive has disks which are alternately diametrically offset about a spindle axis of rotation. The disks are positioned as a function of their outer edges such that alternate opposite outer edges line up as though they were the outer edges of centered nominal diameter disks. This results in an increase in the number of axial nodal points for potential imbalance moments and reduces the amplitude of associated vibrations. Disk spacers are also alternately diametrically offset about the spindle axis so tht pairs of like components tend to balance each other to minimize potential vibrations.
    Type: Grant
    Filed: December 24, 1984
    Date of Patent: July 28, 1987
    Assignee: International Business Machines Corporation
    Inventors: Laurence J. Schmidt, Randall L. Severson, Lyle R. Tufty, Steven H. Voss
  • Patent number: 4676672
    Abstract: A spindle assembly has a shaft with at least two axially spaced expandable shaft sections. The expandable shaft sections serve to couple the spindle to a bearing assembly having inner races. The expandable shaft sections are expanded elastically and uniformly into retentive contact with the inner races to provide radial and axial support for the spindle assembly.
    Type: Grant
    Filed: June 19, 1986
    Date of Patent: June 30, 1987
    Assignee: International Business Machines Corporation
    Inventor: Lyle R. Tufty
  • Patent number: 4663708
    Abstract: A synchronization mechanism is disclosed for controlling devices or sub-systems connected to a common bus in a multiprocessing system so that the devices are kept in step one with the other when performing sequences of operations. More specifically, the mechanism ensures that no device can start its (i+1)th operation until all devices have completed their ith operation. This is achieved by providing each device with three synchronizing logic blocks (LB1, LB2, LB3) (LB', LB2', LB3') each of which functions to generate control signals (p, q, r respectively) on associated control lines at the end of selected operations in the sequence of operations. The control lines monitoring the performance of corresponding operations in all the devices are each applied via logic circuits (L1 or L2 or L3 as appropriate) (L1' or L2' or L3') to one of three selected bus lines (P, Q, R respectively).
    Type: Grant
    Filed: July 6, 1984
    Date of Patent: May 5, 1987
    Assignee: International Business Machines Corporation
    Inventor: Daniel M. Taub
  • Patent number: 4649519
    Abstract: A layer in a magnetic storage medium provides a biasing magnetic field for writing data. The layer exhibits a net magnetization with an orientation in a first direction when the layer is at a temperature below its compensation temperature and a net magnetization with an orientation in a second direction different from the first direction when heated as by a laser to a temperature above its compensation temperature, but below its Curie point temperature.
    Type: Grant
    Filed: September 30, 1985
    Date of Patent: March 10, 1987
    Assignee: International Business Machines Corporation
    Inventors: Shu S. Sun, Curt W. Laumann
  • Patent number: 4649473
    Abstract: An interprocess data transfer facility provides transfer of data between two processes. Work requests are represented by notes that are placed on a queue of a server process for performing the work. The requestor process which created a work request does not transfer the work request from storage it controls until requested by the server. The actual transfer of the work request occurs without interaction of the requestor. The use of notes which represent the work requests permits complex queueing of notes and hence handling of the requests in the order desired by the server.
    Type: Grant
    Filed: June 17, 1985
    Date of Patent: March 10, 1987
    Assignee: International Business Machines Corporation
    Inventors: William E. Hammer, Walter H. Schwane, Frederick J. Ziecina
  • Patent number: 4648033
    Abstract: A look-aside buffer in a computer system has a memory containing at least a first type of data ans a second type of data stored in a page format. The look-aside buffer is arranged to retain at least two different real addresses as resolved by the system which indicate pages containing the different types of data. One of the addresses is indicated as least recently used by a marker and such address is deleted when a further different address is resolved by the system unless the address being resolved is an address corresponding to the first type of data. In such a case, the marker is not changed such that the second type of data addresses are not deleted from the look-aside buffer as a result of resolution of a first type data page address by the system.
    Type: Grant
    Filed: September 7, 1984
    Date of Patent: March 3, 1987
    Assignee: International Business Machines Corporation
    Inventors: David O. Lewis, Lynn A. McMahon, Terry L. Schardt
  • Patent number: 4620243
    Abstract: A transducer head on a disk drive apparatus is offset about an expected center of a data track as indicated by servo information not included in the data track. If data does not have a predetermined level of readability, the head is known to be shifted with respect to the track. The data is then incrementally read and rewritten in a track centered about its expected center as indicated by the servo information. The amount of data incrementally rewritten at one time is a function of the disk characteristics and the amount of resources available to temporarily store the data. If more than one track appears shifted with respect to the head, the order of rewriting the tracks is selected to minimize risk of overlapping the tracks during the writing.
    Type: Grant
    Filed: August 29, 1985
    Date of Patent: October 28, 1986
    Assignee: International Business Machines Corporation
    Inventors: Kirby L. Bakken, Robert G. Judson, William E. Miller, Ronald A. Peterson