Abstract: The present invention includes an adaptive filter (40) for use within an echo canceler. The adaptive filter operates in a first mode for performing Decimation Echo Location (DEL). During the DEL mode, high energy regions occurring within the echo impulse response are identified over an extended time range through signal decimation. The adaptive filter then operates in a second mode for performing Partitioned Echo Cancellation (PEC). During the PEC mode, filter coefficients not associated with these high energy regions are modeled as zero while the identified high energy region filter coefficients of the impulse response are partitioned and convolution of the reference signal, x(n), with the impulse response signal, h(n), is accomplished by performing convolution on only those samples in the reference signal memory block (50) that correspond to respective high energy region filter coefficients in the adaptive filter block (56).

Abstract: A fuse (12) detonates a spin-stabilized projectile (10) after the fuse (12) experiences a preset number of turns. The preset number is communicated (64) to the fuse (12) prior to launch. A semiconductor piezoelectric strain gauge (26) senses stress and provides a signal which is responsive to centrifugal forces experienced by the sensor (26) as a result of projectile spin. A microcontroller (30) repetitively digitizes and translates the sensor signal to determine turn numbers, which the microcontroller (30) integrates to determine the total number of turns experienced by the fuse (12) since launch. When the accumulated turn number reaches (94) the preset number, the fuse (12) detonates the projectile (10). However, an arming duration (76) must have expired before the projectile (10) can detonate, and the projectile (10) can detonate at any time following the expiration of the arming duration when an impact is detected.

Abstract: A method and apparatus for performing adaptive filtering in a high interference environment, such as for a radio, modem, or local area network. The adaptive filtering simultaneously provides interference excision while canceling resultant distortion in the signal caused by synthesizing the notch used to excise the interfering signal. An input signal (13) is pre-filtered (14) and the pre-filtered signal (15) is processed by a rejection filter (12) which combines weighted delayed versions of the pre-filtered signal (40, 42, 44, 46, 48, 50), weighted delayed versions of data decisions corresponding to the same delays as that used in the pre-filtered signal (60, 62, 64, 66, 68, 70), and a post filtered signal (27) to produce the filtered signal (19). The filtered signal (19) is processed by a data and coefficient estimator (18) to provide data decisions (25) and tap weight values (21, 23).

Abstract: Security is provided for an inside network (14) by a security host (26). Connection request messages sent from source hosts (22) in an outside network (12) are intercepted (94) in the security host (26) and prevented from being transmitted on the inside network (14). The user of the source host (22) then establishes a connection (78) to the security host (26) where a dialog session (80, 98, 100) occurs to confirm the user's authenticity and authorization. After the user is confirmed, the intercepted connection request message is released (116) for transmission on the inside network (14) where the intended application service will respond and a communication session will commence.

Abstract: A numerically controlled oscillator (NCO) (10) or direct digital synthesizer (DSS) includes a phase accumulator (12, 28, 30), a phase to amplitude converter (24), and a digital to analog converter (26). The phase accumulator is partitioned into a high speed phase accumulator stage (44) and a low speed phase accumulator stage (46). The high speed stage (44) performs modulo accumulation on the most significant N.sub.M bits of the entire phase word. The low speed stage (46) performs modulo accumulation on the least significant N.sub.L bits of the entire phase word. The low speed stage (46) supplies a carry signal to the high speed stage (44). The low speed stage (46) operates with an accumulation period that is 2.sup.X times slower than the accumulation period for the high speed stage (44). A phase output is taken from the most significant N.sub.p of the N.sub.M bits accumulated in the high speed stage (44), where desirably N.sub.M .gtoreq.N.sub.p +X.

Abstract: A method and apparatus to dynamically allocate instructions to programmable processing element decoders (78, 79, 80) in a SIMD processor (100) includes a source code instruction (71) for the processor is parsed (1) into components (75, 76, 77) that apply to specific processing elements (60, 61, 62). The components (75, 76, 77) are used to determine control signals (90, 91, 92) that must be generated from the processing element instruction decoders (50, 51, 52) in order to execute the given instruction. If a processing element instruction decoder (50, 51, 52) is not capable of producing the necessary control signals (90, 91, 92), the decoder (50, 51, 52) must be reconfigured to do so. Then the processing element instruction (75, 76, 77) that will generate the specified control logic can be determined and returned to the assembler or compiler so that the assembly or compilation of the program can be completed.

Abstract: This invention relates to a method and apparatus for controlling a biphase modulator (602, 702) to improve autocorrelation in pseudorandom noise coded systems. The biphase modulator modulates a carrier frequency with one of two phase states responsive to a pseudorandom noise (PN) binary code sequence. The spectrum (610, 710) at the output of the biphase modulator comprises a plurality of spectral lines separated by the code repetition frequency, including a center spectral line (611, 711) and at least one adjacent spectral line (612-615, 712-717). The magnitude of the center spectral line is measured and compared to a reference to produce a control signal which is responsive to the magnitude of the center spectral line. This control signal is supplied to the biphase modulator for maintaining a predetermined magnitude of the center spectral line thereby achieving a desired spectrum output and improving autocorrelation of the system.

Abstract: A pseudorandom noise coded system (100) compensates for imperfections, improving out of range rejection, and includes a digital correlator (200) having a first complex multiplier (202) receiving a sequence of sampled data words and a sequence of precomputed complex data words and producing a sequence of first complex product words. A second complex multiplier (204) receives the sequence of first complex product words and a precomputed constant word and produces a sequence of second complex product words. A complex multiplexer (206) receives a sequence of binary code states, and the sequences of first and second complex product words and produces a sequence of complex multiplexer output words formed as a replica of either the first or the second complex product words, depending on the binary code. A complex accumulator (208) receives the sequence of complex multiplexer output words and produces a complex accumulated sum word formed as a complex sum of the complex multiplexer output words.

Abstract: An automatic vehicle location system (10) includes a radio positioning system receiver (14) which receives GPS radio signals (18) and includes a two-gimbaled gyroscope (22), which is used by a dead-reckoning positioning system. A controller (43) determines position based upon the radio positioning system when the radio signals (18) are available and upon dead-reckoning when the radio signals (18) are not available. The dead-reckoning process is based upon a compensation factor which is established in response to data received from the radio positioning system (14). The compensation factor acts as an adjustment to an inner gimbal angle to compensate for a minor drift away from level by the inner gimbal (32).

Abstract: A receiver performs rapid adaptive interference canceling for use in despreading multiple CDMA channels sharing the same RF front end. The receiver includes a buffer (22) for providing for overlapping time samples and rate adaptation, a windowing function (24) for improving interference rejection capability and a FFT (26) for calculating the input power spectrum. The receiver further includes a circuit (28, 30) to whiten the input power spectrum. The whitened power spectrum is multiplied (32) against the frequency domain version of different spreading sequences and the inverse FFT (40) of the product is performed. The output of this inverse FFT is buffered (44) to provide multiple despread output channels, with a plurality of code phases for further processing.

Abstract: A dielectric resonator image reject mixer and method comprises an amplifier for amplifying a receive frequency (RF) signal and outputting a first combined signal comprising a RF signal, a RF noise signal, and an image noise signal. A dielectric resonator image rejector is coupled to the amplifier. The dielectric resonator image rejector receives the first combined signal but outputs only a second combined signal comprising the RF signal and the RF noise signal to a mixer coupled to the dielectric resonator image rejector. The image noise signal is rejected by either reflection or resonant transmission to a resistor-terminated microstrip line. A mixer mixes the combined RF signal and the RF noise signal from the dielectric resonator image rejector with a local oscillation frequency signal, producing an intermediate frequency output signal.

Abstract: The present invention provides a method for determining timing delays associated with the placement and routing delays of an integrated circuit. In particular, the present invention determines the area of each region wherein a region includes a group or subgroup of circuit elements for use in designing an integrated circuit. Once the area for each region is obtained, substantially more accurate and more design specific wireload model and net parasitics can be obtained. The wireload models or net parasitics can then be supplied to other CAE tools to create a modified netlist. Moreover, the present invention provides a process which allows the user to account for the RC time constant effects of wire delay on a hierarchical block basis thereby improving the accuracy of the wire placement and routing delay estimate while preserving the performance benefits of a traditional simplified equation.

Abstract: A cellular communication network (10) and method operates at frequencies above 2 GHz and achieves widespread coverage within a cell (14) by adapting routing channels, symbol rates, and FEC coding processes (78) to current RF broadcast conditions. A portion of subscriber nodes (16) act as repeaters for a base node (12). If subscriber nodes (16) cannot directly communicate with the base node (12), their communications may be indirectly routed to the base node (12) through one or more repeating subscriber nodes (16'). If current conditions do not support a high data rate, then lower data rates are supported by selection of FEC coding processes (78). If increasingly inclusive FEC coding does not achieve a data rate supportable by current conditions, slower symbol rates may be used. Communications at slower symbol rates may utilize narrower frequency bands thus keeping wider frequency bands available for higher speed usage.

Abstract: An integrated radiating and coupling device (30) for a duplex communication radio (26) is formed using a ferrite body (36) having first and second surfaces. A multi-port circulator (40) is mounted on the first surface. The circulator (40) has at least three ports; a transmitter port (42), a receiver port (44), and an antenna port (38). A patch antenna (32) is mounted on the second surface and connected to the antenna port (38) by, for example, a wire passing through a via hole in the ferrite body (36). The device (30) provides transmitter and receiver isolation, antenna coupling, and filtering in a single integrated structure.

Abstract: A method and apparatus for hardening current steering logic (CSL) to soft errors (charged particles passing through and upsetting the logic state of an integrated circuit) includes a hardened CSL circuit or cell (20), including three or more circuit cell elements (21) in parallel. The circuit cell elements (21) redundantly perform a single cell function. Each of the circuit cell elements (21) is coupled to soft error immune resistive elements (24 and 25) within a summing element (22). Current (23) is steered through the resistive elements (24 and 25) depending upon input signals (26) to each of the circuit cell elements (21). The logical output signal (27) is unaffected by a single soft error event since the majority of the total current (23) remains steered through the correct resistive element (24 or 25).

Abstract: A computer system includes a Key Certification Agency (KCA) (12), a host computer (16), and a number of remote terminals (14). The KCA (12) uses incompatible encryption processes (96, 98) to encrypt session control data and to store the data as various messages (44, 46, 48) in a user token (26). The token (26) may be removably installed in any remote terminal (14). To set up a communication session, the token uncovers one of the messages (48) using a crypto-uncovering agent which is known to the user. This message includes a remote traffic key after deciphering, but the key is never transmitted to the host. The host (16) deciphers the other messages (44, 46) and constructs a host traffic key in response to data contained therein. No plain text is transmitted during the setup or the session.

Abstract: A dual traveling wave resonator filter includes a microstrip line to receive an input signal at a first end and first and second traveling wave resonator rings. Each traveling wave resonator ring is in close proximity to the microstrip line such that first and second resonant first combined signals are induced, respectively, in each of the first and second traveling wave resonator rings in response to the input signal on the microstrip line. A band-reject signal is rejected from the microstrip line and a pass-band signal is produced from the microstrip line at a second end.

Abstract: A microwave monolithic integrated circuit (MMIC) RF-generated bias circuit and method includes an input for receiving an RF signal. A rectifier coupled to the input and to electrical ground produces a rectified RF signal in response. A voltage divider coupled to the rectifier and to the electrical ground receives the rectified RF signal and produces a DC voltage therefrom. An output is coupled to the voltage divider for applying the DC voltage to a MMIC field effect transistor (FET) for biasing. No separate bias battery is required, and efficiency is optimized because the generated bias voltage increases to the point where the amplifier voltage begins to decrease, which in turn reduces the generated bias voltage. The derived bias voltage may be used to control other circuits (e.g., other amplifiers, oscillators, mixers, etc.) which require detection of RF presence.

Abstract: A method and apparatus for power combining or dividing handles high impedance line requirements in n-way combiners (15) and dividers (10) using phase delay networks (12, 14) to transform impedances to a lower, intermediate impedance. Each impedance transformation is accomplished using a stepped impedance or tapered impedance transmission line (26). The method and apparatus provides isolation between input or output ports (11, 22 and 24, 13) in power combining or dividing circuits using an incremental phase delay network (12) of prescribed electrical phase lengths (22, 24) to provide phase cancellation. The power divider (10) and combiner (15) can be used in power amplifiers and in communication devices.