Abstract: An all digital equivalent to a voltage controlled oscillator with low intrinsic jitter and the absence of sample aliasing within a nonzero bandwidth, the offset (non-symmetrical) digitally controlled oscillator comprising a divider (divide by n or n-1) which is timed from a high speed reference clock, a 2.sup.m counter and a digital comparator. The divider divides the high speed reference clock signal so that for every thirty second cycle of the high speed reference clock a pulse is output from the present invention. The output pulse is input to the 2.sup.m counter and increments same. The 2.sup.m counter counts the number of output cycles (or pulses) that have occurred since the last phase adjustment and comares this m-bit number to the input to the present invention. When the output of the 2.sup.m counter becomes greater than or equal to the input, a divide by n-1 signal is sent to the divider which shortens the output cycle and adjusts the average output frequency and phase. The 2.sup.

Abstract: Phase quantizer apparatus in an all digital phase locked loop to provide a two-part digital number representing the phase of the input signal (a noncontinuous pulse train) relative to the output signal of the all digital phase locked loop. The phase quantizer comprises a write counter (modulo m counter) and a phase counter (modulo n counter) which receive the noncontinuous pulse train as an input signal. The leading pulse edge in the noncontinuous pulse train increments the write counter and resets the phase counter. The write counter comprises a binary counter and a conversion circuit. The binary counter portion of the write counter was being used and is still being used in the digital communications system to provide address information to the elastic buffer to read data into predetermined storage locations in the elastic buffer.

Abstract: A digital phase locked loop to function as a stable reference clock given a gapped, or pulse stuffed, input clock signal which may have a frequency offset relative to the nominal specified frequency and a phase jitter relative to the average frequency of the input signal, the digital phase locked loop comprising an input synchronizer for synchronizing the input clock signal to a stable high frequency reference clock. The output of the input synchronizer increments a write counter and resets a phase counter to zero at the begininning of each cycle of the input clock signal. The outputs of the write counter and the phase counter are sampled by a sampling circuit which interprets the sampled data in two's complement form.

Abstract: Circuitry for measuring the time between commencement of a flame-off arc and either the contact of the ball with the capillary tip during the flame-off process or the arc flame-off time as determined by a timer. Such information as to the length of time to contact is usable in troubleshooting quality control problems in the wire bonding process. By comparing the information presently obtained with past time checks, an alarm can be provided for significant deviations.

Abstract: A device is disclosed for insulating and keying quick disconnect connectors. The device is wrapped around the quick disconnect connection with the wire already crimped in the quick disconnect connection and snaps on securely. It provides a multicombination key which prevents the insertion of a keyed insulator in the inappropriate mating connector slot.

Abstract: A circuit for using a high speed clock and a counter to obtain a recovered clock with incoming data resetting the counter whenever a logic "1" of more than a predetermined number of high speed clocks is received. Further, the presence of a data out logic "1" inhibits the reaction of the circuit to any further input pulses during the time necessary to generate the retimed data output logic "1".

Abstract: Dessicant vessel allows air to flow through desiccant from a temperature related pumping phenomena prior to entry into waveguide to guard against attenuation of microwave signal.

Abstract: A method and apparatus for monitoring a frequency modulated signal including harmonically mixing the modulated signal with a significantly lower reference frequency, dividing the mixed signal, filtering out the reference frequency, rectifying and integrating the filtered frequency and then testing the integrated signal is disclosed. A correction signal responsive to the integrated signal is provided in one arrangement.

Abstract: A novel construction of a trailing wire antenna radiating element using conductive material in the central core wound in a direction opposite to the conductive material on the outer layer in the skin effect area to reduce AC impedance. To compensate for the strength lost with the conductive material in the core area, high tensile strength and non-magnetic material such as stainless steel or beryllium copper is used in the outer layer. For a given diameter wire cable, the present device has much lower impedance and much higher strength while remaining more flexible.

Abstract: It has been ascertained that there is a momentary drop in the flame-off arc voltage used to produce a ball in a ball bonder when the ball contacts the tool tip. A part of the present invention comprises a circuit for detecting this voltage drop and terminating the arc voltage immediately after such contact is made.

Abstract: A flush-mounted radiating antenna is disclosed which can be electronically switched to produce a rotating directional field with no moving parts in the antenna element itself or with the appropriate electronics in the entire mechanism. This is accomplished by utilizing pie-shaped sections on the flush surface which are capacitively coupled to a central feed element and shorting some of the pie-shaped capacitively coupled elements to a ground plane whereby the normally omnidirectional pattern is perturbed to a directional pattern.

Abstract: An electrical connector and an apparatus for providing staging of electrical connections between a motherboard and a daughterboard is disclosed. An angled insulator having first and second legs forms a pie-shaped cavity for receiving one edge of a printed circuit board. The first leg forms a fulcrum about which the printed circuit board is rotated until it abuts an alignment surface of an electrically insulating stiffener formed in the second leg. A second connector is used for providing staging of electrical connections. Protective end caps prevent the insertion of a printed circuit board until it is properly aligned.

Abstract: A system for frequency modulation by a signal, the system including an oscillator having a known linearity distortion, a circuit for selecting one from a plurality of predetermined constants, a circuit for operating on the signal with the selected constant, and a digital to analog converter in an embodiment where the signal is digital, for converting the signal having been operated on to an analog signal for modulating the oscillator is disclosed. One embodiment includes a circuit for determining the magnitude of the input signal.

Abstract: A signal termination device is illustrated using planar circuit technology for providing both broadband capabilities from DC to over ten gigahertz while maintaining small size and high power dissipation capabilities. This is accomplished by plating a series cascade of resistors and transmission lines such that the sum of the resistors is equal to the desired termination impedance and the impedance of the interconnecting transmission lines is equal to the sum of the remaining resistors between that point and ground. The use of the intervening transmission lines enhances the power handling capability of the resistor elements and enhances uniform power densities in the resistor elements.

Abstract: A time division multiplex ring comprising a plurality of nodes connected together by interchanged trunks (main and standby paths) in a ring type or closed loop configuration. Each node in the system includes transmitters and receivers on the main and standby paths along with bridging and switching circuits connected to data failure and other failure detection circuits for operating same arranged such that data and alarm signals are transmitted in the first direction on the main path around the closed loop and in an opposite direction on the standby path. The system is arranged such that if a failure occurs only on the main path and the standby path is unaffected, all communications are switched to the standby path.

Abstract: A flexible flap, having an elastic memory, which flap is used to normally cover a lightwave connector so as to prevent laser radiation emissions from the connector. The flexible nature of the flap allows the forcible deflection thereof, so that a mating connector can be attached to the normally covered one, and yet when the mating connector is removed the flap will automatically return to the covering position. In addition to preventing the emission of laser radiations, the flap can reduce contamination materials, such as dust, from covering the end of the fiber optic material.

Abstract: A digital circuit which ascertains the middle of a digital pulse by first determining its total length through digital logic means in combination with a digital signal delay means, and uses this information to operate a state machine (or sequencer), which will assume that data clocks occur at the time of the last received valid data pulse until new logic "1" data is received, and at this time can be resynchronized or phase-locked if there is a time discrepancy between recently received data and the status of the state machine.

Abstract: When a digital muldem employs protective switching, a requirement exists to perform revertive switching. The present disclosure illustrates a way to test the failed module after a switch to determine whether the module is actually failed or the decision to switch was based on momentary external conditions. The test is accomplished by looping back the "failed" module, passing data from one of the operative channels through the "failed" module and doing a bit by bit compare of input and output data for identity. If all of the muldems convert signals to a common frequency, only a single compare circuit need be used on a multiplexed basis.

Abstract: An antenna of the type having a central driven element and a plurality of surrounding parasitic elements is shown. Further, there is circuitry for modifying the basic omnidirectional pattern of said antenna to a directional pattern by normally capacitively coupling the parasitic elements to ground but on a selective basis changing some of the parasitic elements to be inductively coupled to ground whereby they act as reflectors and provide an eccentric signal radiation pattern. By cyclically altering the connection of various parasitic elements in their coupling to ground, a rotating directional signal is produced.

Abstract: To perform a loopback condition for testing purposes, the present apparatus supplies a null signal from an end terminal on a communication link through a set of repeater stations to reinitialize the repeater stations. It then sends N+1 pulses of a frequency different than the data frequency through the repeater stations with each repeater station that receives more than two pulses disgarding one pulse and forwarding the rest. The repeater station or remote end terminal that receives only two pulses reconfigures itself to a loopback condition, returns a null signal back to the end terminal originally transmitting the N+1 pulses and then sends an acknowledgement pulse. Data signal testing can then be performed until a further null condition is sent thereby reinitializing the repeater stations to the data transmission configuration.