Patents Represented by Attorney Christopher P. Maiorana P
  • Patent number: 8045062
    Abstract: A method for color tone correction is disclosed. The method generally includes the steps of (A) generating a plurality of first intermediate components by scaling a plurality of first color components towards a first ideal color, wherein the first color components (i) are for a first plurality of pixels in an input video signal and (ii) fall inside a first region of a color space, (B) generating a plurality of first corrected components by adjusting the first intermediate components such that a first mapping of the first color components to the first corrected components is both (i) continuous in the color space and (ii) non-overlapping in the color space and (C) generating an output video signal by combining the first corrected components with a plurality of unaltered color components, wherein the unaltered color components (i) are for a second plurality of the pixels and (ii) fall outside the first region.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: October 25, 2011
    Assignee: LSI Corporation
    Inventor: Lowell L. Winger
  • Patent number: 7839164
    Abstract: An apparatus having a plurality of first circuits, second circuits, third circuits and fourth circuits is disclosed. The first circuits may be configured to generate a plurality of first signals in response to (i) a priority signal and (ii) a request signal. The second circuits may be configured to generate a plurality of second signals in response to the first signals. The third circuits may be configured to generate a plurality of enable signals in response to the second signals. The fourth circuits may be configured to generate collectively an output signal in response to (i) the enable signals and (ii) the request signal. A combination of the first circuits, the second circuits, the third circuits and the fourth circuits generally establishes a programmable priority encoder. The second signals may be generated independent of the enable signals.
    Type: Grant
    Filed: May 14, 2009
    Date of Patent: November 23, 2010
    Assignee: LSI Corporation
    Inventors: Mikhail Grinchuk, Anatoli Bolotov, Sergei B. Gashkov, Lav D. Ivanovic
  • Patent number: 7646736
    Abstract: A method configured to continuously receive frames from a plurality of video channels and transmit to each of a plurality of participants in a video conference individual frames containing information concerning each of the video channels. The method only transmits at any given instant new picture data for one of the participants in the video conference.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: January 12, 2010
    Assignee: Exedra Technology, LLC
    Inventors: Chih-Lung Yang, Chen-Yuan Kuo
  • Patent number: 7593465
    Abstract: A method and circuit for processing a reconstructed picture generated from compressed data is disclosed. The method generally includes the steps of (A) estimating a magnitude of coding artifacts created by a coding process for the compressed data based upon the compressed data, (B) generating a plurality of noise samples with a probability distribution over a range, the probability distribution determined by the magnitude and (C) adding the noise samples to the reconstructed picture for concealment of the coding artifacts.
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: September 22, 2009
    Assignee: LSI Corporation
    Inventors: Yunwei Jia, Lowell L. Winger
  • Patent number: 7567478
    Abstract: A method of power optimization in a memory is disclosed. The method generally includes the steps of (A) dividing a plurality of bit cells in a design of the memory into (i) a plurality of first rows storing programmed data and (ii) at least one second row storing only padding data, (B) adjusting the design such that a second power consumption in each of the second rows is lower than a first power consumption in each of the first rows and (C) generating a file defining the design as adjusted.
    Type: Grant
    Filed: October 8, 2007
    Date of Patent: July 28, 2009
    Assignee: LSI Corporation
    Inventor: Jeffrey S. Brown
  • Patent number: 7408959
    Abstract: Where links between a port module and plural switch fabric slices are of various lengths, a cell is transmitted from the port module to a switch fabric slice in response to a grant. The transmission is delayed by an amount based on a link round trip delay (RTD) value for the corresponding link between the port module and the switch fabric slice, and a predetermined global delay value. As a result of this delay, the cell arrives at the switch fabric slice at a fixed number of cell times (equal to the global delay value) after issuance of the grant, independent of any link lengths.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: August 5, 2008
    Assignee: LSI Corporation
    Inventors: Martin Braff, Gopalakrishnan Ramamurthy, William J. Dally
  • Patent number: 7400683
    Abstract: A device generally having a memory manager and a direct memory access unit. The memory manager may be configured to (i) map a first picture from a video signal among a plurality of picture segments and (ii) generate a list associating each of the picture segments to a plurality of physical pages in a memory. The direct memory access unit may be configured to store the first picture among the physical pages according to the list and the mapping.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: July 15, 2008
    Assignee: LSI Corporation
    Inventor: Elliot N. Linzer
  • Patent number: 7400561
    Abstract: A method and apparatus demodulate pre-formatted information embedded in an optical recording medium. The demodulation includes (a) receiving a wobble signal representing data symbols frequency-modulated on a carrier frequency, (b) generating a phase delta signal representing a phase difference between the wobble signal and a corresponding locked signal having the carrier frequency, (c) first sampling the phase delta signal at a data sampling interval to produce first values, (d) second sampling the phase delta signal at each halfway of the data sampling interval to generate second values, (e) determining, based on a difference between two successive second values, if the first sampling is performed at timing corresponding to an end of each data symbol, and (e) adjusting sampling timing of the first sampling towards the timing corresponding to each end of the data symbols, if the sampling timing does not corresponds to the end of each data symbol.
    Type: Grant
    Filed: December 14, 2004
    Date of Patent: July 15, 2008
    Assignee: LSI Corporation
    Inventors: Louis J. Serrano, Shih-Ming Shih
  • Patent number: 7400179
    Abstract: An apparatus comprising a plurality of flip-flops and a compare circuit. The flip-flops may each be configured to (i) receive a clock signal and an input signal and (ii) generate an output signal. The flip-flops may be configured in series such that the output signal of a first of the flip-flops is presented as the input signal to a second of the flip-flops. The compare circuit may be configured to generate a reset signal in response to each of the output signals. The reset signal is generated until each of the output signals matches a set of predetermined values stored in the compare circuit.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: July 15, 2008
    Assignee: LSI Logic Corporation
    Inventor: David H. Lin
  • Patent number: 7400360
    Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a decoded video signal. The second circuit may be configured to generate (i) a first video output signal having a first resolution and (ii) a second video signal having a second video resolution in response to the decoded video signal.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: July 15, 2008
    Assignee: LSI Corporation
    Inventor: Elliot N. Linzer
  • Patent number: 7397401
    Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate context information in response to one or more bins on a binary signal. The second circuit may be configured to generate the binary signal in response to (i) one or more input bits on a bitstream signal, and (ii) simultaneously performing in a single cycle (a) an arithmetic decode of the context information and (b) a renormalization of the context information.
    Type: Grant
    Filed: July 7, 2006
    Date of Patent: July 8, 2008
    Assignee: LSI Logic Corporation
    Inventors: Harminder S. Banwait, Eric C. Pearson, Scott F. James
  • Patent number: 7379422
    Abstract: A networking/communication chip having a receiving buffer or FIFO whereby it receives data from a data source across a network and transfers the data to a host system. The memory in the host system acts as a logical extension of the receiving buffer in the chip; in this way, the host system controls the flow of data from the source, rather than the control flow being based on the capacity of the receiving buffer in the networking/communication chip. The networking/communication chip may be a controller, such as a 10 Gigabit Ethernet controller, wherein data received from the source in one protocol is transformed to a second protocol input to the host. If either or both the networking/communication chip or the host system is/are made of FPGAs, it/they can be reprogrammed to disable the flow control in the networking/communication chip and enable flow control in the host system. Data flow is enhanced because memory in the host system typically is much larger than memory in the networking/communication chip.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: May 27, 2008
    Assignee: LSI Logic Corporation
    Inventor: George Wayne Nation
  • Patent number: 7376780
    Abstract: A method for communicating between a first bus and a second bus is disclosed. The method generally includes the steps of (A) recognizing a read operation code in a read frame (i) received from the first bus and (ii) communicated with a first-bus protocol, (B) initiating a read transaction on the second bus using a second-bus protocol different than the first-bus protocol, wherein the initiating occurs earlier than a turn around time in the first-bus protocol that provides a plurality of bit times to respond to the read operation code and (C) transmitting read data received from the second bus on the first bus immediately after the turn around time.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: May 20, 2008
    Assignee: LSI Corporation
    Inventor: Philip W. Herman
  • Patent number: 7373009
    Abstract: A method for encoding quantization matrices comprising the steps of (A) signaling whether values of a luma quantization matrix are determined by either (i) a first set of custom values or (ii) a set of standardized default values, (B) transmitting the first set of custom values when the values of the luma quantization matrix are determined by the first set of custom values and (C) signaling whether values of a first chroma component quantization matrix are determined by either (i) a second set of custom values or (ii) the values of the luma quantization matrix.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: May 13, 2008
    Assignee: LSI Corporation
    Inventor: Lowell L. Winger
  • Patent number: 7362804
    Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a decoded video signal and syntax elements in response to an encoded bitstream. The second circuit may be configured to generate one or more overlay images in response to the syntax elements. The overlay images generally comprise graphical symbols representing the syntax elements of the encoded bitstream.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: April 22, 2008
    Assignee: LSI Logic Corporation
    Inventors: Pavel Novotny, Guy Cote, Lowell L. Winger, Simon Booth
  • Patent number: 7362809
    Abstract: A method for motion estimation comprising the steps of (A) determining whether a cost of encoding one or more prediction parameters for a current search position is less than a current best cost, (B) when the cost of encoding the one or more prediction parameters for the current search position is greater than or equal to the current best cost, determining whether the current best cost is less than a minimum cost for encoding one or more prediction parameters of one or more remaining search positions and (C) ending the search when the current best cost is less than the minimum cost for encoding the one or more prediction parameters of the one or more remaining search positions.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: April 22, 2008
    Assignee: LSI Logic Corporation
    Inventors: Simon Booth, Lowell L. Winger
  • Patent number: 7355931
    Abstract: A method for calibrating a center error signal in an optical disc system, comprising the steps of (i) measuring a peak-to-peak value of the center error signal, (ii) computing a nominal peak-to-peak value of the center error signal after locking to a particular track of an optical disc, (iii) computing the nominal peak-to-peak value of the center error signal for a run-out condition, and (iv) defining a calibration gain for the current value for the center error signal.
    Type: Grant
    Filed: August 10, 2004
    Date of Patent: April 8, 2008
    Assignee: LSI Logic Corporation
    Inventor: Ainobu Yoshimoto
  • Patent number: 7349387
    Abstract: Two or more cross-connect ICs are interconnected. Each IC directly receives some, but not all, of the system inputs, and outputs to some, but not all, outputs. Each cross-connect IC has a switch matrix that has the same number of inputs as the system, and a lesser number of outputs that matches the number of outputs of the IC. Each cross-connect IC provides fanout of its direct inputs to a link to each other cross-connect IC. Thus, each IC receives inputs either directly, or from a fanout on another IC.
    Type: Grant
    Filed: January 13, 2003
    Date of Patent: March 25, 2008
    Inventor: Ephrem C. Wu
  • Patent number: 7346049
    Abstract: A scheduling algorithm is provided that may be implemented in a multi-stage switch requiring less switching elements than known switching architectures in order to increase bandwidth and to retain the non-blocking properties of the constituent switching elements for incoming traffic, including multicast traffic. A scheduling algorithm is also provided for incremental scheduling of connections being added or removed from the switch.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: March 18, 2008
    Inventor: Brian Patrick Towles
  • Patent number: 7302160
    Abstract: A method for automatically advancing an audio/video signal past undesirable material comprising the steps of (A) detecting possible triggering events during encoding of said audio/video signal, (B) generating one or more scores of various levels in response to said triggering events and (C) advancing past said undesirable material during playback in response to one of said scores.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: November 27, 2007
    Assignee: LSI Corporation
    Inventor: Aaron G. Wells