Patents Represented by Attorney David M. Keay
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Patent number: 4751556Abstract: Junction field effect transistor, specifically a static induction transistor, and method of fabricating. A low resistivity N-type surface layer is formed at the surface of a high resistivity N-type epitaxial layer which has been grown on a low resistivity N-type substrate of silicon. The surface of the surface layer is coated with silicon dioxide and portions of the silicon dioxide layer are removed to expose alternating gate surface areas and source surface areas. P-type conductivity material is diffused into the silicon from the gate surface areas to produce zones of graded concentration. The difference in concentration of N-type conductivity imparting material in the surface layer and in the remainder of the epitaxial layer causes the resulting P-type gate regions to extend laterally toward each other so as to produce narrow channel regions at a depth beyond the surface layer while limiting the lateral extensions of the P-type gate regions adjacent to the surface.Type: GrantFiled: June 24, 1987Date of Patent: June 14, 1988Assignee: GTE Laboratories IncorporatedInventors: Adrian I. Cogan, Izak Bencuya
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Patent number: 4742022Abstract: Method of diffusing zinc into gallium arsenide and aluminum gallium arsenide. A wafer of gallium arsenide or aluminum gallium arsenide is placed in close proximity to a quantity of granular zinc gallium arsenide. The assemblage is heated in an open-tube furnace in the presence of flowing nitrogen to vaporize zinc whereby zinc diffuses into the gallium arsenide or aluminum gallium arsenide wafer without eroding the surface.Type: GrantFiled: October 29, 1987Date of Patent: May 3, 1988Assignee: GTE Laboratories IncorporatedInventors: Moshe Oren, A. N. M. Masum Choudhury
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Patent number: 4736387Abstract: Quantizing apparatus for producing binary quantized values of increasingly closer approximation to a real-valued signal being quantized. A look-up table of threshold values are stored in a memory which is addressed by a shift register. A comparator compares a selected threshold value from the memory with the real-valued signal and produces a bit depending on which is greater. The bit is entered in the shift register causing an appropriate threshold value to be selected for the next comparison cycle with the real-valued signal. Over successive cycles the accumulated bits provide a quantized representation of the real-valued signal of increasing precision. The bits are dequantized to provide a reconstructed value by dequantizing apparatus having a memory containing a look-up table of reconstructed values. The memory is addressed by a shift register which accumulates the bits as they are received.Type: GrantFiled: March 28, 1986Date of Patent: April 5, 1988Assignee: GTE Laboratories IncorporatedInventor: Kou-Hu Tzou
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Patent number: 4729967Abstract: Method of fabricating a junction field effect transistor, specifically a static induction transistor, which may be of GaAs. Elongated N-type source regions are formed in an N-type epitaxial layer of semiconductor material grown on a substrate. A tri-level mask is formed having elongated openings exposing portions of the epitaxial layer intermediate between the source regions. The openings are wider at the bottom than at the top. P-type gate regions are formed by ion-implanting P-type doping material through the mask openings. Silicon dioxide is deposited through the openings by angle evaporation to form generally trapezoidal-shaped temporary gate members over the gate regions. The tri-level mask is removed, a layer of silicon nitride is deposited, and a layer of masking material is deposited. Some of the masking material is removed; then the temporary gate members and silicon nitride immediately adjacent thereto are removed.Type: GrantFiled: April 9, 1987Date of Patent: March 8, 1988Assignee: GTE Laboratories IncorporatedInventor: Craig A. Armiento
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Patent number: 4725565Abstract: Method of diffusing sulfur into gallium arsenide without degrading the surface of the gallium arsenide. A gallium arsenide wafer is placed in close proximity to a quantity of powdered gallium sulfide intermixed with powdered gallium arsenide. The assemblage is heated in an open-tube furnace in the presence of flowing nitrogen to vaporize sulfur while the gallium arsenide and gallium sulfide are in thermodynamic equilibrium whereby sulfur diffuses into the gallium arsenide wafer without eroding the surface.Type: GrantFiled: June 26, 1986Date of Patent: February 16, 1988Assignee: GTE Laboratories IncorporatedInventors: Moshe Oren, Francisco C. Prince
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Patent number: 4724223Abstract: Electrical contacts are made to conductive elements of an array which are embedded in a matrix of silicon with the conductive elements exposed at a surface. The surface is covered with silicon oxide, and an opening is made in the silicon oxide to expose a portion of the matrix and a portion of each of several conductive elements. A silicide-forming metal, for example cobalt, is deposited, the assemblage is heated to cause the cobalt to react with the exposed silicon to form conductive cobalt disilicide. The cobalt disilicide is in ohmic contact with each of the conductive elements at the interfaces therewith and is in rectifying contact with the silicon of the matrix at the interface therewith. Unreacted cobalt overlying the silicon oxide is removed.Type: GrantFiled: December 11, 1986Date of Patent: February 9, 1988Assignee: GTE Laboratories IncorporatedInventor: Brian M. Ditchek
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Patent number: 4713358Abstract: A low resistivity N-type layer is formed at the surface of a high resistivity N-type epitaxial layer which has been grown on a low resistivity N-type substrate of silicon. Parallel grooves are etched through the low resistivity N-type layer into the high resistivity N-type layer forming interposed ridges of silicon. When fabricating junction gate devices, P-type zones are formed at the end walls of the grooves by ion implantation. A layer of silicon oxide is formed on the side walls of the grooves exposing the silicon at the end walls of the grooves and at the surfaces of the ridges. A layer of a silicide-forming metal, specifically cobalt, is deposited. A rapid thermal annealing treatment is performed which causes the cobalt to react with the silicon and form cobalt silicide at the cobalt-silicon interfaces. The cobalt does not react with the silicon oxide at the side walls of the grooves. The unreacted cobalt is removed by an etching solution which does not attack the cobalt silicide.Type: GrantFiled: May 2, 1986Date of Patent: December 15, 1987Assignee: GTE Laboratories IncorporatedInventors: Emel S. Bulat, Brian M. Ditchek, Scott J. Butler
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Patent number: 4710916Abstract: A burst-switching communications system with integrated voice and data services and with processing capacity sufficient to support T1 or higher link transmission rates, such system including a hub switch located at a point of high-traffic concentration in the network and a plurality of link switches. The switches are interconnected by time-division multiplexed communications links. A burst is a variable-length sequence of bytes which represents, for example, a block of data or a spurt of voice energy as sensed by silence/voice detectors located at voice ports. Within a communications link, a burst is transmitted one byte at a time in an assigned channel of sequential frames of the time-division multiplexed link. The hub switch includes a number of switching units connected in a closed hub ring with one or more time-division multiplexed communication link to another communication link as determined by address information in the burst being received.Type: GrantFiled: August 2, 1985Date of Patent: December 1, 1987Assignee: GTE Laboratories IncorporatedInventors: Stanford R. Amstutz, Mark Eliscu, Joseph M. Lenart, E. Fletcher Haselton
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Patent number: 4710674Abstract: A phosphor particle having a non-particulate, conformal aluminum oxide coating and a fluorescent lamp incorporating aluminum oxide coated phosphor particles are disclosed. A method for improving the lumen maintenance of a fluorescent lamp is also disclosed. The method involves applying a non-particulate, conformal aluminum oxide coating to the outer surface of individual particles of a finely-divided fluorescent lamp phosphor, applying the coated phosphor particles to a fluorescent lamp envelope, and processing the phosphor coated envelope into a finished lamp.Type: GrantFiled: April 3, 1985Date of Patent: December 1, 1987Assignee: GTE Laboratories IncorporatedInventor: A. Gary Sigai
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Patent number: 4707825Abstract: This invention provides a method of assigning a first control processor to the service set of a second control processor in a distributed-control communications system having control processors coupled with ports of the system. The method comprises the step of transmitting through the system a service-set assignment message in a control burst to the first control processor, the assignment message including the port address of the second control processor. The assignment message may be sent by a third control processor or by the second control processor. The assignment message may be sent as a result of the failure of some control processor, the addition of a new control processor, or to make the workloads of the control processors more evenly distributed. There is also provided a method of installing a second control processor into a distributed-control communications system having at least one first control processor.Type: GrantFiled: August 2, 1985Date of Patent: November 17, 1987Assignee: GTE Laboratories IncorporatedInventors: Stanford R. Amstutz, E. Fletcher Haselton
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Patent number: 4703478Abstract: This disclosure provides methods for processing and routing bursts in an integrated communications system. In a preferred embodiment, the system includes a plurality of switches interconnected by time-divided communications links and a plurality of ports, each port being a component of a switch and each link having processing capacity sufficient to support T1 or higher transmission rates. Each port provides access to the system for a control processor, an end-user, or another communications system. Each switch has switching intelligence for routing a burst toward its destination port. A burst is a plurality of bytes which may represent a block of data or a spurt of voice energy as sensed by silence/voice detectors located at voice ports. In the methods provided by the invention, a burst may be introduced into the system through a port, routed through a switch to an outgoing link, or received from the system at a port. Within links, a burst is transmitted byte-by-byte in assigned channels of sequential frames.Type: GrantFiled: August 2, 1985Date of Patent: October 27, 1987Assignee: GTE Laboratories IncorporatedInventors: E. Fletcher Haselton, Stanford A. Amstutz, Joseph M. Lenart
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Patent number: 4699688Abstract: Two-step process of expitaxially growing gallium arsenide on a silicon substrate. A silicon substrate is heated to about 450.degree. C. in a reaction chamber and arsine and triethylgallium are introduced into the chamber. After a thin seed layer of gallium arsenide is grown at a relatively slow rate, the silicon substrate is heated to about 600.degree. C. and a thick buffer layer of gallium arsenide is grown at a relatively fast rate.Type: GrantFiled: July 14, 1986Date of Patent: October 13, 1987Assignee: GTE Laboratories IncorporatedInventor: Shambhu K. Shastry
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Patent number: 4698799Abstract: A high-speed link switch for a distributed-control burst-switching communications system. The switch provides fully integrated voice and data services and processing capacity sufficient to support T1 or higher transmission rates. A communications systems may include a plurality of switches interconnected by time-division multiplexed links. In a preferred embodiment, a link switch comprises a central memory coupled with a link-input processor, a link-output processor, a port-input processor, a port-output processor, and a memory manager. The link switch includes switching intelligence for routing a burst through the switch toward its destination port in the system. A burst is a plurality of bytes which may represent, for example, a block of data or a spurt of voice energy as sensed by silence/voice detectors located at voice ports. Within an outgoing communications link, a burst is transmitted by a switch one byte at a time in an assigned channel of sequential frames of the time-division multiplexed link.Type: GrantFiled: August 2, 1985Date of Patent: October 6, 1987Assignee: GTE Laboratories IncorporatedInventors: Stanford R. Amstutz, Mark Eliscu, E. Fletcher Haselton
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Patent number: 4698803Abstract: A distributed-control burst-switching communications system with fully integrated voice and data services, and with processing capacity sufficient to support T1 or higher transmission rates. The system may include a high-speed hub switch located at a point of high-traffic concentration in the network and a plurality of link switches. The switches are interconnected by time-division multiplexed communications links. Each switch includes one or more ports. Each port provides access to the system for a control processor, an end-user, or another communications system. Within each switch, there is switching intelligence for routing a burst toward its destination port. A burst is a variable-length sequence of bytes which represents, for example, a block of data or a spurt of voice energy as sensed by silence/voice detectors located at voice ports. Within a communications link, a burst is transmitted one byte at a time in an assigned channel of sequential frames of the time-division multiplexed link.Type: GrantFiled: August 2, 1985Date of Patent: October 6, 1987Assignee: GTE Laboratories IncorporatedInventors: E. Fletcher Haselton, Stanford R. Amstutz, Joseph M. Lenart
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Patent number: 4698689Abstract: System and method of progressively transmitting and reconstructing an image in which an approximate image is reconstructed based upon partial information and details are added as additional information becomes available. The image is divided into an array of blocks of picture elements and the data for each block is subjected to a two-dimensional transformation to provide transform coefficients thereof. The transform coefficients are quantized into a series of sets of quantized transform coefficients, each quantized transform coefficient being represented by a number of bits. Different numbers of bits are assigned to each quantized transform coefficient of each set of the series to represent the corresponding transform coefficient in increasingly finer detail. During each of a plurality of transmission sequences, signals representing the differences between each set of quantized transform coefficients and the preceding set of the series for each block are transmitted.Type: GrantFiled: March 28, 1986Date of Patent: October 6, 1987Assignee: GTE Laboratories IncorporatedInventor: Kou-Hu Tzou
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Patent number: 4693783Abstract: Method of producing metal interconnections in a semiconductor integrated circuit structure of a body of silicon coated with silicon dioxide having openings therein exposing contact regions to underlying silicon. A thick layer of an insulating or dielectric material, for example, polymide, is deposited on the body. Grooves in the pattern of the desired interconnections are etched through the thick insulating layer to the underlying silicon dioxide and contact regions. Metal is deposited to fill the grooves and cover the thick layer of insulating material. Excess metal is removed to form a planar surface exposing the surface of the thick insulating layer with the grooves containing metal to provide electrical connections between contact regions.Type: GrantFiled: December 31, 1984Date of Patent: September 15, 1987Assignee: GTE Laboratories IncorporatedInventors: Paul E. Poppert, Marvin J. Tabasky
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Patent number: 4692780Abstract: Junction field effect transistor, specifically a static induction transistor, and method of fabricating. An epitaxial layer of high resistivity N-type silicon is grown on a substrate of low resistivity silicon. The surface of the epitaxial layer is coated with silicon nitride, portions of the silicon nitride are removed, and the silicon is etched to form parallel grooves with interposed ridges of silicon. A layer of silicon nitride is applied and then removed except from the side walls of the grooves. Exposed silicon at the bottoms of the grooves is converted to silicon dioxide to build up layers of silicon dioxide in the grooves. The remaining silicon nitride is removed. P-type conductivity imparting material is ion implanted into alternate (gate) ridges and diffused to form gate regions which extend laterally beneath the silicon dioxide in the adjacent grooves. N-type conductivity imparting material is ion implanted in the top of the intervening (source) ridges.Type: GrantFiled: May 12, 1986Date of Patent: September 8, 1987Assignee: GTE Laboratories IncorporatedInventors: Izak Bencuya, Adrian I. Cogan
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Patent number: 4684583Abstract: A lithium/oxyhalide electrochemical cell in which the lithium anode electrode is coated with a cured epoxy resin film.Type: GrantFiled: October 16, 1986Date of Patent: August 4, 1987Assignee: GTE Laboratories IncorporatedInventors: Keith A. Klinedinst, Richard A. Gary
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Patent number: 4675092Abstract: Method of producing a thin film electroluminescent device by sputtering a first transparent electrode of indium tin oxide or tin oxide onto a glass substrate, sputtering a layer of insulating material, for example barium tantalate, over the transparent electrode, and then forming a phosphor layer of zinc sulfide with manganese as an activator on the layer of insulating material. To form the phosphor layer electrical energy is applied to a target containing elemental zinc in an atmosphere containing hydrogen sulfide and argon to cause sputtering therefrom. Elemental zinc reacts with the hydrogen sulfide to deposit a layer of zinc sulfide over the layer of insulating material. The manganese is cosputtered either from a separate target or from a single target incorporating both zinc and manganese.Type: GrantFiled: March 27, 1986Date of Patent: June 23, 1987Assignee: GTE Laboratories IncorporatedInventors: Donald H. Baird, Martin S. McDonough, deceased
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Patent number: 4657985Abstract: Compositions based on polythiophene are described having incorporated therein a polyether, such as polytetrahydrofuran. The polyether is present in an amount of at least about 10 weight percent of the polythiophene present. The compositions exhibit improved mechanical integrity, processing properties, and d.c. electrical conductivity over polythiophene. A process for producing the compositions is also described in which a thiophene compound is electrochemically polymerized in the presence of a dissolved polyether.Type: GrantFiled: July 30, 1984Date of Patent: April 14, 1987Assignee: GTE Laboratories IncorporatedInventors: Mark A. Druy, Sukant K. Tripathy