Patents Represented by Attorney Diana L. Roberts
  • Patent number: 5689712
    Abstract: The present invention is a system and process for optimizing programs, having memory references, at the object code level. The process includes the computer-implemented steps of instrumenting each of the memory references to create an instrumented program, executing the instrumented program to capture effective address trace data for each of the memory references, analyzing the access patterns of the effective address trace data and, in response, reordering the memory references to create an optimized program.
    Type: Grant
    Filed: July 27, 1994
    Date of Patent: November 18, 1997
    Assignee: International Business Machines Corporation
    Inventor: Randall Ray Heisch
  • Patent number: 5683788
    Abstract: A printed circuit board includes a multi-component mounting footprint for mounting one of several possible differently sized discrete component packages on the circuit board. The multi-component mounting footprint includes a first mounting pad which has two connection points for mounting a connector on one of two different sized components. The footprint also includes a second mounting pad which is symmetric to the first mounting pad. About the mounting pads are cut outs which prevent solder buildup when either one of two different sized components are mounted thereon.
    Type: Grant
    Filed: January 29, 1996
    Date of Patent: November 4, 1997
    Assignee: Dell USA, L.P.
    Inventors: Becky Dugan, Darrell J. Slupek
  • Patent number: 5680561
    Abstract: A method, apparatus and memory direct a computer system, having at least a processor, display, and user controls, to locate at least one portion (e.g., page containing one or more objects and text) of a compound document. The method includes creating an outline for each portion of the compound document, displaying on the display an elevator in a first position, wherein the first position of the elevator corresponds to a first portion of the compound document, in response to invoking a command by user controls, displaying on the display a display container, wherein the display container displays the outline of the portion corresponding to the first position of the elevator, and in response to scrolling the elevator to at least a second position, displaying the outline for the second portion corresponding to the second position of the elevator in the display container on the display.
    Type: Grant
    Filed: August 26, 1996
    Date of Patent: October 21, 1997
    Assignee: International Business Machines Corporation
    Inventors: Hatim Yousef Amro, John Paul Dodson
  • Patent number: 5675814
    Abstract: A portable computer is provided in which the consumption of power by the I/O ports of the computer is reduced. The processor of the computer distinguishes port I/O operations that require an actual data transfer from port I/O operations that do not require an actual data transfer. The I/O ports of the computer remain off until an I/O operation involving an actual data transfer at a particular port is required. When an I/O operation which requires an actual data transfer is encountered, then the appropriate port is powered up. In this manner, power consumption by the I/O ports of the computer is significantly reduced. Advantageously, the disclosed technique for reducing power consumption by the I/O ports of the computer is operating system independent. In this manner, the power management feature functions regardless of which particular operating system or application software is installed on the computer.
    Type: Grant
    Filed: January 26, 1996
    Date of Patent: October 7, 1997
    Assignee: Dell USA, L.P.
    Inventor: John J. Pearce
  • Patent number: 5668699
    Abstract: There is disclosed a technique for constructing a printed circuit board assembly to provide solder joints with a uniform height. A solder mask is provided on the external surfaces of the printed circuit board to minimize the mount of conductive pad area that is exposed to solder. The solder mask includes a plurality of relatively small openings with a predetermined pattern to minimize the build up of solder, while insuring sufficient solder height to connect to the grounding component located on the chassis to insure adequate EMI protection. Preferably a polka dot pattern is used for certain conductive pads, while a single narrow strip or the solder mask opening configuration is used for rectangular pad configurations. Other configurations and patterns are also available to provide an adequate electrical connection while insuring uniform solder height.
    Type: Grant
    Filed: July 18, 1996
    Date of Patent: September 16, 1997
    Assignee: Dell USA L.P.
    Inventors: James S. Bell, Gita Khadem, Joseph A. Vivio
  • Patent number: 5657445
    Abstract: A computer system is provided with the capability of protecting portions of the mass storage media therein from unauthorized access. The mechanism employed to protect portions of the mass storage media is advantageously operating system independent. Thus, the protection mechanism functions regardless of what operating system is installed or what particular application software is presently being executed. More particularly, the computer system includes a processor configured to execute code in an operational mode and in a system management mode. A mass storage device and a memory are coupled to the processor. At least one region of the mass storage device is designated as a protected region by the user or by the manufacturer. The computer system is configured to trap mass storage device I/O operations and, in response to a trapped mass storage device I/O operation, the processor enters a system management mode.
    Type: Grant
    Filed: January 26, 1996
    Date of Patent: August 12, 1997
    Assignee: Dell USA, L.P.
    Inventor: John J. Pearce
  • Patent number: 5655094
    Abstract: A method, apparatus, and article of manufacture for causing a computer to directly scroll the contents of window in any direction. The window could be a folder, document, or any container for retaining information. The contents of the window are too large to be simultaneously displayed on the display screen. The method includes the first step of moving a visible view indicator of a scrolling mechanism in a direction consistent with movement of a pointer means in response to the pointer means being positioned and activated over the visible view indicator using user controls. The second step includes the step of scrolling the contents of the window on the display screen in a direction substantially opposite to the movement of the pointer means and the visible view indicator.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: August 5, 1997
    Assignee: International Business Machines Corporation
    Inventors: Troy Lee Cline, Scott Harlan Isensee, Ricky Lee Poston, Jon Harald Werner
  • Patent number: 5649158
    Abstract: The present invention is a computer-implemented method, memory, and computer system for directing a computer system to incrementally archive primary storage to archive storage based on partitions. The primary storage is divided into a plurality of partitions, where at least one the partitions contains information. The method includes the steps of receiving an incremental archive request from user controls and, in response, storing in the archive storage a copy of the information in each partition that has been modified since the last archive, if any.
    Type: Grant
    Filed: February 23, 1995
    Date of Patent: July 15, 1997
    Assignee: International Business Machines Corporation
    Inventors: Jonathan Ellsworth Lahr, Gerald Francis McBrearty, Johnny Meng-Han Shieh, Leonard Barry Tropiano
  • Patent number: 5640517
    Abstract: A bus with selective burst ordering enables the implementation of computer systems that incorporate bus masters (e.g., processors, DMA controllers, LAN controllers, etc.) with dissimilar burst orders. The same bus supports devices which require or prefer differing burst orders for high bandwidth data transfers. Selective burst order is enabled through the use of a bus line which may be asserted by the current bus master. By asserting the corresponding signal, a current bus master indicates that sequential (rather than non-sequential) burst order will be used for data transfer. Specialized burst address generation logic enables a bus slave to generate, in the selected burst order, the low order bits of memory addresses for the data words implicitly addressed during a burst transfer.
    Type: Grant
    Filed: February 26, 1996
    Date of Patent: June 17, 1997
    Assignee: Dell USA, L.P.
    Inventors: Terry J. Parks, Darius D. Gaskins
  • Patent number: 5638527
    Abstract: A memory mapping scheme for a computer system includes a number of slave devices attached to a system bus, which slave devices have partitioned among themselves a memory address storage system. The memory address storage system is, in turn, divided into a number of regions. The memory mapping scheme also includes a subsystem for mapping the regions, which subsystem includes a unique subtractive descriptor that disjunctively allows mapping of regions that reside on only one of a number of input/output channels connected to the system bus.
    Type: Grant
    Filed: April 17, 1996
    Date of Patent: June 10, 1997
    Assignee: Dell USA, L.P.
    Inventors: Terry J. Parks, Darius D. Gaskins
  • Patent number: 5632038
    Abstract: A secondary cache memory system is disclosed for use in a portable computer that increases system performance while also conserving battery life. The secondary cache includes a cache controller for controlling the transfer to and from a cache memory, comprised of fast SRAM circuits. The cache controller includes a control and status register with at least three status bits to control power to the cache, and to insure that the data stored in the cache memory is coherent with system memory. A control and power management logic checks the contents of the control and status register, and monitors the activity level of the processor. When the processor is determined to be inactive, the control and power management logic turns off the cache by changing the state of a bit in the control and status register.
    Type: Grant
    Filed: February 22, 1994
    Date of Patent: May 20, 1997
    Assignee: Dell USA, L.P.
    Inventor: Samuel Fuller
  • Patent number: 5628637
    Abstract: A SCSI adapter card which provides one or more internal SCSI channels and includes connectors for an optional daughter card which provides an external SCSI connector. The daughter card is a parallel mezzanine style daughter board which provides modular and upgradable SCSI bus routing options. In the preferred embodiment, the adapter card includes two SCSI controllers which provide two internal SCSI channels. The daughter board can include up to 2 SCSI controllers for additional SCSI channels. The daughter board can reroute one or more of the internal SCSI channels to the external connector according to various SCSI routing options or can include one or more SCSI controllers for additional SCSI channels. In one embodiment, the daughter board does not include a SCSI controller, but rather serves to reroute one or more of the internal SCSI controllers to the external connector.
    Type: Grant
    Filed: December 8, 1994
    Date of Patent: May 13, 1997
    Assignee: Dell USA, L.P.
    Inventors: Victor Pecone, Jay Lory
  • Patent number: 5625781
    Abstract: A uniquely programmed computer system, computer-implemented method, and computer readable memory embodying computer-readable detail logic direct a computer system to create a temporary list of links. The present invention creates the list of links without having to first open/visit the corresponding site to each link in the list or having to manually enter the name and address of the sites. The method includes placing the computer system in an itinerary mode, wherein the links lose their original function of opening/visiting the corresponding site when selected. The method includes displaying the list on a first portion of the display. The method includes selecting from a second portion of the display at least one link to be placed in the list. The method includes opening/visiting and displaying the site corresponding to the selected link on the second portion of the display in response to a selection of at least one link placed in the list.
    Type: Grant
    Filed: October 31, 1995
    Date of Patent: April 29, 1997
    Assignee: International Business Machines Corporation
    Inventors: Troy L. Cline, Ricky L. Poston, Jon H. Werner
  • Patent number: 5623594
    Abstract: A system and method for monitoring the temperature of a heat-producing electronic component located on a circuit board and a method of manufacturing therefor. The system includes: (1) an electrically-conductive trace of predetermined dimensions formed integrally with the circuit board, the trace having a temperature-dependent electrical property, a temperature of the electronic component affecting the electrical property and (2) an overtemperature detection circuit coupled to the trace for measuring the electrical property. The detection circuit provides, in response thereto, an overtemperature signal to thereby indicate that the temperature of the electronic component has exceeded a predetermined level. Preferably, the system is used to protect a microprocessor in a personal computer ("PC") from overheating.
    Type: Grant
    Filed: January 18, 1996
    Date of Patent: April 22, 1997
    Assignee: Dell USA, L.P.
    Inventor: Deepak Swamy
  • Patent number: 5614698
    Abstract: The substrate member of a multi-tier circuit board is provided, during the construction thereof, with an integral bar code structure by extending spaced apart, parallel finger sections of an interior metal ground plane portion of a panel structure outwardly past the routing path along which the substrate member is to be separated from the panel structure. After the substrate member is routed from the panel structure it has a peripheral side edge portion upon which exposed end surface portions of the spaced ground plane finger sections are disposed in a mutually spaced bar code array representative of predetermined information relating to the completed circuit board. The ground-seeking probe portion of a conductive scanning device is moved along the bar-coded edge of the substrate member to read and decipher the integral ground plane bar code structure compactly incorporated thereon during the manufacture of the substrate member.
    Type: Grant
    Filed: January 17, 1995
    Date of Patent: March 25, 1997
    Assignee: Dell USA, L.P.
    Inventor: H. Scott Estes
  • Patent number: 5613121
    Abstract: A novel method and system for optimizing the instructions produced by a compiler comprises examining pairs of load and pairs of store instructions to determine whether a pair of load or a pair of store instructions may be replaced with a single load or store instruction which utilizes the resources of the target data processing system more efficiently. The method and system are transparent to the user who may write the program source code in the conventional manner.
    Type: Grant
    Filed: October 19, 1994
    Date of Patent: March 18, 1997
    Assignee: International Business Machines Corporation
    Inventor: Robert J. Blainey
  • Patent number: 5613118
    Abstract: The present invention is an system and method for optimizing a program, having qualified elements, at the source level. The method includes the steps of instrumenting each path of the qualified elements to create an instrumented program, executing the instrumented program to produce instrumentation information for each of the paths, analyzing the instrumentation information, and in response to the analyzing step, restructuring the program to create an optimize program.
    Type: Grant
    Filed: June 20, 1994
    Date of Patent: March 18, 1997
    Assignee: International Business Machines Corporation
    Inventors: Randall R. Heisch, Paul J. Kilpatrick
  • Patent number: 5611057
    Abstract: A daughter card for mounting to an adapter card, wherein the daughter card includes adapter card connectors for mounting to the adapter card and also an edge connector for insertion directly into a computer slot so that the daughter card may also function as a stand-alone card. The daughter card is both mechanically and electrically compliant as an independent PCI add-in card and includes a PCI edge connector for insertion directly into a PCI slot. This provides additional modularity since the daughter card can be purchased and configured as a separate and independent PCI adapter card as well as for mating to a host adapter card to provide extra functionality to the host adapter card. In addition, since the daughter card can be directly inserted into the PCI bus, the daughter card provides greater component access and probing for testing. Further, the daughter card can be tested independently of the host adapter card during manufacturing functional test, thus providing more reliable testing.
    Type: Grant
    Filed: January 20, 1995
    Date of Patent: March 11, 1997
    Assignee: Dell USA, L.P.
    Inventors: Victor K. Pecone, Russell C. Smith, Jay R. Lory
  • Patent number: 5603040
    Abstract: A power management control unit and system is provided for selectively controlling ac power to one or more computer peripheral devices. The power management control unit includes a power cord connected to an ac supply and an outlet pin capable of electrically receiving the peripheral device. The management control unit also includes an ac switch electrically coupled between the power cord and the outlet pin, such that the switch can modulate conduction between the power cord and the outlet pin during use. The power management control unit is maintained separate from existing computers and peripherals such that computers and peripheral devices need not be retrofitted or adapted with the control unit. The control unit takes advantage of video control signals available at the computer video output in order to turn off or on ac power to the outlet pin.
    Type: Grant
    Filed: January 2, 1996
    Date of Patent: February 11, 1997
    Assignee: Dell USA, L.P.
    Inventors: David L. Frager, Joseph W. Bell, Jr.
  • Patent number: 5560008
    Abstract: The system and method of this invention authorizes a process running at a client data processing system to have access to a service at a server data processing system. The data processing systems are connected by a communication link in a distributed processing environment. A set of credentials for the process are created at the server in response to a message from the client requesting a service. The server returns a credentials id identifying the created set of credentials to the client process. The client uses this returned id in subsequent requests and is authorized access as controlled by the set of credentials identified by the returned id in the subsequent request. The server can deny access to the service by the process if the id returned in a subsequent request is determined by the server not to identify the set of credentials. The server denies the access if the server requires an authentication of the process.
    Type: Grant
    Filed: May 15, 1989
    Date of Patent: September 24, 1996
    Assignee: International Business Machines Corporation
    Inventors: Donavon W. Johnson, Todd A. Smith