Abstract: A detecting apparatus detects the degree of correlation between first events and second events repeatedly occurring in an observed apparatus includes an acquiring unit that acquires second event count values each indicating the number of second events occurring during each first period between each first event and the first event next thereto. A measuring unit measures an observed number of each second event count value derived from the number of times the second event count value is observed. A calculating unit calculates the degree of correlation between the first events and the second events based on the observed number of each second event count value.

Abstract: Toxic waste is laced with Radio Frequency Identification (RFID) tags. Subsequently, wherever the RFID tags are detected in an area, a conclusion is drawn that there is a presence, either past or present, of the toxic waste in the area.

Abstract: A non-volatile single-event upset (SEU) tolerant latch is disclosed. The non-volatile SEU tolerant latch includes a first and second inverters connected to each other in a cross-coupled manner. The gates of transistors within the first inverter are connected to the drains of transistors within the second inverter via a first feedback resistor. Similarly, the gates of transistors within the second inverter are connected to the drains of transistors within the first inverter via a second feedback resistor. The non-volatile SEU tolerant latch also includes a pair of chalcogenide memory elements connected to the inverters for storing information.

Abstract: A data processing system enables global shared memory (GSM) operations across multiple nodes with a distributed EA-to-RA mapping of physical memory. Each node has a host fabric interface (HFI), which includes HFI windows that are assigned to at most one locally-executing task of a parallel job. The tasks perform parallel job execution, but map only a portion of the effective addresses (EAs) of the global address space to the local, real memory of the task's respective node. The HFI window tags all outgoing GSM operations (of the local task) with the job ID, and embeds the target node and HFI window IDs of the node at which the EA is memory mapped. The HFI window also enables processing of received GSM operations with valid EAs that are homed to the local real memory of the receiving node, while preventing processing of other received operations without a valid EA-to-RA local mapping.

Abstract: In at least one embodiment, a processor includes at least one execution unit that executes instructions and instruction sequencing logic, coupled to the at least one execution unit, that fetches instructions from a memory system for execution by the at least one execution unit. The instruction sequencing logic including a branch target address cache (BTAC) including a plurality of entries for storing branch target address predictions. The BTAC includes index logic that selects an entry to access utilizing a BTAC index based upon at least a set of higher order bits of an instruction address and a set of lower order bits of the instruction address.

Abstract: A method, system, and computer program product for controlling data packet traffic flow into a link partner device such as an ethernet adapter. In one embodiment, an occupancy level of an adapter receive queue is monitored to detect a receive queue overrun or underrun condition or event. The detected overrun or underrun condition or event is utilized as the criteria for adjusting a pause time value within a pause time flow control frame. The pause time flow control frame is transmitted from the link partner device to a corresponding remote link partner device to pause data packet transmission in accordance with the adjusted pause time value.

Abstract: A system and method for implementing automotive image capture and retrieval. An image manager receives an image from a vehicle-mounted camera. The image manager determines, based on a set of preferences, whether to store the image. In response to storing the image, the image manager associates at least one form of metadata with the image, wherein the at least one form of metadata includes global positioning system (GPS) coordinates at the time of image capture, speed of a vehicle at the time of image capture, direction of travel at the time of image capture, and user annotations. In response to receiving a query for the image, image manager presents the image to a user.

Abstract: A system and method of improved handling of large pages in a virtual memory system. A data memory management unit (DMMU) detects sequential access of a first sub-page and a second sub-page out of a set of sub-pages that comprise a same large page. Then, the DMMU receives a request for the first sub-page and in response to such a request, the DMMU instructs a pre-fetch engine to pre-fetch at least the second sub-page if the number of detected sequential accesses equals or exceeds a predetermined value.

Abstract: A method, system, and computer-readable medium for rapid on-boarding of a software factory are presented. In a preferred embodiment, the computer-implemented method comprises the steps of: identifying choke-points in a first software project; creating a checklist of identifying factors that caused the choke-points that were identified in the first software project; receiving a new software project at a software factory, wherein the new software project is in a same software category as the first software project; presenting the checklist for the first software project; receiving new answers to the checklist; determining if the software factory is ready to handle the new software project based on the new answers to the checklist; and in response to determining that the software factory is ready to handle the new software project, configuring the software factory in a same configuration as that previously used by the first software project.

Abstract: A detection and response system including a set of algorithms for detecting within a stream of normal computer traffic a subset of (should focus on network traffic eliciting a response) TCP or UDP packets with one IP Source Address (SA) value, one or a few Destination Address (DA) values, and a number exceeding a threshold of distinct Destination Port (DP) values. A lookup mechanism such as a Direct Table and Patricia search tree record and trace sets of packets with one SA and one DA as well as the set of DP values observed for the given SA, DA combination. The detection and response system reports the existence of such a subset and the header values including SA, DA, and multiple DPs of the subset. The detection and response system also includes various administrative responses to reports.

Abstract: A method of data processing in a processing unit supported by a memory hierarchy includes the processing unit performing a plurality of memory accesses to the memory hierarchy. The plurality of memory accesses includes one or more memory accesses targeting a full cache line of data. The processing unit monitors utilization of data accessed by the plurality of memory accesses, and based upon the utilization of the data, dynamically alters a memory access mode of operation so that a subsequent storage-modifying memory access targets less than a full cache line of data.

Abstract: A data processing system with a processor and memory includes an instruction set architecture (ISA) that provides an asynchronous memory move (AMM) store (ST) instruction. When the processor executes the AMM ST instruction, the processor performs a series of functions, which initiates an asynchronous memory move (AMM) operation. The AMM ST instruction moves data from a first memory location having a first real address to a second memory location having a second real address by: (a) performing a move of the data in virtual address space utilizing a source effective address that is memory mapped to the first memory location and a destination effective address that is memory mapped to the second memory location. When the move is completed in the virtual address space, the AMM operation performs the physical move of the data to the second memory location outside the processor core, without processor involvement.

Abstract: Internet protocol (IP) data service providers may provide several services over a single communications channel and/or circuit. For example, the provider may deliver public services such as Wi-Fi, content, gaming, etc. as well as business-critical “back-office” services such as credit card processing, VoIP, streaming video, video conferencing, etc. Some applications can very demanding from a quality of service standpoint, whereas other applications are unwanted or unauthorized on the network such as worms, viruses, denial of service attacks and/or certain types of peer-to-peer file sharing applications. Applications sharing the communication channel may be classified into one or more application classifications. The available bandwidth over the communications channel and/or circuit may then be managed via a prioritization system that can be parameterized based on the available bandwidth and/or the desired application behavior for given characterized applications.

Abstract: A method, processor, and data processing system for dynamically adjusting a prefetch stream priority based on the consumption rate of the data by the processor. The method includes a prefetch engine issuing a prefetch request of a first prefetch stream to fetch one or more data from the memory subsystem. The first prefetch stream has a first assigned priority that determines a relative order for scheduling prefetch requests of the first prefetch stream relative to other prefetch requests of other prefetch streams. Based on the receipt of a processor demand for the data before the data returns to the cache or return of the data along time before the receiving the processor demand, logic of the prefetch engine dynamically changes the first assigned priority to a second higher or lower priority, which priority is subsequently utilized to schedule and issue a next prefetch request of the first prefetch stream.

Abstract: A system, computer-implementable method, and computer-usable medium for resolving discrepancies between diverse firewall designs. In a preferred embodiment of the present invention, a firewall design manager receives at least two designs for a rule-based system and computing at least one functional discrepancy between the at least two designs utilizing decision diagrams.

Abstract: An integrated circuit includes a first clock island, a second clock island, a clock generator, and a first programmable delay element. The first clock island is configured to receive a first clock signal. The second clock island is configured to receive a second clock signal. The clock generator is configured to provide a generated clock signal and the first and second clock signals are based on the generated clock signal. The first programmable delay element is coupled between the clock generator and the first clock island. The first programmable delay element is configured to receive the generated clock signal and provide the first clock signal. The integrated circuit is configured to account for a clock skew between the first and second clock signals when information is transferred between the first and second clock islands.

Abstract: Disclosed is a method, system, and computer program product for automatically configuring information systems to support mission objectives. A Mission SoulPad is connected to an information system via a communication bus, such as a USB bus connection. The Mission SoulPad may autonomously detect and configure components of the information system (e.g., displays, sensors, emitters, transceivers) to support the defined objectives of the Mission SoulPad. The Mission SoulPad may also identify malfunctioning components of the information system needing repair or replacement. Typical operations of malfunctioning components may be dynamically re-routed to functional components. Entire sensor and information display suites may be transitioned simply by moving the Mission SoulPad between available information systems. This ensures that mission critical information is consistently available regardless of the type of system the Mission SoulPad is connected to.

Abstract: An improved method, device and system are presented for selecting a predetermined number of unused registers in a processor. The method includes partitioning registers in a processor into subsets; searching each subset for an unused register; determining whether every subset includes an unused register; if so, selecting an unused register from each subset; if not, partitioning the registers into new subsets with each subset having a different combination of registers; searching each of the new subsets for an unused register; determining whether each of the new subsets includes an unused register; if so, selecting an unused register from each new subset; and if not, searching each register serially to find the predetermined number of unused registers.

Abstract: An improved method, system and computer-readable medium for constructing binary decision diagrams for a netlist graph is disclosed. The method comprises traversing a netlist graph in a depth-first manner. At least one binary decision diagram is built for one input of a node of the netlist graph using a binary decision diagram for the other input of that node as a don't-care condition.

Abstract: A system for non-destructively measuring the strength of a cement slurry sample includes an elongate sample container for receiving a cement slurry sample. The elongate sample container has a mass mounted at its first end. A transducer mounted at a second end of the elongate sample container vibrates the elongate sample container and mass. The elongate sample container, mass and transducer have a known resonance. The system calculates the strength of a tested cement slurry within the elongate sample container as a function of variation in resonance of the elongate sample container, mass and transducer.