Abstract: An indexing rotary actuator for applying the torque of a rotatable pivot arm to rotate a member between plural index positions. The forward stroke of the pivot arm drives a slider crank linkage through a four bar linkage to unlock the rotatable member and rotate the member to its next index position. On the return stroke of the pivot arm a spring biased locking arm on the rotatable member is interlocked with the actuator to lock the rotatable member in the index position. Interlock switches are provided to indicate when a rotated member is in a valid index position.

Abstract: An error control system for named data functions in a hierarchical memory system environment requiring only a single error-control encoding for each data word used therein. Each level of memory in the hierarchy thereof includes a data word storage device preceded by an error checking circuit to validate and correct when possible data to be stored therein. A translator operates upon the data name of the data word to be stored to indicate the area or portion of the storage device in which the data word is to be stored. A directory table associates data names with data word locations in the storage device, and a search mechanism fed by the translator searches the directory table in the area or portion so indicated for a data word location in the storage device to store the data word. If a data word is not located in one level of memory, the next lower level of memory is searched for same.

Abstract: A computer is programmed to generate addresses for recordation in the address track of a rotating disc file memory at predetermined intervals of space. Clock pulses are generated synchronized with the rotation of the disc. The clock pulses are applied to the computer to time the execution of the program so the addresses generated by the computer are synchronized to the rotation of the disc. The generated addresses are recorded in the address track of the disc as it rotates. A clock pulse counter set by instructions of the program controls the spacing between address data items. Address data can be recorded in the address track at different densities with the same program. The computer memory has a replaceable read-only section in which the program is stored. Different address formats are generated by changing the read-only section.

Abstract: A test pattern is recorded on the record medium by applying a pulse of direct current to a pattern generating meander line which is stationary with respect to the record medium. The record medium is then moved relative to the magnetic head to generate an electrical signal indicative of any lateral or angular deviation of the head with respect to the record medium.

Abstract: Disclosed is an ink that is intensely colored in solution with the vehicle of the ink. The ink "disappears" or becomes invisible to the naked eye after a period of time has elapsed from the application of the ink to a record document. The ink being utilized to identify an unsatisfactory character on a document such as a MICR check which has had an erroneous character printed which must be corrected before being correctly machine read.

Abstract: Character recognition apparatus and a method for identifying machine-printed and hand-printed characters. A character is optically scanned and converted to a rectangular matrix representation containing black and white points. The matrixed character is pre-processed by a non-iterative line-thinning technique so as to reduce the stroke width to no more than two points along the center line of the matrixed character. Isolated black points formed in the process of thinning the strokes are removed. Any gaps in the center-line of the matrixed character are filled and the edges of all long strokes are smoothed.The thinned character matrix is divided into a plurality of regions. One of a set of predetermined stroke features of the character matrix is extracted by scanning subregions of the character matrix such that the center position of the scanned subregions will have occupied all elements of the character matrix after one complete scan.

Abstract: An alignment network having N parallel data inputs includes log.sub.2 N rounded up to the nearest integer of levels, each level therein including N selection gates for providing selectively direct through data flow and incrementally shifted or transposed data flow. The selectable shift amount in each level is equal to k.sup.2.spsp.(L-1) modulo N wherein k is relatively prime to N and is a primitive root of the rank number N, and L is the number of the level. A control signal provided to each level directs whether data flow therethrough is to be direct or transposed.

Abstract: A system for interfacing a plurality of stations with a shared device by granting access to the device in the order of requests from the stations. The system elements are serially interconnected for bidirectional communication between the stations and the shared device. Each station employs a register to store a value representing the relative access priority of that station for the shared device. Whenever a station seeks access to the shared device its register is reset to zero and a count-up signal is propagated to all other waiting stations to cause them to increment the values in their registers. When the shared device again becomes available for access the values in the registers are transferred within each station to race counters where they are counted up by a clock until one of the terminals reaches a predetermined maximum count and is granted access to the shared device.

Abstract: In a microprogrammed pipelined data processing system, a template family interfacing structure sequences a plurality of templates to the pipelined system for control thereof, each template therein comprising a set of microinstructions for controlling each stage in the pipelined system. The templates are stored in a template micromemory system addressed by an address register and read to a control register. Parameters, grouped into template "Families", of the next template to be used and family parameters of the current template in use are utilized in conjunction to control the initiation of the next template to avoid conflict in any stage in the pipelined system.

Abstract: A buffer storage system having divisible data storage space which is time-shared by a plurality of external data devices and is accessed by at least two independently clocked bidirectional access ports. The storage system is modular and comprises a variable number of fixed-sized buffer cells, each of which may be associatively addressed by any of the access ports. The transfer of data is at a clock rate determined by the particular accessing port; and the transfer is performed serially to achieve variable field length capability and a reduction in hardware. The amount of total storage space can be easily varied by changing the physical number of buffer cells in the buffer system.

Abstract: The disclosure is of apparatus including two pairs of metal gripping blocks held together by a spring and mounted adjacent to wedge blocks carrying wedges for opening each pair. An operating plate is provided which drives the apparatus to cause the wedge blocks to open the gripping blocks to permit a length of capillary tubing filled with mercury to be inserted between the pairs of gripping blocks. The apparatus is then driven to cause the tubing to pass through a flame positioned to melt the tubing at a desired location and to form two separate seal portions at this location which are gripped by the two gripping blocks; and, on the next cycle, when the gripping blocks are opened, the portion of the tubing which is the desired capsule is released from its pair of gripping blocks and fed to a suitable receiver.

Abstract: In a modular high speed document printing system an apparatus within each printing module for inhibiting printing on a document passing therethrough when a valid print inhibiting code is sensed on the document. The apparatus employs a document lead edge sensor for sensing the presence of a document within the printing module and a print inhibiting code sensor for scanning preselected portions of a document for a print inhibiting code. A timing means is responsively coupled to the lead edge sensor for defining a time interval corresponding to the time interval wherein a valid print inhibiting code may be found. A retriggerable counter is responsively coupled to the print inhibiting code sensor for initiating counting in a memory means upon the sensing of a possible print inhibiting code. Means are provided for determining from the outputs of the counter and the timing mechanism whether a code sensed by the print inhibiting code sensor is a valid print inhibiting code.

Abstract: A tape drive including a drive motor; a take-up reel driven thereby; and a motor speed control system controlling the angular velocity of the drive motor for maintaining a substantially constant linear velocity of the tape as it is wound on the take-up reel, said control system comprising: a turns-counter counting the turns of tape as each is applied to the take-up reel; a presettable register; presetting means for presetting a predetermined number in said register at the beginning of a tape drive operation when the take-up reel is empty of tape; means for decrementing the register at a rate, with respect to the rate of application of turns onto the take-up reel, which is initially large during the application of a first predetermined number of turns, and which is subsequently reduced during the application of subsequent turns, to cause the contents of the presettable register to decrease in a non-linear manner with respect to the rate of increase in the number of turns applied to the take-up reel to approxim

Abstract: A character-serial electronic digital computer utilizing four character vocabulary, each character being represented by two binary bits, is structured to process character-serial data arriving at the computer in a manner specified and initiated by the arriving data. Data structures that may represent program or operations to be performed on data arriving at the computer input are stored in the computer's storage area in the form of nested data structures that may be illustrated as tree structures in which each node of the tree structure represents an operation. Data structures that may represent operands are also supplied to the computer in a nested organization. This operand data addresses a certain node or operation resident in the computer storage area. The linking up of the arriving operand data with its program data triggers execution of the operation.

Abstract: A character-serial electronic digital computer utilizing a four character vocabulary, each character being represented by two binary bits, is structured to process character-serial data arriving at the computer in a manner specified and initiated by the arriving data. Data structures that may represent program or operations to be performed on data arriving at the computer input are stored in the computer's storage area in the form of nested data structures that may be illustrated as tree structures in which each node of the tree structure represents an operation. Data structures that may represent operands are also supplied to the computer in a nested organization. This operand data addresses a certain node or operation resident in the computer storage area. The linking up of the arriving operand data with its program data triggers execution of the operation.

Abstract: A character-serial electronic digital computer utilizing a four character vocabulary, each character being represented by two binary bits, is structured to process character-serial data arriving at the computer in a manner specified and initiated by the arriving data. Data structures that may represent program or operations to be performed on data arriving at the computer input are stored in the computer's storage area in the form of nested data structures that may be illustrated as tree structures in which each node of the tree structure represents an operation. Data structures that may represent operands are also supplied to the computer in a nested organization. This operand data addresses a certain node or operation resident in the computer storage area. The linking up of the arriving operand data with its program data triggers execution of the operation.

Abstract: Disclosed is a ball point ink pen, its ink and its eradicator. The ink is carried at one end of the pen and the eradicator portion is carried at the other. If an error is made, the pen can be reversed and the eradicator used to neutralize the ink. The ink also neutralizes the eradicator so that when one rewrites with the same ink, any remaining eradicator on the paper is neutralized and the original ink acts as fresh ink.

Abstract: A character-serial electronic digital computer utilizing a four character vocabulary, each character being represented by two binary bits, is structured to process character-serial data arriving at the computer in a manner specified and initiated by the arriving data. Data structures that may represent program or operations to be performed on data arriving at the computer input are stored in the computer's storage area in the form of nested data structures that may be illustrated as tree structures in which each node of the tree structure represents an operation. Data structures that may represent operands are also supplied to the computer in a nested organization. This operand data addresses a certain node or operation resident in the computer storage area. The linking up of the arriving operand data with its program data triggers execution of the operation.

Abstract: An organization for a single chip calculator/controller which reduces the number of interconnections necessary in an integrated circuit chip. The single chip calculator/controller comprises an arithmetic logic unit (ALU) and a plurality of active storage elements all interconnected in parallel via an input bus and an output bus. Instructions contained in a read only memory (ROM) are read out into an instruction register. A first means is provided for decoding a portion of the instruction to generate a configuration signal for selectively configuring the logic elements of the ALU. A second means is provided for decoding the remainder of the instruction to generate a register select signal for selectively actuating a chosen storage element. The calculator/controller system also includes data clocking and input/output means. The centralization of the logic functions in the ALU allows any instruction to act upon the data contents of any active storage element.

Abstract: A microprogrammed digital computer employing a plurality of programmable read only memories containing stored control words which are specially chosen so as to provide for microinstruction sequencing in a manner which in the first instance assumes that no branching possibilities are present, even though one or more branching possibilities may in fact be present in the microinstruction flow path. The correctness of microinstruction sequencing is monitored concurrently with the execution of a microinstruction during each cycle for which a branching decision is required. When an incorrect assumed sequence is detected, correction is provided using microinstruction indexing and inhibiting signals which are selectively provided in response to the states of selected system conditions during the cycle.