Patents Represented by Attorney, Agent or Law Firm Fleit, Kain, Gibbons, Gutman & Bongini P.L.
  • Patent number: 6432120
    Abstract: A lancet assembly having a lancet holder and a triggler enclosing a lancet structure. The triggler is partially inserted into a lancet holder from the distal end. The holder is provided with a rigid internal spring holder to receive the spring-loaded lancet structure. The lancet structure is provided with a body coupled to a spring which extend from the proximal end of the body. The spring has a linear axis of compression which coincide with the longitudinal axis of the lancet assembly. A lancet is attached to the body with the sharp tip pointing towards the distal end. The triggler interacts with the lancet holder via a triggering element to maintain the spring in a compressed state such that the lancet structure is in a stable standby position which is not easily triggered by accidental bumps on the assembly.
    Type: Grant
    Filed: May 5, 2000
    Date of Patent: August 13, 2002
    Assignee: Surgilance PTE Ltd.
    Inventor: Hock Meng Teo
  • Patent number: 6429989
    Abstract: A method for writing timing marks on a rotatable storage medium, such as on a disk in a disk drive, includes the steps of: 1) during a rotation of the disk, detecting the passage of at least a portion of a first timing mark located at a radial trajectory at a first radius of the disk, and 2) during the same rotation of the disk, writing a second timing mark at a second radius of the disk. The second timing mark is located at least one of a) where at least a portion of the second timing mark overlaps at least a portion of the radial trajectory of the first timing mark, and b) where the second timing mark is in close proximity to the radial trajectory of the first timing mark. The second timing mark is written based on different parameters such as a measured time interval, a calculated time interval, and a predetermined delay.
    Type: Grant
    Filed: June 13, 2000
    Date of Patent: August 6, 2002
    Assignee: International Business Machines Corporation
    Inventors: Mark D. Schultz, Bucknell C. Webb
  • Patent number: 6426674
    Abstract: An operational amplifier is provided that includes an inverting input channel, a non-inverting input channel, and an output stage. Each of the input channels controls at least one input transistor, and the output stage supplies an output voltage as a function of a potential difference at the input channels. Additionally, the operational amplifier includes at least one signal correction element in association with at least one of the input channels. The signal correction element is selectively put into circuit to selectively add an offset voltage correction signal to a signal that is supplied to the output stage in order to balance the characteristics of the two input channels. Also provided is a circuit for correcting the offset voltage of an operational amplifier.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: July 30, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Dragos Davidescu
  • Patent number: 6423996
    Abstract: A process for fabricating a metal-metal capacitor within an integrated circuit comprises the steps of: producing a first metal electrode, a second metal electrode, and a dielectric layer on top of a lower insulating layer; and depositing an upper insulating layer on top of the two metal electrodes and the dielectric layer. The integrated circuit comprises the insulating layer, a first metal layer which is on top of the lower insulating layer, and the upper insulating layer which is on top of the first metal layer. The capacitor comprises the first metal electrode, the second metal electrode, and the dielectric layer wherein each of the two metal electrodes is in contact with one side of the dielectric layer. The electrodes and the dielectric layer lie between the lower insulating layer, which supports a level of metallization (M1), and the upper insulating layer which covers this level of metallization.
    Type: Grant
    Filed: September 8, 2000
    Date of Patent: July 23, 2002
    Assignee: STMicroelectronics S.A.
    Inventors: Michel Marty, Herve Jaouen
  • Patent number: 6424580
    Abstract: An integrated circuit includes an array of memory cells that are selected by rows and read by columns. The columns are first precharged by an internal signal to then read the memory cells. The read is responsive to an edge of a clock signal and the read is of an unknown delay. A multiplexer output provides the internal signal. The multiplexer includes a plurality of inputs electrically connected to delay lines of different delay sizes that receive the edge of the clock signal. A multiplexer control circuit selects a delay line to provide the internal signal as soon as possible after the unknown delay.
    Type: Grant
    Filed: April 21, 2000
    Date of Patent: July 23, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Christophe Frey
  • Patent number: 6415312
    Abstract: A system for reliable multicast transmission [multicasting data packets] in a packet-based data network includes mechanisms for performing the following: (1) preparing at least one packet comprising a payload portion and multicast route information, an error detection mechanism; (2) transmitting the packet to at least one intermediate node for delivery to at least two destination nodes; (3) waiting for a period of time for at least one acknowledgment signal indicating receipt of the at least one packet by at least one destination node; and (4) retransmitting a packet to a set of destination nodes from which no positive acknowledgment has been received. The multicast routing information includes information for use by the at least one intermediate node to forward the packet to at least two destination nodes.
    Type: Grant
    Filed: January 29, 1999
    Date of Patent: July 2, 2002
    Assignee: International Business Machines Corporation
    Inventor: Richard H. Boivie
  • Patent number: 6415401
    Abstract: An integrated circuit is provided that includes a first internal circuit using a first internal clock signal whose first edges are active. The first internal circuit includes a test cell having an input and an output, a first transmission line connected to the input of the test cell, and a second transmission line connected to the output of the test cell. The test cell includes first and second latches and a selection circuit. The first latch stores either information on the first transmission line or information received from another test cell, and the second latch selectively receives the information stored in the first latch. The selection circuit provides to the second transmission line either the information on the first transmission line or the information stored in the second latch. The test cell also includes means for storing the information on the first transmission line in the second latch during second edges of the first internal clock signal when the test cell is not in test mode.
    Type: Grant
    Filed: September 8, 1999
    Date of Patent: July 2, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Nöel Forget
  • Patent number: 6410425
    Abstract: A method of manufacturing an integrated circuit is provided. According to the method, first and second stop layers are deposited on a first dielectric layer that covers a first metallization level. The second stop layer is selectively etched with respect to the first stop layer, and the first stop layer is selectively etched with respect to the first dielectric layer. A second dielectric layer and a third stop layer are deposited. The third stop layer is selectively etched with respect to the second dielectric layer, and the first and second dielectric layers are selectively etched with respect to the stop layers so as to form trenches in the second dielectric layer and holes in the first dielectric layer. Additionally, an integrated circuit is provided that includes first and second metallization levels. A dielectric layer is located between the metallization levels, and a first stop layer is located between the dielectric layer and the second metallization level.
    Type: Grant
    Filed: April 15, 1999
    Date of Patent: June 25, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Christophe Verove
  • Patent number: 6405440
    Abstract: A glass tapping tool for tapping glass and breaking glass along a score-line that has been previously cut. In one embodiment, the tool comprises a hollow tube with a first end and a second end. A stationary striking member is attached to the first end of the tube for tapping a piece of glass which has been previously cut along a score-line. Mounted inside the tube is a slidable hammer with a first end and a second end. The slidable hammer is mounted so that the second end of the slidable hammer protrudes outside the second end of the hollow tube. Elastically coupled the stationary striking member with the slidable hammer is a spring.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: June 18, 2002
    Inventors: Robert G. Clark, Wendie R. Clark
  • Patent number: 6404010
    Abstract: A MOS technology power device is described which comprises a plurality of elementary active units and a part of said power device which is placed between zones where the elementary active units are formed. The part of the power device comprises at least two heavily doped body regions of a first conductivity type which are formed in a semiconductor layer of a second conductivity type, a first lightly doped semiconductor region of the first conductivity type which is placed laterally between the two body regions. The first semiconductor region is placed under a succession of a thick silicon oxide layer, a polysilicon layer and a metal layer.
    Type: Grant
    Filed: May 17, 2001
    Date of Patent: June 11, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Mario Saggio, Ferruccio Frisina, Angelo Magri'
  • Patent number: 6398926
    Abstract: An electroplating chamber that allows substrates such as wafers to be effectively plated with the plating surface facing upwards. A method of reducing non-uniformity in the electroplating process is also disclosed. The chamber includes a bottom and a cover. The bottom contains a sidewall, an opening on top and securing means for securing substrates into the chamber during the plating process. At least one electrode retaining element is provided having at least one first electrode extending therefrom. The electrode retaining element is movable between an operating position and a release position. The cover contains a second electrode held above the substrate by an electrode holder.
    Type: Grant
    Filed: May 31, 2000
    Date of Patent: June 4, 2002
    Assignee: Techpoint Pacific Singapore Pte Ltd.
    Inventor: Lotar Peter Mahneke
  • Patent number: 6399475
    Abstract: Process for producing electrical connections on the surface of a semiconductor package containing an integrated-circuit chip and having metal electrical-connection regions on the surface of the package, consisting of: covering these connection regions with a first metal layer forming an anti-diffusion barrier; covering this first layer with an anti-oxidation second metal layer; and depositing a metal solder drop or solder ball on the second metal layer. The solder drop comprises an addition of metal particles in suspension which contain at least one of the metals of the first metal layer so as to produce a precipitate comprising these additional metal particles and at least partly the metal of the second metal layer, the precipitate remaining in suspension in the solder drop.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: June 4, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Luc Petit
  • Patent number: 6398245
    Abstract: A method of managing keys used by a digital content player on a computer system. According to the method, digital content data encrypted with a first encrypting key is decrypted using a first decrypting key, and re-encrypted using a second encrypting key. A second decrypting key is encrypted using a third encrypting key to produce an encrypted second decrypting key. In one preferred method, an encrypted first decrypting key that was encrypted using a fourth encrypting key is received, and the encrypted first decrypting key is decrypted using a fourth decrypting key to reproduce the first decrypting key. A digital content player for use on a computer system is also provided. The content player includes a decrypter that decrypts digital content data, which was encrypted with a first encrypting key, using a first decrypting key so as to produce the content data. An encrypter re-encrypts the content data using a second encrypting key and encrypts a second decrypting key using a third encrypting key.
    Type: Grant
    Filed: December 1, 1998
    Date of Patent: June 4, 2002
    Assignee: International Business Machines Corporation
    Inventors: George Gregory Gruse, Marco M. Hurtado, Kenneth Louis Milsted, Jeffrey B. Lotspiech
  • Patent number: 6397218
    Abstract: In a search engine server, a method for searching for data in a data network comprising hyperlinked pages comprising the steps of (1) receiving an initial set of network addresses for pages in the data network; (2) receiving a non-negative integer, N, specifying a chain length; (3) receiving a set of at least one search argument comprising search criteria; and (4) performing a search wherein all pages linked to said initial set of addresses by a chain of distance less than or equal to N are examined for compliance with the search criteria, and all pages meeting such criteria are returned as successful objects of the search. According to optional embodiments, the foregoing method can be implemented as a computer readable medium with instructions for performing the above steps, as an application program, or a browser resident at an end user's computer system. It is also possible to implement as a special purpose information handling system.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: May 28, 2002
    Assignee: International Business Machines Corporation
    Inventors: Edith H. Stern, James M. Dunn, Barry E. Willner
  • Patent number: 6397210
    Abstract: A method for searching for data in a data network comprising hyperlinked pages comprising the steps of (1) receiving an initial set of network addresses for pages in the data network; (2) receiving a non-negative integer, N, specifying a chain length; (3) receiving a set of at least one search argument comprising search criteria; and (4) performing a search wherein all pages linked to said initial set of addresses by a chain of distance less than or equal to N are examined for compliance with the search criteria, and all pages meeting such criteria are returned as successful objects of the search. According to optional embodiments, the foregoing method can be implemented as a computer readable medium with instructions for performing the above steps, as an application program, or a browser resident at an end user's computer system. It is also possible to implement as a special purpose information handling system.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: May 28, 2002
    Assignee: International Business Machines Corporation
    Inventors: Edith H. Stern, James M. Dunn, Barry E. Willner
  • Patent number: 6395616
    Abstract: A method is provided for locally creating an aperture in a metal layer that is formed above a base wafer having at least one lateral mark provided in its peripheral edge and at least one surface mark provided at a point on its surface. Coordinates of a starting position of a tool with respect to the peripheral edge and the lateral mark are found, and coordinates of the position of the surface mark with respect to the starting position of the tool are calculated so as to determine a course to be followed by the tool from the starting position to a working position above the surface mark. The tool is moved to the working position and activated so as to etch the metal layer and create the aperture in the metal layer above the surface mark. Also provided is a device for locally creating an aperture in a metal layer that is formed above a base wafer.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: May 28, 2002
    Assignee: STMicroelectronics S.A.
    Inventors: André Weill, Jean-Pierre Panabiere
  • Patent number: 6393595
    Abstract: A method for communicating between a transmitting unit and a receiving unit. A message formed by elementary messages is transmitted from the transmitting unit to the receiving unit, and at least one reception bit is transmitted from the receiving unit to the transmitting unit. The reception bit (or bits) allows the transmitting unit to determine the elementary message that is to be transmitted next. In a preferred method, at least two reception bits are transmitted from the receiving unit and the values of the reception bits indicate the elementary message that is to be transmitted next by the transmitting unit. The present invention also provides a receiving device for receiving messages from a transmitting device. The receiving device includes an interface for receiving a transmitted message from the transmitting device and for analyzing a received elementary message to determine if it was properly received, and a transmitter for transmitting at least one reception bit to the transmitting device.
    Type: Grant
    Filed: January 15, 1999
    Date of Patent: May 21, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Jean-Marie Gaultier
  • Patent number: 6389538
    Abstract: A system for tracking usage of digital content on user devices. Electronic stores coupled to a network sell licenses to play digital content data to users. Content players, which receive from the network the licensed content data, are used to play the licensed content data. Additionally, a logging site that is coupled to the network tracks the playing of the content data. In particular, the logging site receives play information from the network, and the play information includes the number of times that the content data has been played by the associated content player. Also provided is a method for tracking usage of digital content on user devices. According to the method, a license to play digital content data is sold to a user, and the licensed content data is transmitted to a content player for the user.
    Type: Grant
    Filed: October 22, 1998
    Date of Patent: May 14, 2002
    Assignee: International Business Machines Corporation
    Inventors: George Gregory Gruse, John J. Dorak, Jr., Kenneth Louis Milsted
  • Patent number: 6389478
    Abstract: A method for grouping I/O vectors to be transferred across a distributed computing environment comprising a plurality of processing nodes coupled together over a network. The method reduces the number of packets transmitted over a network between two or more nodes. The method includes the grouping of two or more I/O vectors into a single message, consisting of one packet with a predetermined maximum size, provided the sizes of the vectors are small enough to be placed into a single packet. The grouping method finds an efficient collection of vectors to form groups that fit inside a single packet. If two or more of the vectors can be combined so that the resulting single packet size does not exceed the predetermined maximum size, the vectors are grouped accordingly. Vectors whose size approach the predetermined maximum packet size are sent as a separate message.
    Type: Grant
    Filed: August 2, 1999
    Date of Patent: May 14, 2002
    Assignee: International Business Machines Corporation
    Inventors: Robert Sidney Blackmore, Xin Chen, Rama Krishna Govindaraju, Anan Vishwanath Hudli
  • Patent number: 6388969
    Abstract: A device is provided for calculating mutual phase shift of first and second incident signals. The device includes a first pair of blocks associated with the first incident signal, a second pair of blocks associated with the second incident signal, checking circuit, and post-processing circuit. Each of the blocks has storage elements for storing a predetermined set of samples of the corresponding incident signal. In the presence of minimum samples or maximum samples of both incident signals, the checking circuit stores a first set of samples relating to the first incident signal in one of the blocks of the first pair and a first set of samples relating to the second incident signal in the counterpart block of the second pair, and then stores the following sets of samples of each incident signal alternately in the two blocks of each pair. The checking circuit delivers a block validation signal when a set of samples has been completely stored in the storage elements of one of the blocks.
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: May 14, 2002
    Assignee: STMicroelectronics S.A.
    Inventors: Fritz Lebowsky, Sonia Marrec, Rabah Chelal