Abstract: An implantable devices for the effective elimination of an arrhythmogenic site from the myocardium is presented. By inserting small biocompatible conductors and/or insulators into the heart tissue at the arrhythmogenic site, it is possible to effectively eliminate a portion of the tissue from the electric field and current paths within the heart. The device would act as an alternative to the standard techniques for the removal of tissue from the effective contribution to the hearts electrical action which require the destruction of tissue via energy transfer (RF, microwave, cryogenic, etc.). This device is a significant improvement in the state of the art in that it does not require tissue necrosis.In one preferred embodiment the device is a non conductive helix that is permanently implanted into the heart wall around the arrhythmogenic site.

Abstract: A holographic particle image velocimeter employs stereoscopic recording of particle images, taken from two different perspectives and at two distinct points in time for each perspective, on a single holographic film plate. The different perspectives are provided by two optical assemblies, each including a collecting lens, a prism and a focusing lens. Collimated laser energy is pulsed through a fluid stream, with elements carried in the stream scattering light, some of which is collected by each collecting lens. The respective focusing lenses are configured to form images of the scattered light near the holographic plate. The particle images stored on the plate are reconstructed using the same optical assemblies employed in recording, by transferring the film plate and optical assemblies as a single integral unit to a reconstruction site.

Abstract: An interferometric system for measuring cross-sectional dimensions of glass fibers and other elongate objects includes: a transmitting optics module for generating two laser beams, and causing the laser beams to intersect and interfere with one another over a measuring volume; several photodetectors to collect the light scattered by the glass fiber positioned in the interference region; and signal processing circuitry to deduce the fiber diameter using phase shifts between the signal pairs and fiber velocity using the frequency of the signals. The system further offers: elimination of the 360.degree.

Abstract: A data processing and transmission network includes plural information processing systems and shared sub-systems remote from the information processing systems. Each shared sub-system includes an I/O bus and a plurality of I/O bus interface logic circuits coupled to the bus. Each interface logic circuit is coupled to one of the system processing devices via a bidirectional fiber optic link, and thereby couples its associated processing device to the I/O bus. Further fiber optic links couple each system processing device to the I/O bus of each remaining sub-system through an associated I/O bus interface logic circuit. Each sub-system further includes multiple I/O devices, each device coupled to a device controller which in turn is coupled to the I/O bus.

Abstract: An electrical control circuit for a constant temperature anemometer includes a first operational amplifier coupled to receive inputs from two intermediate terminals of the Wheatstone bridge, and to generate an output voltage in response to a difference in voltage between the intermediate terminals. A second operational amplifier receives the output voltage, and provides its output as a drive voltage to the Wheatstone bridge. The second operational amplifier also provides its output to a feedback loop which incorporates an A/D converter, a digital processor and a D/A converter. The amplifier analog output is converted to a digital signal. The digital processor calculates a digital offset value, based on a constant ratio of the digital offset value/digital signal, predetermined by selection and setting of the various control circuit components. The D/A converter converts the digital offset value to an offset voltage provided to the second operational amplifier as an input.

Abstract: An instruction pipeline includes a sequence of interconnected pipeline stages, each stage dedicated to one of several operations executed on data in a digital processing device. Control words govern execution of the operations as they progress through the pipeline. The pipeline stages, as well as the pipeline entry and exit, are interconnected in a manner that permits each control word to enter and exit the pipeline at any one of the stages, and to skip any stages in which the control word will not govern any operations on data. On occasion, this permits a control word to bypass another control word which originally preceded it in the pipeline, thus to reverse the order of the two control words. A mapping field in each control word predetermines its route through the instruction pipeline, one bit of the map field corresponding to each pipeline stage.

Abstract: An information processing network includes multiple processing devices, a main storage memory, and an interface coupling the processing devices to the main storage memory. All processing devices contend for control of the interface on an equal basis, subject to a dynamically shifting sequence of priority rankings, invoked to resolve contentions for the interface or for one of a plurality of hardware class locks. The class locks are uniquely associated with different capabilities or classes of data operations, which reduces the number of contentions and allows multiple operations to proceed simultaneously. Arbitration logic encompassing all of the processing devices is duplicated in each of the processing devices, and kept coherent through an interconnection of multiple data buses. One bus is associated with each processing device, receives the output of the associated processing device and provides the output to each of the other processing devices.

Abstract: A retrieval and collection device is adapted for removable coupling in-line to a conventional portable vacuum cleaning system, at an upstream end of a vacuum hose. The retrieval device includes a casing with a relatively large diameter medial region and respective upstream and downstream coupling sleeves at opposite ends of the casing. The casing consists of two casing sections joined along the casing medial region for periodic disassembly to remove captured articles. The size of articles to be captured is determined by a flat, disc-like screen removably mounted in a chamber defined by the casing medial region. Multiple apertures through the screen are substantially uniform in size to capture objects of at least a given dimension. Separate screens with apertures of different sizes can be interchangeably mounted in the chamber. Each screen is part of a partition device that further includes a collar surrounding the screen and a handle projected axially from the center of the screen.

Abstract: The concentration of non-volatile residue in a test solvent is determined by generating multiple liquid droplets from a liquid stream including the solvent and ultrapure water. The droplets are dried to form a stream of multiple particles of the non-volatile residue. A supply of ultrapure deionized water is caused to flow continuously toward a non-volatile residue monitor, at a constant fluid flow rate. Upstream of the residue monitor, a syringe is provided for intermittently injecting a test solvent into the fluid stream. In one case, the solvent is injected for several minutes at a constant flow rate substantially less than that of the ultrapure water. A mixing valve, downstream of the point of solvent introduction, causes turbulent flow to thoroughly mix the solvent and water. In an alternative approach, a syringe is used to instantaneously inject solvent in the form of bursts.

Abstract: A data processing network includes multiple processing devices, multiple memory cards of main storage, and a shared interface. Each of the memory cards includes memory arrays, an internal register for temporarily storing a pointer data word read from the arrays, and logic circuitry. When one of the processing devices sends a tag bit extraction or tag bit insertion command to one of the memory cards, the pointer to be modified is retrieved from a selected address in the memory arrays and latched into the internal register. The logic circuitry provides the tag bits to an AND logic gate and provides the AND gate output to the processor in the case of tag bit extraction. For tag bit insertion, the circuitry applies the pointer from the arrays and a tag bit input from the processor, as inputs to a multiplexer and provides the multiplexer output back to the selected address in the arrays.

Abstract: A system for determining the fractional capture efficiency of filters includes two filters having substantially the same capture efficiency connected in series. A steady, controlled flow of ultrapure water and a colloidal silica suspension is directed through both filters, with respective stages of the flow upstream of the upstream filter, between the filters and downstream of the downstream filter, directed to respective non-volatile residue monitors. Each residue monitor produces a digital output representing the non-volatile residue concentration at its respective stage. A microprocessor receives the digital outputs and generates respective residue values indicating residue concentration in parts per billion. The three residue values are used to characterize the residue by proportion of the colloidal silica suspension to other residue components, and to calculate filter capture efficiency with respect to the colloidal silica.

Abstract: A process is disclosed for merging promotional information, based on multiple requests and relating to different promotions, into a single stream for the printing and mailing of coupons, checks or other promotional items. The requests relating to a particular promotion are matched with an associated promotion control record, with one or more promotions similarly associated with an account control record in the, case of preparing checks. Prior to printing, individual data entries for various promotions are combined, and sorted in a sequence predetermined for qualification for various postal rate classifications, thus to minimize the cumulative cost of mailing the entries. Pertinent information associated with each entry is printed on sheets of card stock, each sheet separable into four individual segments to provide four checks or coupons.

Abstract: A disk drive assembly includes a disk pack with an axially retractable spindle assembly, along with a rotary actuator, mounted within a unitary deck and precision aligned by bores through spaced apart upper and lower support walls of the deck. Bushings, mounted to opposite ends of a spindle shaft through bearings, are aligned with the bores by inserting the retracted spindle assembly into the deck, with a spring biasing the spindle assembly into the retracted position. Fasteners through the opposed support walls draw the bushing sleeves axially outward against the spring force to preload the bearings as the shaft is aligned and secured, without employing a jig or any other alignment tooling.

Abstract: A fast store-through cache process is disclosed in connection with multiple processors sharing a main storage memory. Each processor has a cache memory including multiple cache lines, each line associated with an address in main storage. Each cache memory has a cache directory for recording main storage addresses mapped into cache memory, identifying cache lines as valid or invalid, and holding status bits of data words stored in the cache memory. According to the process, a data word is stored in the cache memory during a first clock cycle and the associated cache directory is read to determine whether the corresponding main storage address is mapped into the cache memory. If so, and if no status bits in the data word require update, the store to the cache memory is complete.

Abstract: A data processing network includes multiple processing devices, one or more memory cards in main storage, and a shared interface for processor access to main storage. Each of the memory cards includes dynamic random access memory arrays which require a periodic refresh pulse. To provide refresh pulses, each of the memory cards includes a programmable register, a counter receiving clock pulses, and a comparator. The comparator generates a request pulse each time the output from the pulse counter equals a selected value provided by the register. The register is programmable to controllably adjust the selected value, and thus select the frequency at which refresh request pulses are generated by the comparator. The memory card further includes a buffer for receiving the refresh request pulses and generating a refresh request responsive to each pulse.

Abstract: A flow control device includes a housing with separate main flow and flow control (servo) passages between an inlet port and an exit port. A control chamber in the housing is in fluid communication with the servo passage. A flexible membrane forms a partition between the main flow passage and the control chamber. The servo passage includes a variable servo orifice upstream of the control chamber and a fixed orifice downstream of the chamber. When the servo valve is open to permit passage of fluid into the control chamber, the resultant pressure on the membrane maintains the main valve closed. The main valve opens in response to closing the servo valve. The fixed orifice has a profile sufficiently small to provide for an acceptable leak or continuous fluid flow through the device when the servo valve is open, and further provides for a soft start when the servo valve is closed to open the main valve.

Abstract: A data processing network includes multiple processing devices, multiple memory cards of main storage, and a shared interface. Each of the memory cards includes memory arrays, an internal register for temporarily storing a data word read from the arrays, and logic circuitry. When one of the processing devices sends a set or reset command to one of the memory cards, the processor also sends a data mask. A data word to be modified is retrieved from a selected location in the memory arrays and latched into the internal register. The logic circuitry applies the data mask to a data word in the internal register, to modify the data word according to the data mask, then returns the data word to the selected location in the arrays.

Abstract: A magnetic thin film recording medium is provided for longitudinal recording of magnetic flux transitions, with the read-back signals enhanced due to a substantial reduction in media noise. The reduced noise level is the result of a unique vacuum deposition process for applying an underlayer to a substrate, prior to deposition of the magnetic thin film. In particular, the underlayer is deposited in a low temperature plasma process under increased pressure of argon or another inert gas and at reduced deposition rates, thus to create voids or interstitial areas which substantially isolate individual grains from their neighboring grains. The subsequently deposited magnetic thin film replicates the crystalline structure and orientation of the chromium underlayer, for relatively isolated grains in the recording layer. This results in lower media noise levels, approaching or equalling those characteristic of particulate media.

Abstract: A high performance interface joins multiple processing devices configured as masters, with multiple memory cards or other devices configured as slaves. The interface includes a working data bus for transmitting working information between the processors and memory cards. Auxiliary busses, including a command/address bus for commands and address information and a communication bus for status information, are connected to all of the processing devices and slave devices and operate in parallel with the working data bus. A system for distributing control of the working information bus, among all of the master devices and slave devices, includes a grant token and plural select tokens. The grant token, a line connected in common to all devices, permits a device currently controlling the interface to retain control until it completes its transmission.