Abstract: A method of functionally testing cache tag RAMs in processor systems where the kernel is typically inaccessible. A test program first determines whether a fault exists at all within the cache tag RAM. If a fault is determined to exist, the faulty RAM location is exercised by sequentially applying patterns of ones and zeros until the pattern of bits actually present at the faulty tag RAM location is determined. A comparison of this pattern of bits with the expected bit pattern provides information as the precise location of the fault so as to permit replacement of defective chips.

Abstract: An electrical contact having one or more spring-biased tabs for mounting to a circuit board precludes the need for additional mechanical fasteners and obviates any additional manufacturing steps, except for soldering. The tabs are formed and shaped to provide springs which, when inserted into holes in a circuit board, compress and grip the interior wall of the hole.

Abstract: An apparatus for and a method of measuring capacitance employs a charge measuring system. While a capacitive element, which may be an unknown capacitor, is charged completely to a predetermined voltage, a charge proportional to the capacitance of the capacitive element is accumulated on the feedback capacitor of an integrating operational amplifier. Thereafter, the charge is measured by measuring the time required to completely remove the charge from the feedback capacitor using the same predetermined voltage as a reference. In a preferred embodiment, the present invention is manifested as a capacitance measurement feature in a hand-held multimeter wherein a largely conventional dual-slope analog-to-digital converter is employed as the charge measuring system.

Abstract: Addition of gated buffers which are accessible by the test apparatus microprocessor for receiving status information and the signals on some of the lines of the data bus of a microprocessor-based system under test provides the capacity for self testing, automatic calibration, improved diagnostics of a kernel at low levels of kernel operability and faster operation of the test system.

Abstract: A miniature vacuum-actuated test fixture for testing individual components or localized areas of circuit boards includes a probe module having an array of probes carried by a piston, and a separable registration module which may be visually aligned over a component or circuitry and attached before the probes are ever in contact with the circuit board. Once the registration module is attached to the circuit board, the registration module is joined with the probe module, and the probe module is evacuated, drawing the piston upward, carrying the probes into contact with the component or circuitry.

Abstract: The frequency resolution of a direct digital synthesizer is increased by varying the phase increment used to accumulate wave lookup table addresses between two integer values. The time periods during which the larger integer value is employed is proportional to a fractional part of the desired phase increment for providing an analog output at a selected frequency.

Abstract: Arrangements are provided for generation of dual-tone waveforms utilizing direct digital waveform synthesis techniques and architecture and retaining the advantageous characteristics of direct digital waveform synthesis. Preferred embodiments feature combination of generated waveforms at an analog adder, a digital adder using a single digital-to-analog converter and at a single wave table, respectively, each providing particular hardware economies and operational advantages with respect to other preferred embodiments.

Abstract: A triggering control circuit varies a holdoff period for one sweep cycle whereby to lock triggering to a different, selected event viewable on an oscilloscope.

Abstract: A modular electronic instrument system having automated calibration capability comprises a system controller and a plurality of calibration instruments for calibrating a target instrument. The instruments, if remotely controllable, may be interconnected by a common interface bus. The calibration instruments have associated therewith a characteristics file including resource capability information, and an instrument to be calibrated has associated therewith a characteristics file including calibration information. The system controller automatically derives calibration requirements from the calibration information and matches the requirements with resource capabilities of the calibration instruments. All of the characteristics files may be provided in a standardized format so that a system may be configured without regard to instrument-specific model numbers or manufacturers.

Abstract: A frequency response stabilized amplitude modulation circuit includes a variable gain amplitude modulator producing an output signal having an amplitude proportional to a product of amplitudes of input carrier, modulating and gain control signals. An envelope detector generates a signal having an amplitude responsive to the modulation envelope of the output signal. A first difference amplifier produces the modulating signal input to the amplitude modulator in proportion to a difference between amplitudes of the envelope detection signal and an audio input signal. The modulating signal incorporates negative feedback to ensure the envelope amplitude of the modulated output signal tracks the audio input. A second difference amplifier provides the gain control signal input for the amplitude modulator in accordance with a difference between amplitudes of the modulating signal, scaled by a constant factor, and the envelope detection signal.

Abstract: A digital phase/frequency detector circuit in a phase locked loop comprises multiple bistable devices which are clocked up and down respectively by input and references digital signals to generate square waves. The duty ratio corresponds to the phase/frequency difference and sweeps repetitively between minimum and maximum values as the phase/frequency difference changes monotonically. The square waves are combined logically and additively in the output. The output is integrated to obtain an ever increasing output over many cycles of the phase/frequency difference until the maximum is reached depending on the number of bistable devices which are used. Added circuitry is used to avoid coincidence problems in the clocking input and reference digital signals, to minimize resultant irregularities, and hold the bistable devices at maximum or minimum, as appropriate, until the direction of phase/frequency difference reverses.

Abstract: A semiconductor memory such as a read only memory (ROM) is tested and faults are diagnosed and identified by examining data stored therein for patterns that could not exist if the memory is faulty, proving the memory to be functional by counterexample. Diagnosis is carried out using probabilistic algorithms that terminate quickly if the memory is not faulty, with any pathological contents of the memory masked to minimize the likelihood of misdiagnosis. Faults diagnosed in accordance with the invention include stuck or tied data or address lines.

Abstract: A method of and system of high-speed, high-accuracy functional testing of memories in microprocessor-based units or boards under test includes a test system that is effectively permanently coupled to the unit under test bus structure during test execution and operates at the unit under test's clock rate. The test program may be stored in the unit under test's own memory, or may be electrically transferred from the test system's memory to the memory under test using a memory overlay technique.Memory testing speed may be further incresed by taking advantage of block move and compare features of newer microprocessors. An algorithm which exploits the block move and compare features is provided.

Abstract: A method and system for testing and troubleshooting microprocessor-based electronic systems employs memory emulation techniques as well as other techniques to provide complete functionality tests and fault location. Fine-resolution sync pulses may be generated at preselected time positions during a bus cycle of interest to facilitate full troubleshooting fault isolation. Other features include bus testing using memory emulation techniques, using the chip select line of ROMs to encode test results, and techniques that keep a target microprocessor functioning in a system in which the kernel is dead.

Abstract: An improved alternating current amplifier employs capacitive feedback to balance the intrinsic input capacitance, and a multiplier circuit responsive to a digital control signal coupled in the feedback path to vary the effective capacitance of the capacitive feedback. Thus, the frequency response of the amplifier may be adjusted and set digitally, such as under computer control, obviating the need to make manual adjustments to improve amplifier performance.

Abstract: A composite chassis for electronic apparatus incorporates a sheet metal substrate with injection-molded plastic structural members and other details added. Certain mounting details permit good mechanical and electrical connection of external frame members, circuit boards, and other parts to the chassis.

Abstract: A variable resolution system for a potentiometer converts the analog output of the potentiometer to digital steps which are multiplied to provide a number of digital output steps dependent upon the extent of potentiometer movement since last reversal. Upon each reversal, the number of output steps per input step is reduced to provide greater resolution.

Abstract: Measurement accuracy of an oscilloscope is extended by monitoring the temperature within the oscilloscope, and automatically entering a calibration cycle if the temperature varies by a predetermined amount. A temperature sensor is strategically located within the oscilloscope to sense variations in temperature. A first sensed temperature value is stored. Upper and lower temperature limits representing the maximum permissible deviation from the stored value are calculated. Instantaneous temperature values from the sensor are compared with the stored value, and as long as the instaneous values are with the limits, an indication of extended accuracy is provided. If the instantaneous temperature values vary outside the limits, an automatic calibration cycle is initiated. After calibration, a new temperature value is stored and the monitoring process continues to ensure extended accuracy.

Abstract: A method and apparatus for measuring the width of pulses in the gigahertz range comprises the steps of splitting an input pulse and delaying one of the pulses prior to their recombination in a directional coupler. The recombined pulse is then measured in a power meter. By varying the delay, maximum and minimum readings from the power meter may be found. The pulse width may then be found as a function of the actual delay, which may be controlled by the user by varying the distance through a waveguide that the delayed pulse must travel.