Abstract: A direct memory access controller controls many direct memory access ports using a token passing scheme. The system multiplexes the port's accesses to external random access memory by daisy-chaining a loop of direct access memory ports and passing the token around to each port. Once a port receives the token it may request as many random access memory accesses as it requires. These accesses may be either read operations or write operations with both using the same multiplexed data bus. The latency inherent in reading an external RAM causes no loss in the access efficiency. When the port has completed its data transfer or if the port does not require a data transfer, the token is passed to the next direct memory access port for its data transfer. The token is passed around to all connected ports until all have had an opportunity to complete any memory transfers which they required. Each port is identical except for a binary identification code that is used to represent each port.

Abstract: A time interleaved bit addressed weighted pulse width modulation (PWM) method and apparatus reduces the bandwidth requirement necessary for providing a plurality of data entries regarding multiple points of information. As is well known, a weighted PWM scheme modulates an output by utilizing a frame time that is divided into events of varying durations; most conventional schemes have each bit in the frame being half the duration of its predecessor. The modulated signal is activated during all, some or none of the events in the frame to develop a signal representing a particular parameter. This method and apparatus can be used in a display for selecting among varying levels of gray scale or from among multiple colors on a palette. In one application for a display, a register containing the same number of data pits as pixels in a row of the display is provided. The register is loaded with one bit per frame for each pixel in the entire row.

Abstract: A horizontal lock detector circuit monitors charge pump control signals within a horizontal phase-lock loop to determine when the sampling pulses generated by the video system are locked in phase with the synchronization pulses of the input composite video signal. An output signal is generated by the lock detector circuit which is active when the sampling pulses are locked in phase with the input signal and inactive when the sampling pulses are not locked in phase with the input signal. The charge pump control signals are generated by a phase detector circuit within the phase-lock loop in response to a difference in phase between the sampling pulses and the input signal. Once the sampling pulses are locked in phase with the input signal, the charge pump control signals will become inactive. A current source is enabled when either of the charge pump control signals are active. The current source builds up a first level of charge on a first capacitor during the horizontal blanking period.

Abstract: A degenerated differential pair waveform builder has a single ramp generator control circuit and a plurality of differential pairs. A trigger input is generated and input to the ramp generator control circuit. The ramp generator control circuit then generates a differential signal which is output to each of the differential pairs through a positive edge signal node and a negative edge signal node. Each differential pair then generates an output in response to the differential signal output from the ramp generator control circuit. The outputs from the differential pairs are combined in a summing circuit which outputs a composite waveform. Each differential pair has an associated ramp time which is dependent upon the value of the resistance in its emitter circuit. The ramp time of each differential pair directly affects the slope of its resulting output waveform.

Abstract: In a computer network having a plurality of interconnected terminals and a shared memory device for storing digital data, a message handling system for sending and retrieving both voice and text messages over the computer network. A voice message is input either through a phone associated with one of the computer terminals or via a remote phone. The voice message is converted into a digital voice file which is stored on the shared memory device corresponding to the intended recipient's mailbox. Thereby, one mailbox can contain both voice and text messages. The same message handling mechanism is used for handling both voice and text messages. A list of the messages currently stored for each mailbox can be pulled for display by their respective terminals. A selected voice message may be selected for playback over the phone. Likewise, a text message may be selected for display by the terminal. Call answering and remote playback functions are also provided.

Abstract: A signal generator generates a reference signal, centered about a reference voltage and having a predetermined period. The signal generator also generates output signals P and Z. The output signal P is a squarewave which changes levels at the peaks of the reference signal. The output signal Z is a squarewave which changes levels at the reference voltage crossings of the reference signal. A phase-shifted signal generator generates a phase-shifted signal using the output signals P and Z by switching in appropriate signal levels from the signal generator. The output signals P and Z are input to a switch control circuit which controls a network of switches, depending on a current region of the reference signal, to couple appropriate signals to an amplifier circuit. The switch control circuit determines the current region based on the state of the output signals P and Z. The amplifier circuit provides the phase-shifted signal in response to the signals coupled to it by the network of switches.

Abstract: A brushless electric motor has a fluid-tight housing, an internal rotor which is connected to an output shaft, stator plates which are disposed at a radial spacing from the rotor, a coolant delivery line leading into the interior of the housing, and a coolant discharge line leading out of the housing. A control arrangement, which as a function of the rotational speed and torque adjusts the volume flow of the coolant flowing through the interior of the housing, is provided to keep the efficiency of the arrangement as a whole high and to provide an electric motor having high power density.

Abstract: A method and apparatus for detecting the transfer of a wrong sector uses the LBA to ensure that a correct sector is transferred. The LBA may be appended to the sector data during a write operation and verified during a read operation. Preferably, the LBA is embedded into the CRC block during a write operation and used to detect the transfer of a wrong sector during a read operation. The LBA may be embedded within the CRC, before or after it is transmitted to a CRC Generator/Checker, by Exclusive-ORing the sector data or CRC data with the LBA. During a read operation, the incoming CRC is Exclusive-ORed with the expected LBA of the sector being read, thereby eliminating the LBA from the CRC data. The CRC data is then checked by the CRC Generator/Checker and an error is signalled if the CRC data does not match. Using the method and apparatus of the present invention, the LBA may also be embedded in the CRC during format and minimal latency operations.

Abstract: A sliding window with big gap data compression system is simple to implement and gives good compression over a wide variety of bilevel images. A sliding window compressor with a very small window size is utilized in conjunction with a storage buffer which is large enough to hold at least an entire scan line of data symbols. Coupled to the storage buffer is circuitry that checks for a match between the incoming data symbol and a symbol stored in one specific programmable location. This programmable location is preferably exactly one scan line length away. Match locations are either within the range of the small window or exactly equal to the specific programmable location. The entire compressor can be viewed as a sliding window with a big gap (SWBG). This sliding window is of a length corresponding to the length of the scan line, comprised of the small window followed by a big gap and then the one specific programmable location, at the end of the scan line.

Abstract: A single-ended input amplifier circuit for use within a magnetic media storage system includes circuits for concurrently biasing and amplifying signals generated by a magnetoresistive element. The amplifier receives power from a single-ended power supply. A first resistor is included for setting the gain of the amplifier and providing an output signal corresponding to the signals generated by the magnetoresistive element. A first feedback circuit generates a first biasing current provided to the magnetoresistive element. The first feedback circuit includes a first transconductance amplifier which amplifies the difference between the output signal and a reference voltage. A second feedback circuit generates a second biasing current provided to the magnetoresistive element. The second feedback circuit includes a second transconductance amplifier which amplifies the difference between the reference voltage and a voltage signal taken from a node between two resistors.

Abstract: A circuit for powering a three-phase AC induction motor. The circuit generates a first signal of the form Vdc+A sin (2.pi.ft-0.degree.) and a second signal of the form Vdc+A sin (2.pi.ft-90.degree.) as is done in conventional circuits for powering two-phase AC induction motors. A vector summation circuit is used to create a third signal from the first two signals. The third signal is of the form Vdc+A sin (2.pi.ft+60.degree.). The first signal is input to a first error amplifier along with a first sampled difference signal from the motor. The third signal is input to a second error amplifier along with a second sampled difference signal from the motor. The outputs from each of the first and second amplifiers is input into a first comparator and a second comparator along with a sawtooth waveform to create a first sinusoidally modulated square wave signal and a second sinusoidally modulated square wave signal.

Abstract: A more efficient system for cooling a load to very low temperatures by utilizing a double circuited refrigeration design. The design incorporates an air cooled condenser in a first circuit coupled in parallel with a water cooled condenser. The water cooled condenser is further coupled to a chiller in a second circuit. The chiller operates as an evaporator in the second circuit to cool a liquid that circulates between the chiller and the water cooled condenser. As the cool liquid circulates through the water cooled condenser, it enhances the efficiency of the water cooled condenser. The system operates in a single circuited mode when the difference between the desired load temperature and the ambient temperature is relatively small. The system operates in a double circuited mode the difference in temperatures is relatively large.

Abstract: A vertical reset generator monitors a composite video signal and generates a vertical reset pulse which is active during the presence of serration pulses within the composite video signal. The synchronization pulses within the input composite video signal are separated by a sync separator circuit. The output of the sync separator circuit, including horizontal sync pulses, equalizing pulses and serration pulses, is provided to a charging circuit which charges up a capacitor when the output of the sync separator circuit is at a low level and discharges the capacitor when the output of the sync separator circuit is at a high level. The serration pulses are at a low level for a greater time period than the equalizing pulses. The charge built up across the capacitor is therefore greater during a serration pulse than during an equalizing pulse.

Abstract: A mixer control circuit generates content control signals which are used by a mixer circuit to control the content of an output signal. The output signal will include either an analog signal, a digital signal or a mixture of the analog and digital signals. The level of a digital content control signal corresponds to the percentage of the output signal which includes the digital signal. The level of an analog content control signal corresponds to the percentage of the output signal which includes the analog signal. When the output signal includes a mixture of the analog and digital signals, a differential pair and an external control voltage are used to specify the percentage of each signal to be included within the output signal. During a horizontal blanking period, when the signals are being mixed, the differential pair and the external control voltage are bypassed and only the analog signal is included within the output signal.

Abstract: A method and apparatus for decoding Reed-Solomon codes in large Galois Fields GF(2.sup.n) represents the finite field as a quadratic extension field of one or more subfields GF(2.sup.m). This type of field representation allows embedded subfields, as well as the primary extension field to be simultaneously represented in normal form. The basic arithmetic operations for the extension field are written solely in terms of operations performed in one or more subfields. The operations of multiplication, inverse, square, square root and conjugation are performed in GF(2.sup.n), utilizing only operations from the subfield GF(2.sup.m).

Abstract: A high-speed video switch uses a current-mode switch to switch between a first input video signal and a second input video signal. Each of the first and second input video signals are input to the video switch through clamping circuits which clamp a blank level of the input video signals to a predetermined constant level. Preferably, the blank level of the first and second input video signals are clamped to two volts. An output signal is output by the video switch which represents one of the input video signals. The video switch receives two control signals from the video system. The two control signals control which one of the input video signals is represented by the output signal. A back-to-back diode configured isolation circuit is used to isolate the one of the two input video signals which is not represented by the output signal.

Abstract: The present invention describes a novel method and apparatus for sampling an input/output pin of an electronic device at high speeds, comprising the steps of: driving the device input/output pin through a series resistor with a middle voltage between the high and low voltages of the device; sampling and latching the voltage at the input/output pin; comparing the latched voltage at the device input/output pin with a high threshold voltage which is between the high voltage of the device and the middle voltage; comparing the latched voltage at the device input/output pin with a low threshold voltage which is between the low voltage of the device and the middle voltage; and using the results of the two comparisons to determine whether the device input/output pin is driving high, driving low, or in an input mode.