Patents Represented by Attorney, Agent or Law Firm Hayes, Soloway, Hennessey, Grossman & Hage
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Patent number: 6738887Abstract: A system and method for concurrent operations in a microcontroller's program memory is provided. In one exemplary embodiment, a microcontroller system is provided that includes a microcontroller, programmable read-only memory (PROM), random access memory (RAM) and a bridge circuit disposed between the PROM and microcontroller. The bridge is adapted with memory-mapped registers to map specific address locations from RAM to PROM, to permit the microcontroller to update PROM while concurrently executing code from RAM. In another exemplary embodiment, the bridge circuitry includes microcontroller reset and RAM enable/disable capabilities to further efficiently manage memory resources.Type: GrantFiled: July 17, 2001Date of Patent: May 18, 2004Assignee: International Business Machines CorporationInventors: Yolanda Colpo, Enrique Garcia
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Patent number: 6735704Abstract: A power management system and method for multiple redundant power supplies. The present invention provides management and control of N+M power supplies, where N represents the minimum number of power supplies required and where M is the number of redundant power supplies (M>1), where any one of the power supplies may be capable of supplying power to all the loads of the power subsystems. In the preferred embodiment each power subsystem includes a power supply and a controller coupled to a power bus. A communication bus is provided common to each power subsystem. During reset or power-on periods, the controllers are programmed to uniquely delay the start time of each power supply, thereby protecting against an overcurrent/overvoltage condition on the power bus during reset periods. A master controller is provided to monitor normal operating conditions of the power subsystems and communication bus.Type: GrantFiled: October 20, 2000Date of Patent: May 11, 2004Assignee: International Business Machines CorporationInventors: David Butka, Brian Gerard Goodman, Leonard George Jesionowski, Michael Philip McIntosh, Robin Daniel Roberts, Raymond Yardy
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Patent number: 6426523Abstract: Using a mask opening a gate region, an undoped GaAs layer is selectively etched with respect to an undoped Al0.2Ga0.8As layer by dry etching with introducing a mixture gas of a chloride gas containing only chlorine and a fluoride gas containing only fluorine (e.g. BCl3+SF6 or so forth). By about 100% over-etching is performed for the undoped GaAs layer, etching (side etching) propagates in transverse direction of the undoped GaAs layer. With using the mask, a gate electrode of WSi is formed. Thus, a gap in a width of about 20 nm is formed by etching in the transverse direction on the drain side of the gate electrode. By this, a hetero junction FET having reduced fluctuation of characteristics of an FET, such as a threshold value, lower rising voltage and higher breakdown characteristics is obtained.Type: GrantFiled: October 27, 1997Date of Patent: July 30, 2002Assignee: NEC CorporationInventors: Keiko Yamaguchi, Naotaka Iwata
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Patent number: 6389669Abstract: An apparatus and method for extracting a doctor blade from paper making machines including a clamping and locking mechanism that tightens as more force is applied to the device in the extraction process. The apparatus may include a hollow steel handle or outer shaft, a locking linkage shaft slidably disposed within the steel outer shaft, and a rotatably mounted gripping mechanism coupled to the linkage. A trigger mechanism attached to the linkage shaft causes the gripping mechanism to rotate against the doctor blade, gripping the blade between contact surfaces. A safety locking ring may be provided for securing the linkage shaft in a closed position. As force is applied against the extractor, the gripping action is increased by the frictional action exerted by the gripping mechanism on the doctor blade.Type: GrantFiled: May 24, 2000Date of Patent: May 21, 2002Inventor: John Moscone
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Patent number: 6380998Abstract: A LCD device has a LCD panel and a drive TCP for driving the LCD panel. Back light is guided to the rear surface of the LCD panel by a light-conductive sheet. The leakage back light passed the rear surface of the light-conductive sheet is reflected by a reflecting plate having a conductive film at the rear surface of the reflecting plate. The conductive film is connected to a ground pattern of the printed circuit board which transfers signals to the drive TCP. The reflecting plate has both functions for reflecting back light and shielding the LCD panel against the noise generated by the printed circuit board.Type: GrantFiled: August 15, 2000Date of Patent: April 30, 2002Assignee: NEC CorporationInventor: Nobuhiro Arai
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Patent number: 6376920Abstract: A semiconductor chip has a first ground line for maintaining a stable ground potential for the internal circuit. The first ground line is connected to a second ground line disposed on a scribe region of the semiconductor chip via a bonding pad, which is connected to an external lead frame. I/O circuit has a third ground line directly connected to the second ground line without passing the bonding pad. The noise propagated from the third ground line to the first ground line is reduced by passing the noise through the bonding pad.Type: GrantFiled: September 27, 2000Date of Patent: April 23, 2002Assignee: NEC CorporationInventors: Kayoko Ikegami, Takuya Hirota
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Patent number: 6377127Abstract: In a phase locked loop circuit, a phase difference signal (an up signal and a down signal) is supplied from a phase comparator to a serial-to-parallel converting circuit, and an output of the serial-to-parallel converting circuit is supplied to an up-down counter having a count value is counted up or down in accordance with the phase difference detected by the phase comparator. A voltage controlled oscillator generates an oscillation signal having the frequency controlled in accordance with the count value of the up-down counter. Thus, since the phase difference signal is serial-to-parallel converted, the rate of the phase difference signal is lowered, so that the operation speed of the up-down counter can be relaxed. Therefore, the operation speed of the phase locked loop circuit can be elevated with elevating the operation speed of the up-down counter.Type: GrantFiled: November 13, 2000Date of Patent: April 23, 2002Assignee: NEC CorporationInventor: Muneo Fukaishi
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Patent number: 6371548Abstract: A vehicle interior trim panel and method of making is provided where the vehicle interior trim panel comprises a skin, a substrate, a foam located between the skin and the substrate, and a flat wire at least partially surrounded by and embedded in the foam.Type: GrantFiled: July 25, 2000Date of Patent: April 16, 2002Assignee: Textron Automotive Company Inc.Inventor: David Mark Misaras
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Patent number: 6372591Abstract: A fabrication method of a semiconductor device is provided, which makes it possible to form shallow extensions (e.g., 0.1 &mgr;m or less in depth) of source/drain regions of a MOSFET with a double drain structure. In the step (a), a gate electrode is formed over a main surface of a single-crystal Si substrate of a first conductivity type through a gate insulating film. In the step (b), a dopant of a second conductivity type is ion-implanted into the substrate at an acceleration energy of 1 keV or lower under a condition that the amount of point defects induced in this step (b) is minimized or decreased, thereby forming first and second doped regions of the second conductivity type. In the step (c), a pair of sidewalls spacers are formed.Type: GrantFiled: December 2, 1998Date of Patent: April 16, 2002Assignee: NEC CorporationInventors: Akira Mineji, Seiichi Shishiguchi, Shuichi Saito
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Patent number: 6372114Abstract: A method of forming a multi-layer structure over an insulating layer comprises the steps of: selectively depositing a barrier layer on a predetermined region of an insulating layer by use of a first deposition mask; selectively depositing a metal seed layer made of a metal which is different in substance from the barrier layer by use of a second deposition mask, so that the metal seed layer extends not only on an entire surface of the barrier layer but also a peripheral region positioned outside the predetermined region of the insulating layer; and forming a metal plating layer made of the metal of the metal seed layer, so that the metal plating layer is adhered on the metal seed layer whereby the metal plating layer is separated from the barrier layer and also from the insulating layer.Type: GrantFiled: April 8, 1999Date of Patent: April 16, 2002Assignee: NEC CorporationInventor: Nobukazu Ito
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Patent number: 6370486Abstract: The present invention relates to a combustion temperature sensor, and, more particularly, to a combustion temperature sensor that measures infrared energy emitted at several preselected wavelengths from a flame and/or a flame's hot gas at a turbine inlet location and applies the energy signals to a calculation model to yield temperature.Type: GrantFiled: January 15, 1999Date of Patent: April 9, 2002Assignee: En'Urga Inc.Inventor: Yudaya Raju Sivathanu
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Patent number: 6367214Abstract: A foundation element in the form of a rigid monolithic prefabricated frame which includes at least two opposite containing side walls and cross-members interconnecting the two side walls so as to form a casting through-cavity between these two walls. The frame is intended to be located on the ground with the interposition of adjustable support devices and is intended to receive a hardenable fluid binder material poured into its through-cavity and adapted to spread onto the ground between this and the side walls and to fill the cavity, encapsulating the cross-members and the iron rods or other connecting members for connecting a superstructure element. Also provided are prefabricated structures including prefabricated tunnels, with foundation elements formed by means of the prefabricated frames.Type: GrantFiled: January 19, 1999Date of Patent: April 9, 2002Inventor: Mosè Monachino
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Patent number: 6366392Abstract: A photonic crystal comprises a plurality of elongated elements formed of a first dielectric material and arranged in a two-dimensional periodic honeycomb lattice. A second dielectric material surrounds the elongated elements and extending between them. The a second dielectric material defines between the elongated elements a plurality of spaces filled with a third dielectric material. The first dielectric material has permittivity that is greater than permittivity of the second dielectric material and permittivity of the third dielectric material.Type: GrantFiled: June 9, 2000Date of Patent: April 2, 2002Assignee: NEC CorporationInventor: Masatoshi Tokushima
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Patent number: 6363581Abstract: A hose clamp is provided for establishing a reliable, fluid-tight, seal between a hose and a receptacle therefore or to another length of hose. The clamp includes a plurality of clamp segments and a span ring, e.g., a spiral wound ring. Each clamp segment includes an arcuate interior surface having a span ring slot therein which is positioned to align with a corresponding span ring slot in an adjacent clamp segment. The span ring has a portion disposed in each span ring slot with the interior surface the span ring approximately flush with the interior surfaces of the segments. Each clamp segment further includes a bore on a first end thereof which is adapted to align with a corresponding bore on an end of an adjacent segment. A fastener, e.g., a screw, may be inserted into the bores to draw the ends of the clamp segments toward each other, thereby tightening the segments of the clamp around the hose and receptacle.Type: GrantFiled: April 10, 2000Date of Patent: April 2, 2002Assignee: JGB Enterprises, Inc.Inventor: Guy Anthony Zipp
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Patent number: 6366063Abstract: When a first switch is closed, a power-supply voltage V is applied to a serial resonance circuit that is made up of a coil and a capacitive load. When the voltage Vc of the capacitive load exceeds the power-supply voltage V, a diode conducts a current, and thereby the voltage Vc of the capacitive load is clamped at the power-supply voltage V, and resonance stops. As a result, a flywheel current flows through a closed loop that is made up of a coil, a first diode, and a first switch in a closed state, in this order. When the first switch is opened, the flywheel current has the loop shut off, and, therefore, the voltage of the serial resonance circuit falls rapidly in order to sustain or maintain the current, and falls below the earth potential so as to allow a second diode to conduct the current.Type: GrantFiled: March 21, 2001Date of Patent: April 2, 2002Assignee: NEC CorporationInventor: Yoshizumi Sekii
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Patent number: 6361854Abstract: A process for manufacturing a metallized substrate using the island coating method, includes depositing a coating layer containing a radiation curable non-volatile film former. The coated part is then vacuum metallized to form the metal islands of the present invention. A layer of clear resinous protective dielectric topcoat containing a radiation curable non-volatile film former is then deposited to completely cover the layer of metal islands while maintaining the aesthetic properties of the metallizing island coating system at a reduced cost and with minimal variability among parts.Type: GrantFiled: January 19, 2001Date of Patent: March 26, 2002Assignee: Textron Automotive CompanyInventors: Maureen M. Lein, Ellen Lord, Richard C. Eisfeller, Mark E. Dukeshire, Richard W. Finch, Alfred T. Poliquin, Gerard L. Vachon, John B. Clark, Stephen P. McLaughlin, Robert D. Sparling
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Patent number: 6361903Abstract: In a method for predicting a width of a photo-resist pattern, a first optical intensity at mask edges and a second optical intensity at a center of the photo-resist pattern are determined on the basis of a spatial image of a mask pattern to be transferred under reference conditions, and the distance between the mask edges at the first optical intensity and a third intensity at the center of the photo-resist pattern are determined on the basis of a spatial image of the mask pattern to be transferred under actual conditions, wherein the width of the photo-resist pattern is accurately predicted as the product between the distance and the ratio between the second optical intensity and the third optical intensity.Type: GrantFiled: April 14, 2000Date of Patent: March 26, 2002Assignee: NEC CorporationInventor: Masashi Fujimoto
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Patent number: 6359234Abstract: A package substrate in which a semiconductor chip is placed is disclosed. A through hole land (opposed conductor) connected to a signal wiring is opposite to a fixed electrical potential conductor through an insulator layer. The through hole land is disposed in a wiring layer on the outermost side of wiring layers of the package substrate. The through hole land connected to the signal wiring for input/output of signals at a higher frequency has a larger size. The through hole lands connected to the signal wiring for input/output of signals at a certain frequency and the through hole lands connected to the signal wiring for input/output of signals at a lower frequency than the certain frequency are alternately arranged. The through hole land, the insulator layer and the fixed electrical potential conductor form a capacitor and serve as a stub, thereby reducing impedance of the signal wiring connected thereto.Type: GrantFiled: June 23, 2000Date of Patent: March 19, 2002Assignee: NEC CorporationInventor: Tsunenobu Kouda
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Patent number: D454959Type: GrantFiled: June 8, 2001Date of Patent: March 26, 2002Assignee: Brookstone Company, Inc.Inventors: David Harris, Steven Schwartz, Rudy Woodard
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Patent number: D456544Type: GrantFiled: June 8, 2001Date of Patent: April 30, 2002Assignee: Brookstone Company, Inc.Inventors: David Harris, Rudy Woodard