Abstract: A circuit for speeding up the pre-programming of floating gate storage transistors such as FLASH EPROMS, and particularly speeding up the pre-programming of a block or array of floating gate storage transistors includes a controllable voltage source that supplies gate programming potential across the control gate and source of the FLASH EPROM transistor cells to be programmed. A control circuit is provided that controls the voltage source to vary the gate programming potential during a programming interval as a function of time in order to decrease the time required for a given amount of charge movement to program the selected floating gate transistors. The wordline voltages are varied, while the source voltage is held constant. By starting at a lower wordline voltage, and increasing during the programming interval to a high wordline voltage, the programming speed is increased, and the high final turn-on threshold voltage for the programmed floating gate storage transistors is achieved.

Abstract: A stacked ROM device utilizes the same conductivity type for the ROM cells in both the top and the bottom ROM cell matrixes. The stacked ROM device comprises a first ROM cell matrix which comprises conductively doped source and drain lines having a first conductivity type in a semiconductor substrate having a second conductivity type. For example, the source and drain lines are implemented with n-type doping in a p-type substrate. A second ROM cell matrix comprises conductively doped source and drain lines having the first conductivity type in a semiconductor layer which overlies and is isolated from the semiconductor substrate. A plurality of shared wordlines is disposed between the first and second ROM cell matrixes. A plurality of bit lines is isolated from and overlies the semiconductor layer.

Abstract: A method for soft programming memory cells and floating gate memory device. During soft programming, a gate voltage is supplied to the control gate, a drain voltage it supplied to the drain, a well voltage is supplied to the well, and an active current limiter is coupled to the source. A circuit for soft programming supplies a gate voltage to the control gate, couples a constant current source to the drain, supplies a well voltage to the well, and supplies a source voltage to the source. The gate voltage may be approximately 2 V, the drain voltage may be approximately 4 V, and the well voltage may be approximately -2 V. According to another embodiment of the invention, the gate voltage is approximately 2 V lower than the drain voltage, and the well voltage is approximately 4 V lower than the gate voltage.