Abstract: A memory device is described that comprises a plurality of bit lines and an array of vertical transistors arranged on the plurality of bit lines. A plurality of word lines is formed along rows of vertical transistors in the array which comprise thin film sidewalls of word line material and arranged so that the thin film sidewalls merge in the row direction, and do not merge in the column direction, to form word lines. The word lines provide “surrounding gate” structures for embodiments in which the vertical transistors are field effect transistors. Memory elements are formed in electrical communication with the vertical transistors. A fully self-aligned process is provided in which the word lines and memory elements are aligned with the vertical transistors without additional patterning steps.

Abstract: The technology disclosed relates to variable tapers to resolve varying overlaps between adjacent strips that are lithographically printed. Technology disclosed combines an aperture taper function with the variable overlap taper function to transform data and compensate for varying overlaps. The variable taper function varies according to overlap variation, including variation resulting from workpiece distortions, rotor arm position, or which rotor arm printed the last stripe. Particular aspects of the present invention are described in the claims, specification and drawings.

Abstract: Some aspects of the technology relate to the generation for test purposes of test packet ingredients by a microprocessor, ongoing with the generation for test purposes of test packets incorporating the test packet ingredients by a high-speed FPGA. Some aspects of the technology relate to the generation of outgoing test packets incorporating the test packet ingredients, at a programmable logic device such as an FPGA. These aspects are implemented as an apparatus, a method, computer readable medium, and a data structure.

Abstract: The present invention provides charger protection circuitry for a rechargeable battery, and a method of protecting a charger cable during charging of a rechargeable battery. A switch controller is used to turn a switch element on and off in dependence on a direction of current flow through the charger protection circuitry during charging and otherwise. If current is flowing in the first direction the switch controller turns on the switch element such that the auxiliary current tripping element is bypassed, whereby the main current tripping element controls interruption of current flow. If instead current is flowing in a second direction opposite to the first direction, the switch controller turns off the switch element, whereby the auxiliary current tripping element is connected into the current flow path to control interruption of current flow.

Abstract: A method for digital circuit design. The first step of the process is the step of providing a circuit design in the form of a hardware definition language. Then, the process produces a binary simulation of the design by setting out for each unit of time during execution of the hardware design the a control state and a program state of the design and assigns a symbol to each signal of the design. The process proceeds by executing a symbolic simulation of the design, concluding with identifying and capturing the combinational logic expression of the simulation output and the next state functions of the simulation.

Abstract: A thermostat-controlled heater/cooler is used to condition air in a temperature-controlled region. A target temperature is obtained and compared to the temperature of the region to determine if heating/cooling is required. If yes, then outside air is directed into the region without operating heater/cooler and updated temperatures of the region are measured. The directing and measuring are continued until (1) the measured temperature equals the target temperature, at which time control returns to the obtaining a target temperature step, or (2) the updated measured temperature differs from the target temperature by a chosen amount, and in some examples, if the updated temperature does not reach the target temperature within a chosen length of time, or the target temperature changes, or the program segment ends, at which time directing outside air into the temperature-controlled region is stopped and the heater/cooler is operated under control of the thermostat.

Abstract: The present invention relates to devices and methods that coordinate an external conversation process between entities with an internal workflow of one of the entities. More particularly, it relates to devices and methods that are compliant with an inter-enterprise conversation process standard for routing electronic commerce documents between enterprises. Particular aspects of the present invention are described in the claims, specification and drawings.

Abstract: A method and apparatus for compressing signal samples uses block floating point representations where the number of bits per mantissa is determined by the maximum magnitude sample in the group. The compressor defines groups of signal samples having a fixed number of samples per group. The maximum magnitude sample in the group determines an exponent value corresponding to the number of bits for representing the maximum sample value. The exponent values are encoded to form exponent tokens. Exponent differences between consecutive exponent values may be encoded individually or jointly. The samples in the group are mapped to corresponding mantissas, each mantissa having a number of bits based on the exponent value. Removing LSBs depending on the exponent value produces mantissas having fewer bits. Feedback control monitors the compressed bit rate and/or a quality metric. This abstract does not limit the scope of the invention as described in the claims.

Abstract: An aspect of the present invention includes a protocol for conveying data during an e-commerce session with a polymorphic response, comprising initiating a session with a message from a buyer application to a broker application and a session identifier assigned by the broker application; conducting the session between the buyer application and a supplier application; and concluding the session with a additional message which includes a schema identifier for the additional message, resolvable in a context of a system identifier; and a polymorphic response comprising a type and a version, wherein the polymorphic response includes additional data elements corresponding to values assigned to the type and version.

Abstract: Memory devices and methods for manufacturing are described herein. A memory device as described herein includes a first electrode layer, a second electrode layer, and a thermal isolation structure including a layer of thermal isolation material between the first and second electrode layers. The first and second electrode layers and the thermal isolation structure define a multi-layer stack having a sidewall. A sidewall conductor layer including a sidewall conductor material is on the sidewall of the multi-layer stack. The sidewall conductor material has an electrical conductivity greater than that of the thermal isolation material. A memory element including memory material is on and in contact with the second electrode layer.

Abstract: An integrated circuit described herein includes a substrate and a plurality of lines overlying the substrate. The lines define a plurality of first trenches and a plurality of second trenches. The plurality of first trenches extend into the substrate a distance different than that of the plurality of second trenches. Adjacent pairs of lines are separated by a first trench in the plurality of first trenches, and each pair of lines comprises a first line and a second line defining a corresponding second trench in the plurality of second trenches.

Abstract: A diode memory device has an intermediate structure between the two terminals, such as a p terminal and the n terminal.

Abstract: We disclose a concierge device that can be configured to register, control and support a consumer device. It can alternatively or redundantly connect to a home management bridge and/or cloud-based management servers. It can accept menus that allow a single concierge device to provide a wide range of functions for various consumer devices. The concierge device allows the user in a single action to initiate a support session, automatically identifying the consumer device. The concierge device can be configured for voice or video support calls. The concierge device in conjunction with a home management bridge or gateway can manage on boarding of components of an automated home, such as switches and lamps. Implementations of the concierge device that include a display can show supplemental information, such as advertising, optionally in coordination with media being played on a consumer device coupled in communication with the concierge device.

Abstract: A memory cell is arranged to enhance the electrical field of the memory element. The memory cell has a metal-oxide memory element, a nonconductive element, and a conductive element. The metal-oxide memory element is in a current path between a first electrode at a first voltage and a second electrode at a second voltage. The nonconductive element is adjacent to the metal-oxide memory element.

Abstract: A method handling payment transactions in a system using mobile communication devices as stored value devices is disclosed. A transaction operations server receives multiple records of the transaction from the stored value device—one via a communication channel through the telecommunication provider network, and another via an independent communication channel. The records are reconciled at the transaction server for transaction verification.

Abstract: A design optimization method for a target circuit design specified by a machine-readable file, comprises providing a computer-implemented model as a function of a set of characteristics of circuit designs of circuit optimization achievable due to a circuit modification procedure, such as timing constrained gate length modification for leakage power reduction. Using values of said set of characteristics for the target circuit design, the computer-implemented model is applied to the target circuit design to produce an indication of susceptibility of the target circuit design to optimization. The model can be produced using Monte Carlo simulations of a set of virtual designs, and fitting a function of said characteristics to the results.

Abstract: Memory cells comprising: a semiconductor substrate having a source region and a drain region disposed below a surface of the substrate and separated by a channel region; a tunnel dielectric structure disposed above the channel region, the tunnel dielectric structure comprising at least one layer having a hole-tunneling barrier height; a charge storage layer disposed above the tunnel dielectric structure; an insulating layer disposed above the charge storage layer; and a gate electrode disposed above the insulating layer are described along with arrays and methods of operation.

Abstract: Roughly described, an antenna diode is formed at least partially within the exclusion zone around a TSV, and is connected to the TSV by way of a metal 1 layer conductor at the same time that the TSV is connected to either the gate poly or a diffusion region of one or more transistors placed outside the exclusion zone.

Abstract: Over-erasure induced noise on a data line in a nonvolatile memory that couples into an adjacent data line is mitigated by using twisted data lines and differential sensing amplifiers. Noise coupled into data lines is compensated by similar noise coupled into reference data lines and cancelled in the differential sensing amplifiers.

Abstract: Methods, apparatuses, data structures, and computer readable media are disclosed that represent network devices with encapsulated protocol stacks communicating via a common physical port. The encapsulated protocol stacks include variable combinations of a multiple encapsulation protocols.