Abstract: There is provided a planar inductive battery charging system designed to enable electronic devices to be recharged. The system includes a planar charging module having a charging surface on which a device to be recharged is placed. Within the charging module and parallel to the charging surface is at least one and preferably an array of primary windings that couple energy inductively to a secondary winding formed in the device to be recharged. The invention also provides secondary modules that allow the system to be used with conventional electronic devices not formed with secondary windings.

Abstract: A complementary wideband antenna includes a planar dipole formed of two dipole sections and a shorted patch antenna located between the dipole sections, the dipole sections being spaced above a ground plane. A variety of different feed probe designs can be used to excite the antenna. The complementary wideband antenna has electrical characteristics including low back radiation, low cross polarization, a symmetrical radiation pattern, and is stable in gain and radiation pattern shape over the frequency bandwidth.

Abstract: Optimal operating techniques are disclosed for using coreless printed-circuit-board (PCB) transformers under (1) minimum input power conditions and (2) maximum energy efficiency conditions. The coreless PCB transformers should be operated at or near the ‘maximum impedance frequency’ (MIF) in order to reduce input power requirement. For maximum energy efficiency, the transformers should be at or near the “maximum efficiency frequency” (MEF) which is below the MIF. The operating principle has been confirmed by measurement and simulation. The proposed operating techniques can be applied to coreless PCB transformers in many circuits that have to meet stringent height requirements, for example to isolate the gates of power MOSFET and IGBT devices from the input power supply.

Abstract: The portion of a source block storage resource to be replicated, and the corresponding portion of the block storage resource being written to, are each divided into a predefined number of equal-sized spans. A digest calculation is then generated for each span in a corresponding pair and compared. If the digests do not match, those spans are divided into still smaller spans, and digests are calculated and compare iteratively, to identify smaller areas of discrepancies and reduce the number of blocks that are actually written.

Abstract: A clock control method and apparatus are provided employing a clock control circuit which generates an array clock for a memory array from a system clock and a reset control signal. The reset control signal is one of a plurality of input control signals to the clock control circuit. When the system clock is below a predefined frequency threshold, the reset control signal is an array tracking reset signal, wherein the active pulse width of the array clock is system clock frequency independent, and when the system clock is above the predefined frequency threshold, the reset control signal is a mid-cycle reset signal, meaning that the active pulse width of the array clock is system clock frequency dependent. A bypass signal is provided as a third input control signal, which when active causes the clock control circuit to output an array clock which mirrors the system clock.

Abstract: In object oriented-computer systems, objects execute in different, heterogeneous execution environments. During runtime, an object is identified that should desirable execute in another, heterogeneous execution environment. Usage of the object in the current execution environment is terminated, and the object is instantiated in the other, heterogeneous execution environment. During the movement, the state of the object is preserved despite differences in state variable formatting between the execution environments.