Abstract: A method of forming small dimension wires by an isotropic removal process. The method provides a substrate with an insulation layer. A first conductive layer and a second conductive layer are formed on the insulation layer. A wire pattern is formed on a photoresist layer after the coating process and the sequential exposure and development process. Part of the second conductive layer is removed by using the wire pattern on the photoresist layer as a mask, and thus part of the second conductive layer with wires is remained. Isotropic etching the peripheral part of the second conductive layer and thus the part of wire pattern with a smaller dimension is remained. Using the wire pattern with a smaller dimension as a mask to anisotropic etch the first conductive layer until the surface of the insulation layer is exposed, and thus the process of fabricating small dimension is finished.

Abstract: A method of manufacturing buried contact window in SRAM includes implanting oxygen ions into a substrate inside a buried contact window region adjacent to the location for forming a source/drain region, and then carrying out oxidative reaction in the implanted region to form an silicon oxide layer using the heat generated by a subsequent polysilicon deposition process or a laser beam. The silicon oxide layer protects the substrate by acting as a buffer, thus preventing the substrate from being over-etched to form a deep trench. Consequently, contact resistance between the buried contact window and the source/drain region is lowered, and leakage current at the junction is prevented.

Abstract: A method and system for monitoring a conversation between a pair of speakers for detecting an emotion of at least one of the speakers is provided. First, a voice signal is received after which a particular feature is extracted from the voice signal. Next, an emotion associated with the voice signal is determined based on the extracted feature. The emotion is screened and feedback is provided only if the emotion is determined to be a negative emotion selected from the group of negative emotions consisting of anger, sadness, and fear. Such determined negative emotion is then outputted to a third party during the conversation.

Abstract: A method of fabricating a DRAM capacitor. A silicon germanium layer is formed on a lower electrode of the capacitor. The silicon germanium layer is oxidized to form a segregated grained germanium layer and a silicon oxide layer where the segregated grained germanium is distributed on the lower electrode. The silicon oxide layer is then removed. Using the segregated grained germanium as a hard mask, the lower electrode is etched to a depth to form a multi-cylinder structure. The segregated grained germanium is then removed. A capacitor dielectric layer and an upper electrode are successively formed on the multi-cylinder structure.

Abstract: A method of fabricating a dual gate. A first conductive type region and a second conductive type region isolated by an isolation structure is provided. A polysilicon layer is formed on the first and the second conductive type regions. A diffusion layer containing second type conductive ions is formed on a second part of the polysilicon layer which covers the second conductive type region. First conductive ions are implanted into a part of the first conductive region which covers the first conductive type region. A first thermal process is performed. A metal layer is formed, and a second thermal process is performed, so that the metal layer is transformed into a metal silicide layer. A dielectric layer is formed on the metal layer. The dielectric layer, the metal silicide layer, diffusion layer, and the polysilicon layer are patterned to form a dual gate.

Abstract: A method of fabricating shallow trench isolation (STI) forms a trench in a substrate and a liner oxide layer in the trench. A first high density plasma chemical vapor deposition (HDPCVD) is performed to form a conformal oxide layer on the liner oxide layer, without applying bias to the substrate. A second HDPCVD is then performed to form an oxide layer that fills the trench and covers the conformal oxide layer on the conformal oxide layer.

Abstract: According to a broad aspect of a preferred embodiment of the invention, telephone calls, data and other multimedia information is routed through a hybrid network which includes transfer of information across the internet utilizing telephony routing information and internet protocol address information. The hybrid network includes a Proactive Threshold Manager which forewarns service providers of an impending breach of contract. The Proactive Threshold Manager sends an alarm to the service provider when the current level of service will miss a service level agreement to maintain a certain level of service.

Abstract: A method of forming mixed mode devices is provided. A field oxide layer is formed on the substrate to isolate active regions from each other. A gate oxide layer is formed on the substrate, positioned over the active regions. A first conductive layer, a silicide layer and a second conductive layer are formed on the field oxide layer and on the gate oxide layer. The second conductive layer is converted to an oxide layer as a dielectric layer of a capacitor by thermal oxidation. A third conductive layer is formed and defined on the dielectric layer to form an upper electrode of the capacitor. A anisotropic etching step is performed to remove a part of the dielectric layer, a part of the silicide layer and a part of the first conductive layer to complete the capacitor and to form a gate of a transistor.

Abstract: A method of manufacturing a buried contact in an SRAM includes retaining a portion of the gate oxide layer adjacent to the source/drain region when a buried contact opening is formed. The retained gate oxide layer protects the substrate by acting as a buffer region, thus preventing the over-etching of substrate, which would form a deep trench. Consequently, contact resistance between the buried contact and the source/drain region is lowered, and leakage current at the junction is prevented.

Abstract: A method of fabricating DRAM and embedded DRAM. A contact pad is formed in the periphery/logic circuitry region simultaneously with the formation of the bit line in the memory region. A metal-insulator-metal (MIM) capacitor structure is formed in the memory region by damascene, and a contact and a contact pad are formed in the periphery/logic circuitry region. The formation of the contact in the periphery/logic circuitry is formed step by step to lower the difficulty to fabricate the deep contact. The capacitor electrodes are made by metal layers, which can increase the capacitance of the capacitor.

Abstract: A method for fabricating a semiconductor device. A substrate having a gate is provided. An ion implantation process is performed to form lightly doped source/drain region in the substrate. A liner layer and an insulation layer are formed over a substrate in sequence. A portion of the insulation layer is removed by an anisotropic etching process. The insulation layer remaining on sidewalls of the gate is used as a spacer. A top of the spacer is substantially level with an upper surface of the liner layer. An ion implantation process is performed to form heavily doped source/drain region in the substrate. A portion of the spacer is removed by wet etching. As a result, a top surface of the spacer is lower than the upper surface of the gate. The method can increase the exposed surface of the gate and maintain sufficient width of the lightly doped source/drain region to prevent the hot carrier effect and the short channel effect.

Abstract: A method of fabricating a load resistor. The load resistor is often applied in a static random access memory. The interconnect between different conductive regions such as gate and source/drain region is formed by applying a hydrogen treatment to a refractory metal oxide layer, while the load resistors are formed by applying a hydrogen treatment with different parameters as the former one. The insulation is formed by the refractory metal oxide layer which is not to be covered.

Abstract: A method for testing a web site includes formulating a test configuration file including a series of test inquiries for a web site to be tested, initiating a HTTP communication to form a connection with the web site, and repetitively communicating with the web site to test for a variety of errors. The repetitive communication preferably includes receiving HTML from the web site, analyzing the HTML for errors and storing results in the database, and formulating a new HTTP communication based upon the received HTML and the test configuration file. Preferably, the test configuration file is created by sending HTML comprising a blank testing form to a web browser, receiving HTTP from the web browser as a submission from the HTML testing form, and developing the test configuration file from the HTTP.

Abstract: The present invention teaches a variety of high VSWR mismatch output stages and methods for protecting output stages during high VSWR operation. To accomplish these goals, the present invention teaches absorbing reverse base current arising at the base of the power transistor of the output stage. In one embodiment, a variable impedance device such as a transistor is coupled to the base of the power transistor such that when the base-emitter voltage exceeds a predefined voltage, the variable impedance device goes into a low impedance mode and absorbs a portion of the base current. In another embodiment, feedback control circuitry is incorporated into the output stage bias circuitry in order to control the total base current.

Abstract: A method for forming a shallow trench isolation (STI) structure adds an etching back process to a conventional method which only uses a chemical mechanical process (CMP) process to accomplish the STI structure. In the method of the invention, the CMP process preliminarily planarizes a substrate to remove an insulation layer above the trench and uses the etching back process to accomplish the STI structure.

Abstract: A ticket dispensing apparatus is provided including a framework having a driver roller rotatably coupled to the framework to dispense tickets therefrom. Also included is a sensor for monitoring the dispensing of the tickets. A motor is coupled to the drive roller and in communication with the sensor to rotate the drive roller and thereby advance the tickets. Further coupled to the framework is a support for supporting the tickets. For maintaining the tickets in operational relationship with the sensor and the drive roller, at least one guide is coupled to the support. In use, the guide is adjustable to accommodate tickets of varying widths. Also, the guide is substantially rigid in order to avoid bending the tickets.

Abstract: A bioreactor system of probing toxic materials using microorganisms comprises two reactors. A first-step reactor serves as a microorganism reservoir in which the microorganisms are continuously cultured in a constant phase and a second-step reactor, provided with fiber optics, offers a place in which the microorganisms meet the toxic materials for the first time. Since the microorganisms are so genetically recombinant as to luminesce upon reaction with toxic materials, light is generated in the second-step reactor and, then, transmitted along the fiber optics to a luminometer where the change in the intensity of the light is monitored over time. The microorganisms can be stably provided from the reservoir, so that it is possible to continuously monitor the light intensity and thus, to trace the pollution of the toxic materials. The toxic materials may come from any of the sources including rivers, waste water, sewage, agricultural and industrial water, household water, tap water, atomic power plants, etc.

Abstract: A method of manufacturing a borderless contact hole. A substrate having a pad oxide layer and a silicon nitride layer formed thereon is provided. A trench is formed to penetrate through the silicon nitride layer and the pad oxide layer and into the substrate. A first oxide layer is formed in the trench, wherein a surface level of the first oxide layer is lower than that of the substrate. An etching stop layer is formed on the silicon nitride layer, a sidewall of the trench and the first oxide layer, conformally. A second oxide layer is formed on the etching stop layer and fills the trench. A portion of the second oxide layer, a portion of the etching stop layer, the silicon nitride layer and the pad oxide layer are removed. A portion of the second oxide layer in the trench and a portion of the etching stop layer in the trench are removed to form a recess until the surface level constructed by the remaining second oxide layer and the remaining etching stop layer is lower than a surface level of the substrate.

Abstract: A method for fabricating an embedded DRAM. A substrate having a memory circuit region and a logic circuit region is provided. A first gate, a first source/drain region and a second source/drain region are formed in the memory circuit region. A second gate and a third source/drain region are formed in the logic circuit region. A first dielectric layer is formed over the substrate. In the first dielectric layer, a first contact hole is formed to expose the first source/drain region and a second contact hole is formed to expose the second gate and the third source/drain region. A bit line is formed to electrically couple with the first source/drain region through the first contact hole. A local interconnect is formed to electrically couple with the second gate and the third source/drain region through the second contact hole. A second dielectric layer is formed over the substrate.

Abstract: A method of manufacturing a dual cylinder-shaped capacitor. The method includes the steps of forming a cylindrical oxide layer above a conductive layer, and then forming silicon nitride spacers and first oxide spacers on the sidewalls of the cylindrical oxide layer. Next, using the silicon nitride spacers, the first oxide spacers and the cylindrical oxide layer as a hard mask, the conductive layer is etched to form a separate lower electrode. Thereafter, the oxide layer is removed so that only the silicon nitride spacers remain. Subsequently, second oxide spacers and third oxide spacers are formed on the sidewalls of the silicon nitride spacers. Finally, the silicon nitride spacers are removed, and then the conductive layer is again etched to form the dual cylinder-shaped lower electrode.