Abstract: The quality of solvents used in semiconductor manufacturing for removing photoresist or post halogen etch cleanup is monitored by measuring the conductivity of the solvents.
Abstract: An apparatus is provided for use with a solderability testing machine to releasably engage a sample for immersion into a solder bath. The apparatus contains a pair of spring-loaded plates which serve to hold the sample so that only the desired portion of the sample may be dipped in the solder. The apparatus also carries a threaded, depth-controlling member which may be threadedly adjusted to precisely control the depth of immersion of the sample held by the holder into the sample bath.
Abstract: An apparatus and method for loading integrated circuit packages into package carriers is disclosed. Featured is a pick-and-place mechanism mounted on a tiltable table. Packages and carriers slide toward the pick-and-place mechanism under the influence of gravity. The pick-and-place mechanism combines the packages with carriers. The package/carrier combinations then slide away from the pick-and-place mechanism.
Type:
Grant
Filed:
November 7, 1990
Date of Patent:
September 15, 1992
Assignee:
AT&T Bell Laboratories
Inventors:
Jonathan D. Knepper, Gerald J. Masavage, Phillip A. Solomon
Abstract: An integrated circuit design and method for its fabrication are disclosed. A bilevel-dielectric is formed to cover the active regions of a transistor and raised topographic features such as a gate runner. The upper level of the dielectric is planarized to provide for easier subsequent multilevel-conductor processing. Windows are opened in the bilayer dielectric by etching through the upper level of the dielectric, stopping on the lower level of the dielectric. Then the etch procedure is continued to etch through the lower level of the dielectric.
Type:
Grant
Filed:
June 27, 1990
Date of Patent:
June 11, 1991
Assignee:
AT&T Bell Laboratories
Inventors:
David P. Favreau, Jane A. Swiderski, Daniel J. Vitkavage