Patents Represented by Attorney, Agent or Law Firm J. Warren Whitesel
  • Patent number: 6322307
    Abstract: A threaded fastener (1) is disclosed for anchoring into a substrate comprising a core portion (2) having at least one helical continuous thread provided along a substantial portion of the length of the core, in which the helical thread has a substantially V-shaped cross section defining two flanks (4a, 4b) which subtend an angle of between substantially 60° and 90°, and the thread has a helix angle of between approximately 20° and 45°. The crest of the thread may be flattened, and the fastener (1) is especially suited to anchoring to a masonry substrate.
    Type: Grant
    Filed: April 3, 2000
    Date of Patent: November 27, 2001
    Assignee: Unifix Limited
    Inventor: Frank Glover
  • Patent number: 6322909
    Abstract: An organic electroluminescent device comprising a pair of a cathode and an anode and therebetween, at least one organic thin-film layer containing an emitter layer, wherein said at least one organic thin-film layer contains a squarylium compound represented by the following formula (1) or (2): wherein R1 to R5 each independently represents a hydrogen atom, a hydroxyl group, a substituted or unsubstituted alkyl group having 1 to 5 carbon atoms, a nitro group, a cyano group, a substituted or unsubstituted alkoxy group having 1 to 5 carbon atoms, aryl group or a halogen atom.
    Type: Grant
    Filed: June 21, 1999
    Date of Patent: November 27, 2001
    Assignee: NEC Corporation
    Inventor: Yoshikazu Sakaguchi
  • Patent number: 6322422
    Abstract: A polishing system has a polishing pad, a wafer retainer for pressing an insulating layer formed on a semiconductor wafer against polishing slurry spread over a polishing pad and a measuring apparatus for measuring the thickness of different portions of the insulating layer, and the measuring apparatus has measuring electrodes embedded in the polishing pad, a first calibration electrode also embedded in the polishing pad and a second calibration electrode embedded into the lower surface of the wafer retainer, wherein the first calibration electrode and the measuring electrodes are opposed to the second calibration electrode and an electrode formed in a dicing area of the semiconductor wafer during the polishing so that the measuring apparatus determines the thickness at the different portions on the basis of a first capacitance between the first calibration electrode and the second calibration electrode and a second capacitance between the measuring electrodes and the electrode in the dicing area.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: November 27, 2001
    Assignee: NEC Corporation
    Inventor: Yuuichi Satou
  • Patent number: 6315621
    Abstract: A contact element (51) is made of an elastic metal plate and comprises a fixing portion (53) to be fixed to an insulator (230), an elastic arm portion (55) connected to the fixing portion (53), and a contacting elastic portion (57) connected to the elastic arm portion (55). The contacting elastic portion (57) has contact points (91, 93) to be brought into contact with a mating contact surface (501) of a mating contact element. The elastic arm portion (55) and the contacting elastic portion (57) have a plurality of elastic finger portions (101, 103) displaceable independently of each other. The elastic finger portions (101, 103) have different size in a width direction of the elastic metal plate.
    Type: Grant
    Filed: February 17, 2000
    Date of Patent: November 13, 2001
    Assignee: Japan Aviation Electronics Industry, Limited
    Inventors: Akira Natori, Junichi Sato
  • Patent number: 6315826
    Abstract: Disclosed are a structure of a semiconductor substrate and a method of manufacturing the semiconductor substrate preventing a reduction of gettering capability due to a high-temperature heat treatment. In a semiconductor substrate containing a highly concentrated impurity having a polysilicon layer to be a gettering site on a rear surface side and an epitaxial layer 6 on a front surface side, an impurity concentration is lower near the rear and front surfaces and higher at the center in a cross section of the semiconductor substrate. The method of manufacturing the semiconductor substrate comprises the steps of: performing the heat treatment of a silicon substrate at a temperature of 1100° C. or more and a melting temperature or less of the silicon substrate before forming the polysilicon layer 4 and the epitaxial layer 6; forming the polysilicon layer 4 on the rear surface side of the silicon substrate; and forming the epitaxial layer 6 on the front surface side of the silicon substrate.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: November 13, 2001
    Assignee: NEC Corporation
    Inventor: Satoru Muramatsu
  • Patent number: 6315616
    Abstract: Plug and socket connectors, which are connected to each other along a first direction, constitute a high speed transmission connector, as for a notebook computer, for example. The connectors interconnect a printed circuit board (PCB) and a flexible printed circuit (FPC). The FPC fitting portion is a socket at the end of an insulator which is to be connected to the FPC. The PCB fitting portion comprises a plug connector which is to be connected to the socket connector and to a PCB connecting portion. The plug connector fitting portion has first and second socket contacts which come into contact with the plug side signal contact and the plug side ground contact, respectively, and enclose the socket connector fitting portion along a direction perpendicular to the first direction opposing each other along a direction perpendicular on the first direction.
    Type: Grant
    Filed: January 29, 1999
    Date of Patent: November 13, 2001
    Assignee: Japan Aviation Electronics Industries, Limited
    Inventor: Koji Hayashi
  • Patent number: 6312263
    Abstract: In a connector having a plurality of conductive contacts assembled to an insulator, each of the contacts has unique structure for electrically connecting a first and a second board to each other. The first board has a primary surface and a secondary surface opposed to each other. The second board has a principal surface facing the secondary surface with a space left therebetween. In the unique structure, a base portion is placed in the space and held by the insulator. A first elastic portion extends from the base portion to face a primary surface. A first contact portion is protruded from the first elastic portion to come in contact with one of electrode patterns arranged on the primary surface. A second elastic portion extends from the base portion. A second contact portion is protruded from the second elastic portion to come in contact with one of electrode patterns arranged on the principal surface.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: November 6, 2001
    Assignee: Japan Aviation Electronics Industries, Ltd.
    Inventors: Masao Higuchi, Masakazu Matsuda, Yoshiaki Ishiyama, Kazuaki Ibaraki, Hiroki Abe
  • Patent number: 6310589
    Abstract: A pulse generator 1 creates a pulse in synchronization with a driving pulse 26. A charging circuit 2 charges EL elements 20 only for a period which is determined by an output from the pulse generator 1. The charging time is determined by resistance of a switching element 3 in its on condition and a junction capacity of the EL elements 20.
    Type: Grant
    Filed: May 27, 1998
    Date of Patent: October 30, 2001
    Assignee: NEC Corporation
    Inventors: Eitaro Nishigaki, Shingo Kawashima
  • Patent number: 6304032
    Abstract: A PDP (Plasma Display Panel) with high luminance and long service life is disclosed. Two substrates are positioned face to face and located at the scanning side and data side, respectively. A reflection layer for reflecting vacuum ultraviolet rays is formed on the surface of one substrate facing the other substrate located on the data side. The reflection layer has a laminate structure made up of alternating layers of two substances each having a particular refractive index. The reflection layer reflects ultraviolet rays reached the substrate on the scanning side toward the other substrate. As a result, the amount of ultraviolet rays to be incident to a phosphor and therefore the luminance of the PDP increases.
    Type: Grant
    Filed: June 23, 1999
    Date of Patent: October 16, 2001
    Assignee: NEC Corporation
    Inventor: Toshiaki Asano
  • Patent number: 6294066
    Abstract: An apparatus and the process produces salts by an electrodialysis operation. The basic electrodialysis apparatus is a cell having a number of compartments separated by membranes. A DC source is connected to drive a current through a feed stream passing through the cell which splits the salt stream into an acid and a base. The incoming feed may be nanofiltered to remove divalent metal. The base loop may be in communication with an ion exchange column packed with a material that removes multivalent cations. Depending upon the material being processed and the desired end result either or both the nanofiltration and the ion exchanged column may be used in the apparatus.
    Type: Grant
    Filed: January 23, 1997
    Date of Patent: September 25, 2001
    Assignee: Archer Daniels Midland Company
    Inventor: K. N. Mani
  • Patent number: 6292521
    Abstract: A phase lock device and method applicable to a data transmission system, particularly to a high speed transmission system are provided. Based on that the optimum operation margin for delaying data strobe is to shift the edge of data strobe to the middle region of data signal, the phase lock device and method suggest a solution, by analyzing the influence of environmental and operational conditions on delaying data strobe and system clock, to adapt delay element to the variation of environmental and operational conditions, so that the delay of data strobe is always in such a range that the data receiver can be enabled to do accurate and reliable data reading, regardless of external interference.
    Type: Grant
    Filed: September 9, 1998
    Date of Patent: September 18, 2001
    Assignee: Via Technologies, Inc.
    Inventors: Jiin Lai, Hsin-Chieh Lin, Fang-Yi Chen
  • Patent number: 6290237
    Abstract: A flat ring packing to be placed between two flanges comprises two packing layers of packing material and an intermediate ring of metal, which is disposed between the two packing layers and has a common central longitudinal axis therewith. Each packing layer is fixed on the intermediate ring substantially without play radial and parallel to the axis by means of a connection.
    Type: Grant
    Filed: July 19, 1999
    Date of Patent: September 18, 2001
    Assignee: IDT Industrie-und Dichtungstechnik GmbH
    Inventor: Edgar Graupner
  • Patent number: 6287135
    Abstract: A connector engaging/disengaging mechanism comprises a frame member (3) and connector carriers (7) for engaging and disengaging first connector (40) mounted on a printed circuit board (5) fixed onto the frame (3) and second connectors (30) held on said connector carriers (7). The frame member is provided with guide grooves (11) in which the connector carriers (7) are received to be slidable in an engaging direction (A) and a disengaging direction (B). Each of the connector carriers (7) has connector holding portions for holding the second connectors and an operating portion (15) for moving the connector carrier to engage and disengage the second connectors (30) to and from the first connector (40). When the operating portion (15) is manually operated to move the connector carrier in the engaging direction, the second connectors (30) are connected with the first connectors (40).
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: September 11, 2001
    Assignee: Japan Aviation Electronics Industries, Ltd.
    Inventors: Osamu Hashiguchi, Yoshinori Mizusawa, Toshihiko Maeda, Masahiro Yamada, Shin Kamiyamane, Satoru Nagase
  • Patent number: 6283782
    Abstract: In an electrical connector which has a first insulator (1a), a first contact (7) supported by the first insulator, a second insulator (2a) faced to the first insulator in a first direction, and a second contact (2a) supported by the second insulator, the second insulator has a side wall defining a groove (9) extending along the first insulator to have a first and a second part arranged in a second direction (A2) perpendicular to the first direction. The first contact has a first contacting portion (7a) inserted into the first part and carried towards the second part by relative movement between the first and the second insulators in the second direction. The second contact has a second contacting portion (8a) being of a flat shape, placed in the second part, and supported by the side wall. The second contacting portion extends in a direction approximate to the second direction.
    Type: Grant
    Filed: July 5, 2000
    Date of Patent: September 4, 2001
    Assignee: Japan Aviation Electronics Indusry, Limited
    Inventors: Yasufumi Yahiro, Nobukazu Kato
  • Patent number: 6281674
    Abstract: A trip meter includes a bracket secured to a member of a bicycle, a main body detachably secured to the bracket, a signal receiving circuit positioned in the main body for wirelessly receiving a pulse signal outputted from a transmitter, and a signal processing circuit electrically connected to the signal receiving circuit for counting a number and a frequency of the pulse signal and correspondingly generating an output signal indicative of the plurality of trip data.
    Type: Grant
    Filed: July 13, 1999
    Date of Patent: August 28, 2001
    Inventor: Chun-Mu Huang
  • Patent number: 6277310
    Abstract: A process uses a water repellant material in order to enhance the water resistance of composite. The process begins with a saturated vegetable or animal fat triglyceride having a low iodine value. The triglyceride is melted to form a sprayable liquid. The sprayable triglyceride and a bonding agent are applied to the fibrous materials, preparatory to a press binding. Then, the sprayed fibrous material is subjected to a hot press cycle in order to form a bonded fibrous composition. The low Iodine Value triglyceride may be selected from a group including hydrogenated vegetable oil, palm oil, stearine, winterized low IV fractions, soy stearine, animal fat, hydrogenated animal fat, and fractionated fats or blends of these materials.
    Type: Grant
    Filed: October 19, 1999
    Date of Patent: August 21, 2001
    Assignee: Archer Daniels Midland Company
    Inventor: Ronald Sleeter
  • Patent number: 6274400
    Abstract: A simplified tri-layer process for forming a thin film transistor matrix for a liquid crystal display is disclosed. By using a backside exposure technique twice, two masking steps for patterning an etch stopper layer, and an upper doped and a lower intrinsic semiconductor layers, respectively, can be omitted. Further, owing to the back-exposing energy for patterning the semiconductor layers is less than that for patterning the etch stopper layer, the resulting etch stopper layer is enclosed with the resulting semiconductor layers, and the contact of the two semiconductor layers can be achieved.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: August 14, 2001
    Assignee: Hannstar Display, Inc.
    Inventor: Tean-Sen Jen
  • Patent number: 6275682
    Abstract: A radio frequency (RF) signal transmitting device adapted to transmit signals between a computer and a plurality of wireless peripheral equipment is developed. The RF signal transmitting device includes a plurality of RF signal transmitters and an RF signal receiver. The RF signal transmitters are electrically connected to the plurality of wireless peripheral equipment, respectively, and each is provided for modulating an output signal therefrom into an RF signal with a specific carrier frequency and transmitting the RF signal. The RF signal receiver is electrically connected to the computer for synchronously receiving the RF signals from the RF signal transmitters and converting each of the RF signals to an operating signal to operate the computer.
    Type: Grant
    Filed: December 21, 1998
    Date of Patent: August 14, 2001
    Assignee: RF-Link Systems Inc.
    Inventors: An-Yu Yen, Ching-Wen Pan, Cheng-Kang Lee
  • Patent number: 6268681
    Abstract: To provide a piezoelectric transformer drive method and a drive circuit which is capable of preventing breakdown of the piezoelectric transformer due to excessive oscillation on its activation and of obtaining a high efficiency. Controller controlling the load power to a constant value is provided. The controller is controlled in such a manner that the driving of the piezoelectric transformer is initiated at a frequency higher than the resonating frequency on its activation and thereafter the drive frequency is gradually lowered without passing through the resonating frequency of the piezoelectric transfer on its activation.
    Type: Grant
    Filed: June 16, 1999
    Date of Patent: July 31, 2001
    Assignee: NEC Corporation
    Inventors: Shuuji Yamaguchi, Naoki Furuhashi
  • Patent number: D448794
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: October 2, 2001
    Assignee: Primax Electronics Ltd.
    Inventors: Hsu-Yang Wei, Kris Verstockt