Abstract: A transaction monitoring and security system records data from the sale of articles and provides security for inventor and sales receipts. The system includes container for storing articles to be distributed, and computer-controlled locking system for controlling access to the articles. The initial inventory of articles stored in the container is bar-coded, and the bar code data provide a digital data record of articles stored and locked in the container. A central computing unit (CCU) includes a housing with locked compartments for receiving and storing a plurality of hand-held portable transaction monitoring units (PTMU's) used to record transaction data from the sale of articles in the container. Each PTMU contains a microprocessor and data storage for communicating with the CCU and with memory in the cart. The PTMU off-loads a digital data record of the inventory of articles stored in the container.

Abstract: A three dimensional stack of printed circuit assemblies (10,12) provides electrical interconnection or bussing between layers of the stack by means of a composite contactor (34, 35, 36, 77, 79, 81, 83) formed of a shape-memory core (90) having a number of highly electrically conductive resilient wires (92, 94) wrapped around it. The shape-memory core (90) has a low temperature configuration that is substantially straight and enables the contactor assembly or core (90) and wires (92, 94) to be inserted into vias (30, 31, 76, 78, 80, 82) extending through this stack of layers with little or no insertion force. When heated above its phase change temperature, the shape-memory core (90) assumes a sinuous configuration which tightly presses the encircling conductive wires (92, 94) against the electrically conductive interior surfaces of the vias (30, 31) to provide mechanical and electrical contact from layer to layer.

Abstract: A memory cell is provided comprising a bistable latch (I1, I2) having first and second nodes (NODE 1, NODE 2) and a nonvolatile transistor (NV1). The control gate of the nonvolatile transistor is connected to the first node and either the source or drain is connected to the second node. A switching transistor is provided for maintaining the control gate and the substrate of the nonvolatile transistor at substantially the same potential during volatile operation of the latch, thereby reducing voltage stress which would lead to charge tunnelling to or from the floating gate. In this way, disturbance of the floating gate charge is avoided during volatile operation. The cell is particularly suited to silicon gate fabrication technology.

Abstract: High speed silicon-on-insulator radiation hardened semiconductor devices and a method of fabricating same. Starting with a SIMOX wafer (10) having a layer of silicon (12) on a layer of buried oxide (11), P-well and N-well masks are aligned to an oversized polysilicon mask (16). This produces relatively thick source and drain regions (18) and relatively thin gate regions (17). The relatively thick source and drain regions (18) reduce the risk of dry contact etch problems. N-channel and P-channel threshold voltages are adjusted prior to the formation of active areas, thus substantially eliminating edge and back cannel leakage. A sacrificial thin oxide layer (21) is employed in fabricating the N-well and P-well implants so that both front and back channel threshold voltage adjustments are controlled. Good control of doping profiles is obtained, leading to excellent threshold voltage control and low edge and back channel leakages.

Abstract: In a Mach-Zehnder electro-optic modulator (10), an optical waveguide (14) includes two branches (20,22) extending between an optical input (16) and an optical output (18) is formed in a substrate (12) of a material having electro-optical properties. An electrical signal applied to a modulation input (34) affects the material such that the effective optical lengths of the branches (20,22) vary differently in correspondence with the magnitude of the electrical signal. The optical signals propagating through the branches (20,22) interfere with each other at the optical output (18) at a phase angle depending on the difference between the effective optical lengths. A selected electrical bias voltage applied to the modulation input (34) causes non-linear modulation of an input optical signal with one or more even integral multiples of an electrical input signal which is additionally applied to the modulation input (34), thereby providing frequency multiplication.

Abstract: A grinding and polishing machine (11) which includes a grinding section (15), a polising section (17), a fixture (19) and a fixture bearing assembly (21). Fiber optic termini (169) are retained in the fixture (19) so that distal ends (185) of optical fibers (177) and end faces (181) can be ground by a grinding abrasive (80) and polished by a polishing abrasive (91). The distal ends (185) and the end faces (181) prevent contact between the fixture (19) and the grinding abrasive (80) and the polishing abrasive (91).

Abstract: Three active FET baluns, using resonant, reactive and resistive/reactive compensation are disclosed suitable for monolithic implementation. A single balanced mixer configuration including a resistive/reactive active FET balun coupled with a pair of single ended FET mixers in a push pull configuration is disclosed which is also suitable for monolithic implementation.

Abstract: A via (26) is formed through a dielectric layer (8) separating two conductive layers (16,28) by establishing a laterally erodible mask (18) over the dielectric (8), with a window (24) over the desired via location. The mask (18) and exposed dielectric material (8) are eroded simultaneously, preferably by reactive ion etching, producing a via (26) through the dielectric (8) which expands laterally as vertical erosion proceeds. The erosion conditions, the materials for the mask (18) and dielectric (8), and the initial window (24) taper are selected so that the final via (26) is tapered at an angle of less than about 45.degree. to the lower metal layer (6), and preferably about 30.degree.-45.degree., to enable a generally uniform width for the upper metallization (28) in the via (26).

Abstract: A sense amplifier for determining the logic state of a memory cell consists of a switch transistor (N2) for receiving current during sensing from the memory cell (NV1), a nonvolatile transistor (NV2) providing a reference current which is compared to a representation of the sensed current through the switch transistor (itself dependent on the state of NV1), a bistable latch (N4P4, N5P5) which is switched into one or other of its states depending on the result of the comparison, and a feedback from the output of the latch (NODE 3) to the gate of the switch transistor (N2) to isolate the amplifier from the memory cell after sensing.

Abstract: An electrical circuit pattern is formed on a glass-ceramic, thermally fusible tape. The tape is heated to a temperature at which it becomes temporarily plastic, and is then bent into a desired non-planar shape. Further application of heat causes the tape to be sintered in the non-planar shape. A multi-layer structure can be provided by laminating plural layers of Low-Temperature-Cofired-Ceramic (LTCC) tape with respective circuit patterns formed thereon together, and plastically bending the laminated structure into the non-planar shape during the heating step. A circuit structure including an edge connector can be formed by laminating a layer of glass-ceramic transfer tape having an electrical circuit pattern which includes conductor strips formed on an edge connector portion thereof onto a relatively rigid substrate, such that the edge connector portion is bent around an edge of the substrate to form a rigid edge connector.

Abstract: A radiation hard, high voltage integrated circuit device fabrication process. A silicon substrate is implanted with ions that form a buried layer and an epitaxial layer of silicon is grown thereover. The structure is heated to form adjacent N- and P-channel regions. Channel stops are then formed surrounding the respective channel regions. After forming the channel stops, the substrate is masked and predefined dopant ions are implanted into the source and drain regions of the respective wells in the substrate. The distribution of the dopant ions therein are adjusted to have a predetermined doping profile that defines a graded junction. Then the substrate is heated to a relatively high temperature to provide a high temperature drive cycle that forms a desired graded junction profile. A field oxide layer is then deposited on the substrate, and it is masked and etched to define active areas. A gate oxide layer is grown on the substrate above the active areas, and polysilicon gates are formed thereon.

Abstract: A multiple quantum well photodetector structure has superlattice which absorbs radiation polarized non-parallel to the superlattice during a first pass. Non-absorbed radiation polarized parallel to the superlattice is reflected back into the superlattice at a cross-angle to its incident angle, with its polarization shifted to a substantially non-parallel angle to the superlattice. At least part of this radiation is absorbed during its second pass through the superlattice, thereby increasing the efficiency of the device. An optical back grating is used to perform the cross-angle reflection, and a front grating may also be used to shift an incoming beam which is initially normal to the superlattice to an angle at which part of the beam is absorbed. The front grating is at a cross-angle to the back grating to enable a cross-angular shift by the back grating.

Abstract: A process for forming MOS devices having graded source and drain regions. The source and drain regions are lightly doped by ion implantation and then subjected to thermal cycling to diffuse the implanted impurities. The source and drain regions are then heavily doped to form source and drain regions having a heavily doped subregion and a lightly doped subregion. Devices made pursuant to the process, which can be made less than one-half micron, are not subject to gate oxide charging and have high snapback voltages.

Abstract: A screen printing arrangement is disclosed including a mesh or screen attached to a frame, the screen having a pattern area defined therein. Strips of thin rectangularly shaped material are glued to the bottom surface of the screen, outside the pattern area. During the screen printing process, the strips keep the screen mesh and pattern from undesirably stretching. Fine conductor lines or conductor line spacings on the order of 5 mils may be achieved.

Abstract: An adhesive mixture reworkably adheres electronic integrated circuit dies to hybrid microcircuit substrates, and includes a thermosetting epoxy resin. A thermoplastic resin additive allows the mixture to retain the high adhesive strength of the epoxy resin up to approximately 150.degree. C., or the upper limit of the operating and testing temperature range of the dies, and then soften sufficiently to enable defective dies to be removed at a temperature of preferably between 150.degree. C. and 200.degree. C. without damage to the substrate or adjacent dies.

Abstract: A system for automatically achieving convergence of the individual color images emitted by a color projector (11). The system employs a test pattern generator (71) which generates a number of test patterns which are identical for each CRT of the projector (11). The test patterns are scanned across a light sensor (83) which produces an output signal each time a portion of the test pattern crosses the sensor (83). The output signal causes a scanner processor (91) to latch the positions at which respective crossings are detected. The differences in position of the respective test patterns at each location examined by the sensor (83) represents misconvergence of the individual color images at the respective location. These differences are determined and interpolated by an image processor (61) and stored in a memory (63) to generate correction signals for correcting the misconvergence.

Abstract: A feedback signal of an ultrasonic generator (13) employed in a ball bonder (11) is sampled by an analog-to-digital converter (23) under control of a microprocessor (25) to provide a "bond signature" indicative of bond quality. The microprocessor (25) then compares the bond signature to limits representing a good quality bond to provide an indication of a good or failed bond. The indication may be visually provided by projecting the bond signature and limits on a display (27), as well as automatically provided by a programmed comparison.

Abstract: Depolarization mechanisms arising from the recycling of the polarized fuel at the limiter and the first-wall of a fusion reactor are greater than those mechanisms in the plasma. Rapid depolarization of the plasma is prevented by providing a first-wall or first-wall coating formed of a low-Z, non-metallic material having a depolarization rate greater than 1 sec.sup.-1.

Abstract: The inductively formed spheromak plasma can be maintained in a highly stable and controlled fashion. Steady-state operation is obtained by forming the plasma in the linked mode, then oscillating the poloidal and toroidal fields such that they have different phases. Preferably, the poloidal and magnetic fields are 90.degree. out of phase.

Abstract: A mechanically stable, wound, multifilar, ribbon-type conductor having a cross-sectional aspect ratio which may be greater than 12:1, comprising a plurality of conductive strands wound to form a flattened helix containing a plastic strip into which the strands have been pressed so as to form a bond between the strip and the strands. The bond mechanically stabilizes the conductor under tension, preventing it from collapsing into a tubular configuration. In preferred embodiments the plastic strip may be polytetrafluoroethylene, and the conductive strands may be formed from a superconductive material. Conductors in accordance with the present invention may be manufactured by winding a plurality of conductive strands around a hollow mandrel; the cross-section of a hollow mandrel; the cross-section of the mandrel continuously varying from substantially circular to a high aspect ratio elipse while maintaining a constant circumference.