Abstract: This invention discloses a customizable logic array device including an array of programmable cells having a multiplicity of inputs and a multiplicity of outputs and customized interconnections overlying at least a portion of the programmable cell for permanently interconnecting at least a plurality of the multiplicity of inputs and at least a plurality of the multiplicity of outputs.

Abstract: In a mobile communication system in which mobile terminals register their locations at specified intervals of time, the velocities of the mobile terminals are determined, and the registration intervals are adjusted according to the velocities. Longer intervals are assigned for lower velocities, thereby conserving battery power and system resources. Methods of determining velocity include the use of positional information provided by base stations, and the sensing of Doppler frequency shifts.

Abstract: Within a vacuum vessel, there are arranged an electron emitting part emitting an electron beam in a first direction, and an optical amplifying part amplifying incident light with the help of energy of the electron beam. The optical amplifying part includes a flat dielectric substrate made of a quartz glass, a rectilinear dielectric optical waveguide provided on the flat dielectric substrate, made of a dielectric material having a high refractive index and extending in said first direction, input and output optical waveguides provided on the dielectric substrate and being coupled with both ends of the dielectric optical waveguide, and a pair of electron beam converging electrodes arranged on respective sides of the dielectric optical waveguide. A velocity of the incident light is delayed during propagation through the dielectric optical waveguide, and a part of the incident light penetrates from the dielectric optical waveguide into the vacuum in the form of evanescent light.

Abstract: A memory device has a main memory circuit, an auxiliary memory circuit for storing test data, and an interface circuit for transferring test data between the auxiliary memory circuit and external test equipment. Test data are transferred from the external test equipment to the auxiliary memory circuit, then transferred repeatedly to different locations in the main memory circuit. Different test patterns are generated by selectively inverting one bit, or all bits, in the test data as the data are transferred into the main memory circuit. Test results are obtained by using a comparator in the memory device to compare the data stored in the auxiliary memory circuit with data read from the main memory circuit.

Abstract: A process for electroplating metal on a resistive substrate and the article of manufacture produced therefrom are disclosed. The metal layer is electroplated onto the resistive substrate in an electroplating bath having a polarization parameter &xgr; less than approximately 10 such that the metal layer is of substantially uniform thickness. The polarization parameter &xgr; of less than approximately 10 for the electroplating bath can be achieved by numerous means, such as by providing a low metal ion concentration in the electroplating bath or by adding one or more additives to the electroplating bath. The present invention may be used with a variety of metals and resistive substrates.

Abstract: A computer architecture operates a computer using self-manipulating trees. A source is input and is matched to a self-manipulating tree using open-ended inviting to match identities to portions of the source. After activating the root node of the self-manipulating tree, the self-manipulating tree self-manipulates according to the instructions for self-manipulating contained in the identities pointed to by the nodes of the self-manipulating tree. The invention may be used as a natural language search engine for electronic data bases, a natural language programming language, a parser-free computer operating system, a computer problem solving system, and as an enhancement feature for general purpose computers and general purpose computer applications, such as a translator and a help engine.

Abstract: This invention discloses a method for designing and manufacturing semiconductors including the steps of: (i) producing a fab-ready design for a semiconductor device by importing into the design at least one core from a remote source, the core bearing an identification indicium, (ii) utilizing the fabready design to fabricate the semiconductor device, and (iii) reading the identification indicium from the semiconductor device to indicate incorporation of the at least one core therein.

Abstract: In a speech synthesizer for converting text data to speech data, it is possible to realize high quality speech output even if the text data to be converted is in many languages. The speech synthesizer is provided with a plurality of speech synthesizers for converting text data to speech data and each speech synthesizer converts text data of a different language to speech data in that language. For conversion of particular text data to speech data, one of the plurality of speech synthesizers is selected and caused to carry out that conversion.

Abstract: A semiconductor device including a logic array having a multiplicity of identical logic cells, each identical logic cell comprising at least one look-up table, a metal connection layer overlying the multiplicity of identical logic cells for providing a permanent customized interconnect between various inputs and outputs thereof.

Abstract: A voltage monitoring circuit compares a voltage, which is obtained by dividing the voltage required for writing or erasing data to or from a semiconductor storage device, with a reference voltage (Vref) using a comparator, and if the comparison result indicates that the voltage required for writing or erasing data is not being supplied, then it disables the operation of a CPU, thus enabling quick discovery of a failure of the supply of the voltage necessary for writing to or erasing from the semiconductor storage device.

Abstract: In a clock control circuit there are provided a counter for dividing a reference clock signal so as to generate a plurality of divided clock signals and selectors for selectively outputting one of the plurality of divided clock signals and the reference clock signal as an operation clock signal relative to a CPU or as an operation clock signal relative to a peripheral circuit.

Abstract: A data transmission rate control method in which a transmission control scheme used for data transmission over each channel is switched depending on a subband to which a proper transmission rate of the channel belongs, the subband being prepared by dividing an entire band by one or more boundaries. This makes it possible to solve a problem in conventional systems of variations in accuracy due to the bandwidth, and an increase in the circuit scale, when the a cell rate to be controlled ranges over wide bandwidth.

Abstract: An electronic transaction processing system for transferring a monetary value between a payer and a receiver includes a first memory apparatus storing a payer's digital cash, a second memory apparatus storing a receiver's digital cash, and a third memory apparatus storing temporarily the payer's digital cash transferred from the first memory apparatus. A transaction is processed by transferring the digital cash transferred from the first memory apparatus to the second memory apparatus via the third memory apparatus.

Abstract: A unidirectional optical amplifier comprising an optical dielectric waveguide having a high refraction index for leading light from a light input terminal to a light output terminal and a straight electron beam transit section extended in an electron beam transit direction. The optical amplifier includes an amplifier section for amplifying light in one direction by utilizing an energy level sufficiently higher than a Fermi level, and an emissive section for emitting an electron beam in the electron beam transit section. The electron beam transit section is preferably constituted so that the effective mass of an electron in the amplifier section becomes small, and the optical dielectric waveguide and the electron beam transit section are arranged in such a manner that the wave number of light in the amplifier section becomes large and an electric field component of the light is generated in the electron beam transit direction.

Abstract: A personalizable and programmable integrated circuit device including at least first and second programmable logic cells and at least two electrical conductive paths interconnecting the programmable logic cells, at least a portion of which can be removed for personalization of the integrated circuit device.

Abstract: Within a vacuum vessel 10, there are arranged an electron gun 2 emitting an electron beam and an amplification part 3 which amplifies incident light 7 by means of the energy of the electron beam. The amplification part 3 is formed by two wave-like mirrors 4 and 5 made of a metal such as Ag or a multi-layer structure of dielectric materials, said mirrors being separated from each other to constitute not only an electron beam travelling part, but also a light input part 4a, 5a, a light amplifying part 4b, 5b and a light output part 4c, 5c arranged in this order viewed in a travelling direction of the electron beam. The light is made incident upon the light input part at a given incident angle, and propagates along the wave-like or zigzag optical waveguide within the light amplifying part by repeating reflections. Therefore, the wavenumber of the light is increased, and the light is amplified in a unidirectional manner by the energy of the electron beam.